diff --git a/ql-qlf-plugin/qlf_k6n10f/dsp_final_map.v b/ql-qlf-plugin/qlf_k6n10f/dsp_final_map.v
index e2ab7a7..9eae617 100644
--- a/ql-qlf-plugin/qlf_k6n10f/dsp_final_map.v
+++ b/ql-qlf-plugin/qlf_k6n10f/dsp_final_map.v
@@ -14,7 +14,7 @@
 //
 // SPDX-License-Identifier: Apache-2.0
 
-module dsp_t1_20x18x64 (
+module dsp_t1_20x18x64_cfg_ports (
     input  [19:0] a_i,
     input  [17:0] b_i,
     input  [ 5:0] acc_fir_i,
@@ -70,7 +70,7 @@
 
 endmodule
 
-module dsp_t1_10x9x32 (
+module dsp_t1_10x9x32_cfg_ports (
     input  [ 9:0] a_i,
     input  [ 8:0] b_i,
     input  [ 5:0] acc_fir_i,
@@ -136,3 +136,130 @@
 
 endmodule
 
+module dsp_t1_20x18x64_cfg_params (
+    input  [19:0] a_i,
+    input  [17:0] b_i,
+    input  [ 5:0] acc_fir_i,
+    output [37:0] z_o,
+    output [17:0] dly_b_o,
+
+    input         clock_i,
+    input         reset_i,
+
+    input  [2:0]  feedback_i,
+    input         load_acc_i,
+    input         unsigned_a_i,
+    input         unsigned_b_i,
+    input         subtract_i
+);
+
+    parameter [19:0] COEFF_0 = 20'd0;
+    parameter [19:0] COEFF_1 = 20'd0;
+    parameter [19:0] COEFF_2 = 20'd0;
+    parameter [19:0] COEFF_3 = 20'd0;
+
+    parameter [2:0] OUTPUT_SELECT   = 3'd0;
+    parameter [0:0] SATURATE_ENABLE = 1'd0;
+    parameter [5:0] SHIFT_RIGHT     = 6'd0;
+    parameter [0:0] ROUND           = 1'd0;
+    parameter [0:0] REGISTER_INPUTS = 1'd0;
+
+    QL_DSP3 # (
+        .MODE_BITS ({
+            REGISTER_INPUTS,
+            ROUND,
+            SHIFT_RIGHT,
+            SATURATE_ENABLE,
+            OUTPUT_SELECT,
+            1'b0, // Not fractured
+            COEFF_3,
+            COEFF_2,
+            COEFF_1,
+            COEFF_0
+        })
+    ) _TECHMAP_REPLACE_ (
+        .a                  (a_i),
+        .b                  (b_i),
+        .acc_fir            (acc_fir_i),
+        .z                  (z_o),
+        .dly_b              (dly_b_o),
+
+        .clk                (clock_i),
+        .reset              (reset_i),
+
+        .feedback           (feedback_i),
+        .load_acc           (load_acc_i),
+        .unsigned_a         (unsigned_a_i),
+        .unsigned_b         (unsigned_b_i),
+        .subtract           (subtract_i)
+    );
+
+endmodule
+
+module dsp_t1_10x9x32_cfg_params (
+    input  [ 9:0] a_i,
+    input  [ 8:0] b_i,
+    input  [ 5:0] acc_fir_i,
+    output [18:0] z_o,
+    output [ 8:0] dly_b_o,
+
+    (* clkbuf_sink *)
+    input         clock_i,
+    input         reset_i,
+
+    input  [2:0]  feedback_i,
+    input         load_acc_i,
+    input         unsigned_a_i,
+    input         unsigned_b_i,
+    input         subtract_i
+);
+
+    parameter [9:0] COEFF_0 = 10'd0;
+    parameter [9:0] COEFF_1 = 10'd0;
+    parameter [9:0] COEFF_2 = 10'd0;
+    parameter [9:0] COEFF_3 = 10'd0;
+
+    parameter [2:0] OUTPUT_SELECT   = 3'd0;
+    parameter [0:0] SATURATE_ENABLE = 1'd0;
+    parameter [5:0] SHIFT_RIGHT     = 6'd0;
+    parameter [0:0] ROUND           = 1'd0;
+    parameter [0:0] REGISTER_INPUTS = 1'd0;
+
+    wire [37:0] z;
+    wire [17:0] dly_b;
+
+    QL_DSP3 # (
+        .MODE_BITS  ({
+            REGISTER_INPUTS,
+            ROUND,
+            SHIFT_RIGHT,
+            SATURATE_ENABLE,
+            OUTPUT_SELECT,
+            1'b1, // Fractured
+            10'd0, COEFF_3,
+            10'd0, COEFF_2,
+            10'd0, COEFF_1,
+            10'd0, COEFF_0
+        })
+    ) _TECHMAP_REPLACE_ (
+        .a                  ({10'd0, a_i}),
+        .b                  ({ 9'd0, b_i}),
+        .acc_fir            (acc_fir_i),
+        .z                  (z),
+        .dly_b              (dly_b),
+
+        .clk                (clock_i),
+        .reset              (reset_i),
+
+        .feedback           (feedback_i),
+        .load_acc           (load_acc_i),
+        .unsigned_a         (unsigned_a_i),
+        .unsigned_b         (unsigned_b_i),
+        .subtract           (subtract_i)
+    );
+
+    assign z_o = z[18:0];
+    assign dly_b_o = dly_b_o[8:0];
+
+endmodule
+
diff --git a/ql-qlf-plugin/qlf_k6n10f/dsp_map.v b/ql-qlf-plugin/qlf_k6n10f/dsp_map.v
index 3c16b60..bbfc494 100644
--- a/ql-qlf-plugin/qlf_k6n10f/dsp_map.v
+++ b/ql-qlf-plugin/qlf_k6n10f/dsp_map.v
@@ -33,24 +33,46 @@
                (B_SIGNED) ? {{(18 - B_WIDTH){B[B_WIDTH-1]}}, B} :
                             {{(18 - B_WIDTH){1'b0}},         B};
 
-    dsp_t1_20x18x64 _TECHMAP_REPLACE_ (
-        .a_i                (a),
-        .b_i                (b),
-        .acc_fir_i          (6'd0),
-        .z_o                (z),
+    generate if (`USE_DSP_CFG_PARAMS == 0) begin
+        dsp_t1_20x18x64_cfg_ports _TECHMAP_REPLACE_ (
+            .a_i                (a),
+            .b_i                (b),
+            .acc_fir_i          (6'd0),
+            .z_o                (z),
 
-        .feedback_i         (3'd0),
-        .load_acc_i         (1'b0),
-        .unsigned_a_i       (!A_SIGNED),
-        .unsigned_b_i       (!B_SIGNED),
+            .feedback_i         (3'd0),
+            .load_acc_i         (1'b0),
+            .unsigned_a_i       (!A_SIGNED),
+            .unsigned_b_i       (!B_SIGNED),
 
-        .output_select_i    (3'd0),
-        .saturate_enable_i  (1'b0),
-        .shift_right_i      (6'd0),
-        .round_i            (1'b0),
-        .subtract_i         (1'b0),
-        .register_inputs_i  (1'b0)
-    );
+            .output_select_i    (3'd0),
+            .saturate_enable_i  (1'b0),
+            .shift_right_i      (6'd0),
+            .round_i            (1'b0),
+            .subtract_i         (1'b0),
+            .register_inputs_i  (1'b0)
+        );
+    end else begin
+        dsp_t1_20x18x64_cfg_params #(
+            .OUTPUT_SELECT      (3'd0),
+            .SATURATE_ENABLE    (1'b0),
+            .SHIFT_RIGHT        (6'd0),
+            .ROUND              (1'b0),
+            .REGISTER_INPUTS    (1'b0)
+        ) TECHMAP_REPLACE_ (
+            .a_i                (a),
+            .b_i                (b),
+            .acc_fir_i          (6'd0),
+            .z_o                (z),
+
+            .feedback_i         (3'd0),
+            .load_acc_i         (1'b0),
+            .unsigned_a_i       (!A_SIGNED),
+            .unsigned_b_i       (!B_SIGNED),
+
+            .subtract_i         (1'b0)
+        );
+    end endgenerate
 
     assign Y = z;
 
@@ -75,26 +97,47 @@
                (B_SIGNED) ? {{( 9 - B_WIDTH){B[B_WIDTH-1]}}, B} :
                             {{( 9 - B_WIDTH){1'b0}},         B};
 
-    dsp_t1_10x9x32 _TECHMAP_REPLACE_ (
-        .a_i                (a),
-        .b_i                (b),
-        .acc_fir_i          (6'd0),
-        .z_o                (z),
+    generate if (`USE_DSP_CFG_PARAMS == 0) begin
+        dsp_t1_10x9x32_cfg_ports _TECHMAP_REPLACE_ (
+            .a_i                (a),
+            .b_i                (b),
+            .acc_fir_i          (6'd0),
+            .z_o                (z),
 
-        .feedback_i         (3'd0),
-        .load_acc_i         (1'b0),
-        .unsigned_a_i       (!A_SIGNED),
-        .unsigned_b_i       (!B_SIGNED),
+            .feedback_i         (3'd0),
+            .load_acc_i         (1'b0),
+            .unsigned_a_i       (!A_SIGNED),
+            .unsigned_b_i       (!B_SIGNED),
 
-        .output_select_i    (3'd0),
-        .saturate_enable_i  (1'b0),
-        .shift_right_i      (6'd0),
-        .round_i            (1'b0),
-        .subtract_i         (1'b0),
-        .register_inputs_i  (1'b0)
-    );
+            .output_select_i    (3'd0),
+            .saturate_enable_i  (1'b0),
+            .shift_right_i      (6'd0),
+            .round_i            (1'b0),
+            .subtract_i         (1'b0),
+            .register_inputs_i  (1'b0)
+        );
+    end else begin
+        dsp_t1_10x9x32_cfg_params #(
+            .OUTPUT_SELECT      (3'd0),
+            .SATURATE_ENABLE    (1'b0),
+            .SHIFT_RIGHT        (6'd0),
+            .ROUND              (1'b0),
+            .REGISTER_INPUTS    (1'b0)
+        ) TECHMAP_REPLACE_ (
+            .a_i                (a),
+            .b_i                (b),
+            .acc_fir_i          (6'd0),
+            .z_o                (z),
+
+            .feedback_i         (3'd0),
+            .load_acc_i         (1'b0),
+            .unsigned_a_i       (!A_SIGNED),
+            .unsigned_b_i       (!B_SIGNED),
+
+            .subtract_i         (1'b0)
+        );
+    end endgenerate
 
     assign Y = z;
 
 endmodule
-