tree e064786d0415787897a849b97b7a9ac2925c1cf9
parent 43308c14324f88f59df758a575c12f55df90987f
parent 72e32103b4476d33fc8c9e6dd5081a5bb0a4df3c
author Kamil Rakoczy <krakoczy@antmicro.com> 1676974517 +0100
committer GitHub <noreply@github.com> 1676974517 +0100
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Merge pull request #458 from antmicro/kr/memory_slice

systemverilog-plugin: convert memory when accessing slice