tree 777152a4d163681d8835fb18e4fd6fec0a772b3e
parent 8b80abceaaa1eb34c0a78cb9a4ac59c884ff10c3
parent 82f3d4a37a59555c1cb8b1695d6dbe0d4cef1d03
author Kamil Rakoczy <krakoczy@antmicro.com> 1681737257 +0200
committer GitHub <noreply@github.com> 1681737257 +0200
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Merge pull request #479 from antmicro/kr/module_input_type

systemverilog-plugin: fix size of struct used as I/O wire