Merge pull request #276 from antmicro/rename-uhdm-plugin
Rename the uhdm plugin to systemverilog
diff --git a/Makefile b/Makefile
index 1279f83..91b0ba9 100644
--- a/Makefile
+++ b/Makefile
@@ -6,7 +6,7 @@
#
# SPDX-License-Identifier:ISC
-PLUGIN_LIST := fasm xdc params sdc ql-iob design_introspection integrateinv ql-qlf uhdm dsp-ff
+PLUGIN_LIST := fasm xdc params sdc ql-iob design_introspection integrateinv ql-qlf systemverilog uhdm dsp-ff
PLUGINS := $(foreach plugin,$(PLUGIN_LIST),$(plugin).so)
PLUGINS_INSTALL := $(foreach plugin,$(PLUGIN_LIST),install_$(plugin))
PLUGINS_CLEAN := $(foreach plugin,$(PLUGIN_LIST),clean_$(plugin))
diff --git a/README.md b/README.md
index c7e4cca..9ca9b69 100644
--- a/README.md
+++ b/README.md
@@ -13,7 +13,7 @@
6. [QuickLogic QLF FPGAs](#quicklogic-qlf-plugin)
7. [SDC](#sdc-plugin)
8. [XDC](#xdc-plugin)
-9. [UHDM](#uhdm-plugin)
+9. [SystemVerilog](#systemverilog-plugin)
## Summary
@@ -99,12 +99,12 @@
* set_property
* get_bank_tiles
-### UHDM plugin
+### SystemVerilog plugin
-Reads UHDM files and processes it into yosys AST.
+Reads SystemVerilog and UHDM files and processes them into yosys AST.
The plugin adds the following commands:
+* read_systemverilog
* read_uhdm
-* read_verilog_with_uhdm
Detailed help on the supported command(s) can be obtained by running `help <command_name>` in Yosys.
diff --git a/systemverilog-plugin/Makefile b/systemverilog-plugin/Makefile
new file mode 100644
index 0000000..f0229fa
--- /dev/null
+++ b/systemverilog-plugin/Makefile
@@ -0,0 +1,24 @@
+# Copyright (C) 2020-2021 The SymbiFlow Authors.
+#
+# Use of this source code is governed by a ISC-style
+# license that can be found in the LICENSE file or at
+# https://opensource.org/licenses/ISC
+#
+# SPDX-License-Identifier:ISC
+
+NAME = systemverilog
+SOURCES = UhdmAst.cc \
+ uhdmastfrontend.cc \
+ uhdmcommonfrontend.cc \
+ uhdmsurelogastfrontend.cc \
+ uhdmastreport.cc
+
+include ../Makefile_plugin.common
+
+CPPFLAGS += -std=c++17 -Wall -W -Wextra -Werror \
+ -I${UHDM_INSTALL_DIR}/include \
+ -I${UHDM_INSTALL_DIR}/include/Surelog
+
+CXXFLAGS += -Wno-unused-parameter
+LDFLAGS += -L${UHDM_INSTALL_DIR}/lib/uhdm -L${UHDM_INSTALL_DIR}/lib/surelog -L${UHDM_INSTALL_DIR}/lib -L${UHDM_INSTALL_DIR}/lib64/uhdm -L${UHDM_INSTALL_DIR}/lib64/surelog -L${UHDM_INSTALL_DIR}/lib64
+LDLIBS += -Wl,--whole-archive -luhdm -Wl,--no-whole-archive -lsurelog -lantlr4-runtime -lflatbuffers -lcapnp -lkj -ldl -lutil -lm -lrt -lpthread
diff --git a/uhdm-plugin/UhdmAst.cc b/systemverilog-plugin/UhdmAst.cc
similarity index 100%
rename from uhdm-plugin/UhdmAst.cc
rename to systemverilog-plugin/UhdmAst.cc
diff --git a/uhdm-plugin/UhdmAst.h b/systemverilog-plugin/UhdmAst.h
similarity index 100%
rename from uhdm-plugin/UhdmAst.h
rename to systemverilog-plugin/UhdmAst.h
diff --git a/uhdm-plugin/UhdmAstUpstream.cc b/systemverilog-plugin/UhdmAstUpstream.cc
similarity index 100%
rename from uhdm-plugin/UhdmAstUpstream.cc
rename to systemverilog-plugin/UhdmAstUpstream.cc
diff --git a/systemverilog-plugin/tests/Makefile b/systemverilog-plugin/tests/Makefile
new file mode 100644
index 0000000..66d5a63
--- /dev/null
+++ b/systemverilog-plugin/tests/Makefile
@@ -0,0 +1,9 @@
+# Copyright (C) 2020-2021 The SymbiFlow Authors.
+#
+# Use of this source code is governed by a ISC-style
+# license that can be found in the LICENSE file or at
+# https://opensource.org/licenses/ISC
+#
+# SPDX-License-Identifier:ISC
+
+include $(shell pwd)/../../Makefile_test.common
diff --git a/uhdm-plugin/uhdmastfrontend.cc b/systemverilog-plugin/uhdmastfrontend.cc
similarity index 100%
rename from uhdm-plugin/uhdmastfrontend.cc
rename to systemverilog-plugin/uhdmastfrontend.cc
diff --git a/uhdm-plugin/uhdmastreport.cc b/systemverilog-plugin/uhdmastreport.cc
similarity index 100%
rename from uhdm-plugin/uhdmastreport.cc
rename to systemverilog-plugin/uhdmastreport.cc
diff --git a/uhdm-plugin/uhdmastreport.h b/systemverilog-plugin/uhdmastreport.h
similarity index 100%
rename from uhdm-plugin/uhdmastreport.h
rename to systemverilog-plugin/uhdmastreport.h
diff --git a/uhdm-plugin/uhdmastshared.h b/systemverilog-plugin/uhdmastshared.h
similarity index 100%
rename from uhdm-plugin/uhdmastshared.h
rename to systemverilog-plugin/uhdmastshared.h
diff --git a/uhdm-plugin/uhdmcommonfrontend.cc b/systemverilog-plugin/uhdmcommonfrontend.cc
similarity index 100%
rename from uhdm-plugin/uhdmcommonfrontend.cc
rename to systemverilog-plugin/uhdmcommonfrontend.cc
diff --git a/uhdm-plugin/uhdmcommonfrontend.h b/systemverilog-plugin/uhdmcommonfrontend.h
similarity index 100%
rename from uhdm-plugin/uhdmcommonfrontend.h
rename to systemverilog-plugin/uhdmcommonfrontend.h
diff --git a/uhdm-plugin/uhdmsurelogastfrontend.cc b/systemverilog-plugin/uhdmsurelogastfrontend.cc
similarity index 100%
rename from uhdm-plugin/uhdmsurelogastfrontend.cc
rename to systemverilog-plugin/uhdmsurelogastfrontend.cc
diff --git a/uhdm-plugin/Makefile b/uhdm-plugin/Makefile
index 223a126..8018d76 100644
--- a/uhdm-plugin/Makefile
+++ b/uhdm-plugin/Makefile
@@ -1,4 +1,4 @@
-# Copyright (C) 2020-2021 The SymbiFlow Authors.
+# Copyright (C) 2022 The SymbiFlow Authors.
#
# Use of this source code is governed by a ISC-style
# license that can be found in the LICENSE file or at
@@ -7,18 +7,5 @@
# SPDX-License-Identifier:ISC
NAME = uhdm
-SOURCES = UhdmAst.cc \
- uhdmastfrontend.cc \
- uhdmcommonfrontend.cc \
- uhdmsurelogastfrontend.cc \
- uhdmastreport.cc
-
+SOURCES = uhdm.cc
include ../Makefile_plugin.common
-
-CPPFLAGS += -std=c++17 -Wall -W -Wextra -Werror \
- -I${UHDM_INSTALL_DIR}/include \
- -I${UHDM_INSTALL_DIR}/include/Surelog
-
-CXXFLAGS += -Wno-unused-parameter
-LDFLAGS += -L${UHDM_INSTALL_DIR}/lib/uhdm -L${UHDM_INSTALL_DIR}/lib/surelog -L${UHDM_INSTALL_DIR}/lib -L${UHDM_INSTALL_DIR}/lib64/uhdm -L${UHDM_INSTALL_DIR}/lib64/surelog -L${UHDM_INSTALL_DIR}/lib64
-LDLIBS += -Wl,--whole-archive -luhdm -Wl,--no-whole-archive -lsurelog -lantlr4-runtime -lflatbuffers -lcapnp -lkj -ldl -lutil -lm -lrt -lpthread
diff --git a/uhdm-plugin/uhdm.cc b/uhdm-plugin/uhdm.cc
new file mode 100644
index 0000000..2babb21
--- /dev/null
+++ b/uhdm-plugin/uhdm.cc
@@ -0,0 +1,38 @@
+/*
+ * yosys -- Yosys Open SYnthesis Suite
+ *
+ * Copyright (C) 2022 Antmicro
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+#include "kernel/log.h"
+
+USING_YOSYS_NAMESPACE
+
+PRIVATE_NAMESPACE_BEGIN
+
+struct UhdmDummy {
+ UhdmDummy()
+ {
+ log("\n");
+ log("!! DEPRECATION WARNING !!\n");
+ log("\n");
+ log("The uhdm plugin has been renamed to systemverilog.\n");
+ log("Loading the systemverilog plugin...\n");
+
+ std::vector<std::string> plugin_aliases;
+ load_plugin("systemverilog", plugin_aliases);
+ }
+} UhdmDummy;
+
+PRIVATE_NAMESPACE_END
