)]}'
{
  "commit": "9852a6ae2e0b0f2297d6ed407b2d9da494e56491",
  "tree": "8b10f945eb35524224fe34d8de0f0bad19557131",
  "parents": [
    "46810a50c1a6d722332e91ddc4955b09999f241f",
    "50d463f844570aae649eb8b950f70af011f56ce4"
  ],
  "author": {
    "name": "Tomasz Gorochowik",
    "email": "tgorochowik@antmicro.com",
    "time": "Wed Mar 23 12:43:36 2022 +0100"
  },
  "committer": {
    "name": "GitHub",
    "email": "noreply@github.com",
    "time": "Wed Mar 23 12:43:36 2022 +0100"
  },
  "message": "Merge pull request #276 from antmicro/rename-uhdm-plugin\n\nRename the uhdm plugin to systemverilog",
  "tree_diff": []
}