)]}'
{
  "commit": "9a5ce724651f67ccc915668d9d3a52de36959c86",
  "tree": "556234c53b97a841f1f203e09bf158ce28d05879",
  "parents": [
    "56939e0d61a5bd84e41bb297a1734fbb9e8d5a0f"
  ],
  "author": {
    "name": "Magdalena Andrys",
    "email": "mandrys@antmicro.com",
    "time": "Thu Dec 22 17:32:43 2022 +0100"
  },
  "committer": {
    "name": "Magdalena Andrys",
    "email": "mandrys@antmicro.com",
    "time": "Fri Jan 13 17:56:40 2023 +0100"
  },
  "message": "systemverilog-plugin: Skip visiting vpiPort, vpiInterface, vpiTaskFunc, vpiAssertion, vpiClockingBlock, vpiGenScopeArray in uhdmallmodules\n\nSigned-off-by: Magdalena Andrys \u003cmandrys@antmicro.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "ee19809750b15795506b1604cd92d8ca6e88b26d",
      "old_mode": 33188,
      "old_path": "systemverilog-plugin/UhdmAst.cc",
      "new_id": "9586f979f588988ba27572c1e0db3b6a37dfcdc2",
      "new_mode": 33188,
      "new_path": "systemverilog-plugin/UhdmAst.cc"
    }
  ]
}