)]}'
{
  "commit": "9d61b87365a8b3cb7f48010795c4a2742429d0c3",
  "tree": "e4964ccddd3f7cd5abab80651601675802fe6f43",
  "parents": [
    "f7ab627652510e420196b6e3521f8ad25aa1d2d2"
  ],
  "author": {
    "name": "Paweł Czarnecki",
    "email": "pczarnecki@antmicro.com",
    "time": "Fri Mar 04 13:35:28 2022 +0100"
  },
  "committer": {
    "name": "Paweł Czarnecki",
    "email": "pczarnecki@antmicro.com",
    "time": "Tue Mar 08 15:54:44 2022 +0100"
  },
  "message": "tests: introduce post synthesis simulation infrastructure\n\nSigned-off-by: Paweł Czarnecki \u003cpczarnecki@antmicro.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "db3cc3c1a0d3faab9a7a16007044722f307a439b",
      "old_mode": 33188,
      "old_path": "Makefile_test.common",
      "new_id": "ca6ec184789cb70e76a787e537f77459d7075866",
      "new_mode": 33188,
      "new_path": "Makefile_test.common"
    }
  ]
}