commit a3db13968c4267296f23ac177fc0c0545df63f0c
author Magdalena Andrys <mandrys@antmicro.com> Wed Jan 11 09:42:49 2023 +0100
committer Magdalena Andrys <mandrys@antmicro.com> Fri Jan 13 17:57:07 2023 +0100
tree 7c24b9102fb18d1f8dd109a1c6cf8d5f56e26f5e
parent 9a5ce724651f67ccc915668d9d3a52de36959c86

systemverilog-plugin: Visit vpiTaskFunc in module instance

Signed-off-by: Magdalena Andrys <mandrys@antmicro.com>

systemverilog-plugin/UhdmAst.cc

diff --git a/systemverilog-plugin/UhdmAst.cc b/systemverilog-plugin/UhdmAst.cc
index 9586f97..7939b24 100644
--- a/systemverilog-plugin/UhdmAst.cc
+++ b/systemverilog-plugin/UhdmAst.cc
@@ -1850,7 +1850,7 @@
                 add_or_replace_child(module_node, node);
             }
         });
-        visit_one_to_many({vpiInterface, vpiModule, vpiPort, vpiGenScopeArray, vpiContAssign}, obj_h, [&](AST::AstNode *node) {
+        visit_one_to_many({vpiInterface, vpiModule, vpiPort, vpiGenScopeArray, vpiContAssign, vpiTaskFunc}, obj_h, [&](AST::AstNode *node) {
             if (node) {
                 add_or_replace_child(module_node, node);
             }