tree 368d72e1733265398bc08a71dba0be57ec7538a3
parent a20c6a96d9fd4b8989940a6608501784e02e78b1
parent 67deb91dfd4e77f084102669db67d6d88d9d491a
author Kamil Rakoczy <krakoczy@antmicro.com> 1675861277 +0100
committer GitHub <noreply@github.com> 1675861277 +0100
gpgsig -----BEGIN PGP SIGNATURE-----
 
 wsBcBAABCAAQBQJj450dCRBK7hj4Ov3rIwAA+WIIABQzsyQBP8SXBxcMuu350l/E
 OHWn6UpJwBZt7qklovRVFrPxDptVED9QkM7oZZeh75KAOiHR0ggAXTLuWlxpa3RQ
 NKtjhDVHZyAaeVJ9PRdfMmTbqoj4+TqDBsF8+PHNCXt+0PlW3jtmW8BNZ+n9mkFM
 25pJwO5FPJxcY6n2gzCB/G//STvQt7QLT/lkKdQnsvGe49PiSFjHn/RfML4I771x
 EHP4whXYzmKTxOIQnAlC55jWaCId6D1wyS6y56mtzZ+g7elkCM9b74bQ24wGyzm7
 5Z3w/3HIfy3wselq2SD2P+tupde/qVWJ5PUwFwWpwiHvHywRKTcCFCEEq6ch8YU=
 =F0VW
 -----END PGP SIGNATURE-----
 

Merge pull request #450 from antmicro/kr/add_list_op

systemverilog: add support for list op with low and high bound