)]}'
{
  "commit": "a97dfc18e9966f31cb2bf607f77423d873d8ca7e",
  "tree": "ec49f631c7dfd6f221351331c41ba61d370039a8",
  "parents": [
    "3bfd4016e2a4bf32a37dac31ecae40e14e92474c",
    "c0a15d065f27b48086ddbb4d717e021e5d16f892"
  ],
  "author": {
    "name": "Kamil Rakoczy",
    "email": "krakoczy@antmicro.com",
    "time": "Wed Apr 05 13:25:01 2023 +0200"
  },
  "committer": {
    "name": "GitHub",
    "email": "noreply@github.com",
    "time": "Wed Apr 05 13:25:01 2023 +0200"
  },
  "message": "Merge pull request #470 from antmicro/kr/union_custom_type_multirange\n\nsystemverilog-plugin: add support for custom type with multiranges inside struct/union",
  "tree_diff": []
}