commit ac0439854ef47ddda9d9eab192e50b0c5b070151
author Samy <samy.charas@cpe.fr> Mon Jul 19 19:28:47 2021 +0200
committer Samy <samy.charas@cpe.fr> Fri Aug 20 08:15:04 2021 +0200
tree 6a09cc70e431b557b5c5ec67f92179a312d4b73b
parent e488b9812b10d4059782d14866c35ab87025e714

Typo in frac_lut6 module

Signed-off-by: Samy <samy.charas@cpe.fr>

ql-qlf-plugin/qlf_k6n10/cells_sim.v

diff --git a/ql-qlf-plugin/qlf_k6n10/cells_sim.v b/ql-qlf-plugin/qlf_k6n10/cells_sim.v
index 36872ce..ad22df3 100644
--- a/ql-qlf-plugin/qlf_k6n10/cells_sim.v
+++ b/ql-qlf-plugin/qlf_k6n10/cells_sim.v
@@ -63,7 +63,7 @@
     assign lut4_out[2] = s4[2];
     assign lut4_out[3] = s4[3];
 
-    assign lut5_out[0] = s0[0];
+    assign lut5_out[0] = s5[0];
     assign lut5_out[1] = s5[1];
 
     assign lut6_out = li[5] ? s5[0] : s5[1];
@@ -182,7 +182,7 @@
     (* invertible_pin = "IS_C_INVERTED" *)
     input C,
     input S,
-    input E,
+    input E
 );
     parameter [0:0] INIT = 1'b0;
     parameter [0:0] IS_C_INVERTED = 1'b0;