commit ae7a729cb4532c63f18390b321ceb3ceb069fe53
author Maciej Kurc <mkurc@antmicro.com> Fri Jul 29 12:10:59 2022 +0200
committer Maciej Kurc <mkurc@antmicro.com> Fri Jul 29 12:10:59 2022 +0200
tree 53f31cbfc7453bc58657cc9da1e9c9f215259957
parent e17b791fec4b83e8bebe263884d01947c42b21b7

Code formatting

Signed-off-by: Maciej Kurc <mkurc@antmicro.com>

ql-qlf-plugin/ql-dsp-io-regs.cc

diff --git a/ql-qlf-plugin/ql-dsp-io-regs.cc b/ql-qlf-plugin/ql-dsp-io-regs.cc
index 3ea2a12..b7e9117 100644
--- a/ql-qlf-plugin/ql-dsp-io-regs.cc
+++ b/ql-qlf-plugin/ql-dsp-io-regs.cc
@@ -85,9 +85,7 @@
 
                 // If the cell does not have the "is_inferred" attribute set
                 // then don't touch it.
-                if (!dsp->has_attribute(RTLIL::escape_id("is_inferred")) ||
-                     dsp->get_bool_attribute(RTLIL::escape_id("is_inferred")) == false)
-                {
+                if (!dsp->has_attribute(RTLIL::escape_id("is_inferred")) || dsp->get_bool_attribute(RTLIL::escape_id("is_inferred")) == false) {
                     continue;
                 }
 

ql-qlf-plugin/ql-dsp-simd.cc

diff --git a/ql-qlf-plugin/ql-dsp-simd.cc b/ql-qlf-plugin/ql-dsp-simd.cc
index dfa3e38..7893eb4 100644
--- a/ql-qlf-plugin/ql-dsp-simd.cc
+++ b/ql-qlf-plugin/ql-dsp-simd.cc
@@ -263,13 +263,12 @@
 
                     // Handle the "is_inferred" attribute. If one of the fragments
                     // is not inferred mark the whole DSP as not inferred
-                    bool is_inferred_a = dsp_a->has_attribute(RTLIL::escape_id("is_inferred")) ?
-                        dsp_a->get_bool_attribute(RTLIL::escape_id("is_inferred")) : false;
-                    bool is_inferred_b = dsp_b->has_attribute(RTLIL::escape_id("is_inferred")) ?
-                        dsp_b->get_bool_attribute(RTLIL::escape_id("is_inferred")) : false;
+                    bool is_inferred_a =
+                      dsp_a->has_attribute(RTLIL::escape_id("is_inferred")) ? dsp_a->get_bool_attribute(RTLIL::escape_id("is_inferred")) : false;
+                    bool is_inferred_b =
+                      dsp_b->has_attribute(RTLIL::escape_id("is_inferred")) ? dsp_b->get_bool_attribute(RTLIL::escape_id("is_inferred")) : false;
 
-                    simd->set_bool_attribute(RTLIL::escape_id("is_inferred"),
-                        is_inferred_a && is_inferred_b);
+                    simd->set_bool_attribute(RTLIL::escape_id("is_inferred"), is_inferred_a && is_inferred_b);
 
                     // Mark DSP parts for removal
                     cellsToRemove.push_back(dsp_a);