Merge pull request #252 from antmicro/k6n10f_dsp_macc

k6n10f dsp macc inference

ql-qlf-plugin/qlf_k6n10f/cells_sim.v

diff --git a/ql-qlf-plugin/qlf_k6n10f/cells_sim.v b/ql-qlf-plugin/qlf_k6n10f/cells_sim.v
index bdc484b..43b3ba2 100644
--- a/ql-qlf-plugin/qlf_k6n10f/cells_sim.v
+++ b/ql-qlf-plugin/qlf_k6n10f/cells_sim.v
@@ -109,7 +109,7 @@
     assign lut4_out[2] = s4[2];
     assign lut4_out[3] = s4[3];
 
-    assign lut5_out[0] = s0[0];
+    assign lut5_out[0] = s5[0];
     assign lut5_out[1] = s5[1];
 
     assign lut6_out = li[5] ? s5[0] : s5[1];
@@ -228,7 +228,7 @@
     (* invertible_pin = "IS_C_INVERTED" *)
     input C,
     input S,
-    input E,
+    input E
 );
     parameter [0:0] INIT = 1'b0;
     parameter [0:0] IS_C_INVERTED = 1'b0;

uhdm-plugin/UhdmAst.cc

diff --git a/uhdm-plugin/UhdmAst.cc b/uhdm-plugin/UhdmAst.cc
index 4e3cd7d..1d88f21 100644
--- a/uhdm-plugin/UhdmAst.cc
+++ b/uhdm-plugin/UhdmAst.cc
@@ -1086,15 +1086,28 @@
         // so we are treating here UInt in the same way as if they would be Int
         case vpiUIntVal:
         case vpiIntVal: {
-            auto size = vpi_get(vpiSize, obj_h);
+            int size = -1;
+            bool is_signed = false;
+            // Surelog sometimes report size as part of vpiTypespec (e.g. int_typespec)
+            // if it is the case, we need to set size to the left_range of first packed range
+            visit_one_to_one({vpiTypespec}, obj_h, [&](AST::AstNode *node) {
+                if (node && node->attributes.count(UhdmAst::packed_ranges()) && node->attributes[UhdmAst::packed_ranges()]->children.size() &&
+                    node->attributes[UhdmAst::packed_ranges()]->children[0]->children.size()) {
+                    size = node->attributes[UhdmAst::packed_ranges()]->children[0]->children[0]->integer + 1;
+                }
+            });
+            if (size == -1) {
+                size = vpi_get(vpiSize, obj_h);
+            }
             // Surelog by default returns 64 bit numbers and stardard says that they shall be at least 32bits
             // yosys is assuming that int/uint is 32 bit, so we are setting here correct size
             // NOTE: it *shouldn't* break on explicite 64 bit const values, as they *should* be handled
             // above by vpi*StrVal
             if (size == 64) {
                 size = 32;
+                is_signed = true;
             }
-            auto c = AST::AstNode::mkconst_int(val.value.integer, true, size > 0 ? size : 32);
+            auto c = AST::AstNode::mkconst_int(val.value.integer, is_signed, size > 0 ? size : 32);
             if (size == 0 || size == -1)
                 c->is_unsized = true;
             return c;
@@ -1204,6 +1217,12 @@
                     child->attributes[UhdmAst::unpacked_ranges()] = (*it)->attributes[UhdmAst::unpacked_ranges()]->clone();
                 }
             }
+            // Surelog doesn't report correct sign value for param_assign nodes
+            // and only default vpiParameter node have correct sign value, so
+            // if we are overriding parameter, copy sign value from current node to the new node
+            if (((*it)->type == AST::AST_PARAMETER || (*it)->type == AST::AST_LOCALPARAM) && child->children.size() && (*it)->children.size()) {
+                child->children[0]->is_signed = (*it)->children[0]->is_signed;
+            }
             delete *it;
             *it = child;
             return;