)]}'
{
  "commit": "be4dd83f6ab8349789b1d3257a126893c6f29c46",
  "tree": "80e1c6cf87ccf03c442c117025ce61c6ac7adee6",
  "parents": [
    "75df29e1c68353d9c9b5b3db7f4748e057d3d6a1"
  ],
  "author": {
    "name": "Rafal Kapuscik",
    "email": "rkapuscik@antmicro.com",
    "time": "Fri Jun 24 15:33:06 2022 +0200"
  },
  "committer": {
    "name": "Rafal Kapuscik",
    "email": "rkapuscik@antmicro.com",
    "time": "Wed Jun 29 15:05:31 2022 +0200"
  },
  "message": "Use AST_TO_UNSIGNED for shift operations\n\nThis mimics the way Yosys creates the AST.\n\nSigned-off-by: Rafal Kapuscik \u003crkapuscik@antmicro.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "7f1d2b32d20d92f819ad1195bbcf9eb52837d6db",
      "old_mode": 33188,
      "old_path": "systemverilog-plugin/UhdmAst.cc",
      "new_id": "4d13e133b610e0e8b5cd0e7706a5dc6f02fec0ef",
      "new_mode": 33188,
      "new_path": "systemverilog-plugin/UhdmAst.cc"
    }
  ]
}