)]}'
{
  "commit": "c8f377ff7e19c59921657cbb9bcbabc3e987cf10",
  "tree": "6a3c1f756e383dfe1b3c9d93071b89aac9312939",
  "parents": [
    "f83590cded7f4b1ca80df6f4058b959aa05de34e"
  ],
  "author": {
    "name": "Magdalena Andrys",
    "email": "mandrys@antmicro.com",
    "time": "Wed Nov 02 10:29:45 2022 +0000"
  },
  "committer": {
    "name": "Magdalena Andrys",
    "email": "mandrys@antmicro.com",
    "time": "Wed Nov 02 10:29:45 2022 +0000"
  },
  "message": "process_assignment: Pass \u0027object\u0027 arg to the func\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "1f44974ce2915b2b1b956efe670bba9b14f6465c",
      "old_mode": 33188,
      "old_path": "systemverilog-plugin/UhdmAst.cc",
      "new_id": "1ca30eb0338c05a9f7a832fa2e1c39f414855ff6",
      "new_mode": 33188,
      "new_path": "systemverilog-plugin/UhdmAst.cc"
    },
    {
      "type": "modify",
      "old_id": "b7877a61e173cc0d302b67b0e1e61f12443ed92e",
      "old_mode": 33188,
      "old_path": "systemverilog-plugin/UhdmAst.h",
      "new_id": "0d41f149d105963e70e27f8414fd433a23936920",
      "new_mode": 33188,
      "new_path": "systemverilog-plugin/UhdmAst.h"
    }
  ]
}