tree 5e7f3f2bdb680f6105c6e567fc74cc97ab38b9fd
parent 652f82d692b6353ecd4357b27426400eda37c7a8
parent 8e5d56f222cd4ebcf2fe61232056233275ad36cb
author Kamil Rakoczy <krakoczy@antmicro.com> 1680597010 +0200
committer GitHub <noreply@github.com> 1680597010 +0200
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Merge pull request #473 from antmicro/kr/fix_func

systemverilog-plugin: fix assignments on declaration