)]}'
{
  "commit": "cda9f8420c767d812626777e0ce56ccea2f4d291",
  "tree": "127ed2f15556732973a1a6252bdc38424e4403ea",
  "parents": [
    "08515814d11aea675cbc91fbb4c8380e1a703683"
  ],
  "author": {
    "name": "Paweł Czarnecki",
    "email": "pczarnecki@antmicro.com",
    "time": "Fri Feb 25 10:59:34 2022 +0100"
  },
  "committer": {
    "name": "Paweł Czarnecki",
    "email": "pczarnecki@antmicro.com",
    "time": "Wed Mar 02 12:35:49 2022 +0100"
  },
  "message": "ql-qlf: qlf_k6n10f: dsp: mult_r: connect clock input\n\nSigned-off-by: Paweł Czarnecki \u003cpczarnecki@antmicro.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "65e1b9619a739821d6d990f06782b2c76bc26c61",
      "old_mode": 33188,
      "old_path": "ql-qlf-plugin/tests/qlf_k6n10f/sim_dsp_mult_r/sim_dsp_mult_r.v",
      "new_id": "0f64dd78b2e45ee62f5b4e5da0265f32c7a1bd0f",
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      "new_path": "ql-qlf-plugin/tests/qlf_k6n10f/sim_dsp_mult_r/sim_dsp_mult_r.v"
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}
