)]}'
{
  "commit": "d852e75feff795ce4de9e207ff08055cbc0212c3",
  "tree": "524733a8365d2557d64cf2df3679a1a7520431de",
  "parents": [
    "bbca3dd822ec81a0ee06d39aa77d9523577c4ebf",
    "da3737425482161e61f0c9f9de620ed04beb483c"
  ],
  "author": {
    "name": "Kamil Rakoczy",
    "email": "krakoczy@antmicro.com",
    "time": "Mon May 15 09:19:58 2023 +0200"
  },
  "committer": {
    "name": "GitHub",
    "email": "noreply@github.com",
    "time": "Mon May 15 09:19:58 2023 +0200"
  },
  "message": "Merge pull request #509 from antmicro/kr/add_anonymous_enum_vars\n\nsystemverilog-plugin: add support for multiple variables declared in anonymous enum var",
  "tree_diff": []
}