Merge pull request #394 from antmicro/bitwise-nand-nor
systemverilog: Support binary bitwise NAND and NOR
diff --git a/systemverilog-plugin/UhdmAst.cc b/systemverilog-plugin/UhdmAst.cc
index 6790fe9..73902f1 100644
--- a/systemverilog-plugin/UhdmAst.cc
+++ b/systemverilog-plugin/UhdmAst.cc
@@ -2709,14 +2709,26 @@
current_node->type = AST::AST_REDUCE_XNOR;
break;
case vpiUnaryNandOp: {
- current_node->type = AST::AST_REDUCE_AND;
- auto not_node = new AST::AstNode(AST::AST_LOGIC_NOT, current_node);
+ auto not_node = new AST::AstNode(AST::AST_NONE, current_node);
+ if (current_node->children.size() == 2) {
+ current_node->type = AST::AST_BIT_AND;
+ not_node->type = AST::AST_BIT_NOT;
+ } else {
+ current_node->type = AST::AST_REDUCE_AND;
+ not_node->type = AST::AST_LOGIC_NOT;
+ }
current_node = not_node;
break;
}
case vpiUnaryNorOp: {
- current_node->type = AST::AST_REDUCE_OR;
- auto not_node = new AST::AstNode(AST::AST_LOGIC_NOT, current_node);
+ auto not_node = new AST::AstNode(AST::AST_NONE, current_node);
+ if (current_node->children.size() == 2) {
+ current_node->type = AST::AST_BIT_OR;
+ not_node->type = AST::AST_BIT_NOT;
+ } else {
+ current_node->type = AST::AST_REDUCE_OR;
+ not_node->type = AST::AST_LOGIC_NOT;
+ }
current_node = not_node;
break;
}
