systemverilog-plugin: Add simplify.h
Signed-off-by: Magdalena Andrys <mandrys@antmicro.com>
diff --git a/systemverilog-plugin/third_party/yosys/simplify.h b/systemverilog-plugin/third_party/yosys/simplify.h
new file mode 100644
index 0000000..5620ab9
--- /dev/null
+++ b/systemverilog-plugin/third_party/yosys/simplify.h
@@ -0,0 +1,6 @@
+#include "frontends/ast/ast.h"
+
+namespace systemverilog_plugin
+{
+ bool simplify(Yosys::AST::AstNode *ast_node, bool const_fold, bool at_zero, bool in_lvalue, int stage, int width_hint, bool sign_hint, bool in_param);
+}
