)]}'
{
  "commit": "fb94f804e008fb00103b120ed6d755e3836408b7",
  "tree": "dd610d7f3b15edf592e7fd8ef100c96fca826ca0",
  "parents": [
    "5c7d58ae6332c5cba312bccfaaf04b204570f157",
    "3494b2b1ba02a319dd74aee87998bc3e0d328819"
  ],
  "author": {
    "name": "Tomasz Gorochowik",
    "email": "tgorochowik@antmicro.com",
    "time": "Wed Mar 16 15:21:35 2022 +0100"
  },
  "committer": {
    "name": "GitHub",
    "email": "noreply@github.com",
    "time": "Wed Mar 16 15:21:35 2022 +0100"
  },
  "message": "Merge pull request #270 from antmicro/read_systemverilog_alias\n\nAdd \u0027read_systemverilog\u0027 command",
  "tree_diff": []
}