| # Routing Mux Bits |
| .mux W1_JDIB |
| W1_INDDB_SIOLOGIC F21B0 |
| |
| |
| # Non-Routing Configuration |
| .config IOLOGICB.DELAY.DEL_VALUE 0000000 |
| F10B0 |
| F9B0 |
| F8B0 |
| F7B0 |
| F6B0 |
| F5B0 |
| F4B0 |
| |
| .config_enum IOLOGICB.CEIMUX CEMUX |
| 1 F64B0 |
| CEMUX - |
| |
| .config_enum IOLOGICB.CEMUX INV |
| CE F3B0 |
| INV - |
| |
| .config_enum IOLOGICB.CEOMUX CEMUX |
| 1 F41B0 |
| CEMUX - |
| |
| .config_enum IOLOGICB.CLKIMUX 0 |
| 0 - |
| CLK F19B0 |
| INV F19B0 F20B0 |
| |
| .config_enum IOLOGICB.CLKOMUX 0 |
| 0 - |
| CLK F42B0 |
| INV F42B0 F43B0 |
| |
| .config_enum IOLOGICB.DELAY.OUTDEL DISABLED |
| DISABLED - |
| ENABLED F44B0 |
| |
| .config_enum IOLOGICB.DELAY.WAIT_FOR_EDGE DISABLED |
| DISABLED - |
| ENABLED F39B0 |
| |
| .config_enum IOLOGICB.FF.INREGMODE FF |
| FF - |
| LATCH F31B0 |
| |
| .config_enum IOLOGICB.FF.REGSET RESET |
| RESET - |
| SET F17B0 |
| |
| .config_enum IOLOGICB.GSR ENABLED |
| DISABLED F12B0 |
| ENABLED - |
| |
| .config_enum IOLOGICB.LOADNMUX 1 |
| 1 - |
| LOADN F37B0 |
| |
| .config_enum IOLOGICB.LSRIMUX 0 |
| 0 - |
| LSRMUX F22B0 |
| |
| .config_enum IOLOGICB.LSRMUX INV |
| INV - |
| LSR F32B0 |
| |
| .config_enum IOLOGICB.LSROMUX 0 |
| 0 - |
| LSRMUX F45B0 |
| |
| .config_enum IOLOGICB.MODE IREG_OREG |
| IDDRX1_ODDRX1 F26B0 F41B0 F64B0 |
| IREG_OREG - |
| NONE - |
| |
| .config_enum IOLOGICB.OUTREG.OUTREGMODE FF |
| FF - |
| LATCH F68B0 |
| |
| .config_enum IOLOGICB.OUTREG.REGSET RESET |
| RESET - |
| SET F40B0 |
| |
| .config_enum IOLOGICB.SRMODE ASYNC |
| ASYNC - |
| LSR_OVER_CE F2B0 |
| |
| .config_enum IOLOGICB.TSREG.OUTREGMODE FF |
| FF - |
| LATCH F67B0 |
| |
| .config_enum IOLOGICB.TSREG.REGSET RESET |
| RESET - |
| SET F56B0 |
| |
| .config_enum PIOB.BASE_TYPE NONE |
| BIDIR_LVCMOS12 F0B1 F2B1 F7B1 F54B0 F55B0 |
| BIDIR_LVCMOS15 F5B1 F23B1 F54B0 F55B0 |
| BIDIR_LVCMOS18 F7B1 F54B0 F55B0 |
| BIDIR_LVCMOS25 F0B1 F1B1 F7B1 F11B1 F54B0 F55B0 |
| BIDIR_LVCMOS33 F0B1 F1B1 F2B1 F7B1 F11B1 F12B1 F13B1 F14B1 F54B0 F55B0 |
| BIDIR_LVTTL33 F0B1 F1B1 F2B1 F7B1 F11B1 F12B1 F13B1 F14B1 F54B0 F55B0 |
| INPUT_LVCMOS12 F0B1 F2B1 F7B1 |
| INPUT_LVCMOS15 F7B1 |
| INPUT_LVCMOS18 F7B1 |
| INPUT_LVCMOS25 F0B1 F1B1 F7B1 F11B1 |
| INPUT_LVCMOS33 F0B1 F1B1 F2B1 F7B1 F11B1 |
| INPUT_LVTTL33 F0B1 F1B1 F2B1 F7B1 F11B1 |
| NONE - |
| OUTPUT_LVCMOS12 F5B1 F7B1 F54B0 F55B0 |
| OUTPUT_LVCMOS15 F5B1 F7B1 F54B0 F55B0 |
| OUTPUT_LVCMOS18 F5B1 F7B1 F54B0 F55B0 |
| OUTPUT_LVCMOS25 F5B1 F7B1 F54B0 F55B0 |
| OUTPUT_LVCMOS33 F5B1 F7B1 F12B1 F13B1 F14B1 F54B0 F55B0 |
| OUTPUT_LVTTL33 F5B1 F7B1 F12B1 F13B1 F14B1 F54B0 F55B0 |
| |
| .config_enum PIOB.DATAMUX_ODDR PADDO |
| IOLDO F50B0 |
| PADDO - |
| |
| .config_enum PIOB.DATAMUX_OREG PADDO |
| IOLDO F51B0 |
| PADDO - |
| |
| .config_enum PIOB.DRIVE |
| 12 !F12B1 !F13B1 !F14B1 F15B1 !F16B1 |
| 16 F12B1 F13B1 F14B1 F15B1 !F16B1 |
| 4 !F12B1 !F13B1 F14B1 F15B1 F16B1 |
| 8 F12B1 F13B1 F14B1 !F15B1 !F16B1 |
| |
| .config_enum PIOB.HYSTERESIS OFF |
| OFF !F11B1 |
| ON F11B1 |
| |
| .config_enum PIOB.OPENDRAIN |
| OFF F7B1 F12B1 F13B1 F14B1 !F23B1 |
| ON !F7B1 !F12B1 !F13B1 !F14B1 F23B1 |
| |
| .config_enum PIOB.PULLMODE DOWN |
| DOWN !F5B1 !F6B1 |
| NONE F5B1 !F6B1 |
| UP F5B1 F6B1 |
| |
| .config_enum PIOB.SLEWRATE SLOW |
| FAST F22B1 |
| SLOW !F22B1 |
| |
| .config_enum PIOB.TRIMUX_TSREG PADDT |
| IOLTO F59B0 |
| PADDT - |
| |
| |
| # Fixed Connections |
