| # Routing Mux Bits |
| .mux W5_CH1_RX_REFCLK |
| W5_JCH1RXREFCLKCIB F12B1 |
| |
| |
| # Non-Routing Configuration |
| .config DCU.CH1_DCOATDCFG 00 |
| F103B1 |
| F104B1 |
| |
| .config DCU.CH1_DCOATDDLY 00 |
| F101B1 |
| F102B1 |
| |
| .config DCU.CH1_DCOBYPSATD 0 |
| F105B1 |
| |
| .config DCU.CH1_DCOCTLGI 000 |
| F98B1 |
| F99B1 |
| F100B1 |
| |
| .config DCU.CH1_FF_RX_F_CLK_DIS 0 |
| F84B1 |
| |
| .config DCU.CH1_FF_RX_H_CLK_EN 0 |
| F83B1 |
| |
| .config DCU.CH1_FF_TX_F_CLK_DIS 0 |
| F86B1 |
| |
| .config DCU.CH1_FF_TX_H_CLK_EN 0 |
| F85B1 |
| |
| .config DCU.CH1_LDR_RX2CORE_SEL 0 |
| F11B1 |
| |
| .config DCU.CH1_LEQ_OFFSET_SEL 0 |
| F24B1 |
| |
| .config DCU.CH1_LEQ_OFFSET_TRIM 000 |
| F25B1 |
| F26B1 |
| F27B1 |
| |
| .config DCU.CH1_PDEN_SEL 0 |
| F43B1 |
| |
| .config DCU.CH1_RATE_MODE_RX 0 |
| F9B1 |
| |
| .config DCU.CH1_RCV_DCC_EN 0 |
| F13B1 |
| |
| .config DCU.CH1_REQ_EN 0 |
| F32B1 |
| |
| .config DCU.CH1_REQ_LVL_SET 00 |
| F37B1 |
| F38B1 |
| |
| .config DCU.CH1_RLOS_SEL 0 |
| F57B1 |
| |
| .config DCU.CH1_RPWDNB 0 |
| F8B1 |
| |
| .config DCU.CH1_RTERM_RX 00000 |
| F16B1 |
| F17B1 |
| F18B1 |
| F19B1 |
| F20B1 |
| |
| .config DCU.CH1_RXIN_CM 00 |
| F22B1 |
| F23B1 |
| |
| .config DCU.CH1_RXTERM_CM 00 |
| F14B1 |
| F15B1 |
| |
| .config DCU.CH1_RX_DCO_CK_DIV 000 |
| F40B1 |
| F41B1 |
| F42B1 |
| |
| .config DCU.CH1_RX_DIV11_SEL 0 |
| F10B1 |
| |
| .config DCU.CH1_RX_LOS_CEQ 00 |
| F51B1 |
| F54B1 |
| |
| .config DCU.CH1_RX_LOS_EN 0 |
| F56B1 |
| |
| .config DCU.CH1_RX_LOS_HYST_EN 0 |
| F55B1 |
| |
| .config DCU.CH1_RX_LOS_LVL 000 |
| F48B1 |
| F49B1 |
| F50B1 |
| |
| .config DCU.CH1_RX_RATE_SEL 0000 |
| F33B1 |
| F34B1 |
| F35B1 |
| F36B1 |
| |
| .config DCU.CH1_SEL_SD_RX_CLK 0 |
| F82B1 |
| |
| .config DCU.CH1_TDRV_DAT_SEL 00 |
| F4B1 |
| F5B1 |
| |
| .config DCU.CH1_TDRV_SLICE5_CUR 00 |
| F6B1 |
| F7B1 |
| |
| .config_enum DCU.MODE NONE |
| DCUA F46B1 F47B1 |
| NONE - |
| |
| |
| # Fixed Connections |
