| { |
| "DP16KD:REGMODE_A=NOREG,REGMODE_B=NOREG": [ |
| { |
| "clock": [ |
| "negedge", |
| "CLKA" |
| ], |
| "type": "Width", |
| "width": [ |
| 1967, |
| 1967, |
| 1967 |
| ] |
| }, |
| { |
| "clock": [ |
| "negedge", |
| "CLKB" |
| ], |
| "type": "Width", |
| "width": [ |
| 1967, |
| 1967, |
| 1967 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "OCEA", |
| "setup": [ |
| 207, |
| 207, |
| 207 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "RSTA", |
| "setup": [ |
| 511, |
| 511, |
| 511 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 178, |
| 178, |
| 178 |
| ], |
| "pin": "CSA0", |
| "setup": [ |
| 24, |
| 24, |
| 24 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 178, |
| 178, |
| 178 |
| ], |
| "pin": "CSA1", |
| "setup": [ |
| 24, |
| 24, |
| 24 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 178, |
| 178, |
| 178 |
| ], |
| "pin": "CSA2", |
| "setup": [ |
| 24, |
| 24, |
| 24 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA0", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA1", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA10", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA11", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA12", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA13", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA14", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA15", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA16", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA17", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA2", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA3", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA4", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA5", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA6", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA7", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA8", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA9", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA0", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA1", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA10", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA11", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA12", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA13", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA2", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA3", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA4", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA5", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA6", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA7", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA8", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA9", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 61, |
| 61, |
| 61 |
| ], |
| "pin": "CEA", |
| "setup": [ |
| 184, |
| 184, |
| 184 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 95, |
| 95, |
| 95 |
| ], |
| "pin": "WEA", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "type": "Width", |
| "width": [ |
| 1967, |
| 1967, |
| 1967 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "OCEB", |
| "setup": [ |
| 225, |
| 225, |
| 225 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "RSTB", |
| "setup": [ |
| 518, |
| 518, |
| 518 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB0", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB1", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB10", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB11", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB12", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB13", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB14", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB15", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB16", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB17", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB2", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB3", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB4", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB5", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB6", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB7", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB8", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB9", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 350, |
| 350, |
| 350 |
| ], |
| "pin": "CSB0", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 350, |
| 350, |
| 350 |
| ], |
| "pin": "CSB1", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 350, |
| 350, |
| 350 |
| ], |
| "pin": "CSB2", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 357, |
| 357, |
| 357 |
| ], |
| "pin": "WEB", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 65, |
| 65, |
| 65 |
| ], |
| "pin": "CEB", |
| "setup": [ |
| 298, |
| 298, |
| 298 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB0", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB1", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB10", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB11", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB12", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB13", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB2", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB3", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB4", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB5", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB6", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB7", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB8", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB9", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "type": "Width", |
| "width": [ |
| 1967, |
| 1967, |
| 1967 |
| ] |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA10", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA11", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA12", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA13", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA14", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA15", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA16", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA17", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA2", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA3", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA4", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA5", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA6", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA7", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA8", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA9", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "to_pin": "DOB0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "to_pin": "DOB1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "to_pin": "DOB10", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "to_pin": "DOB11", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "to_pin": "DOB12", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "to_pin": "DOB13", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "to_pin": "DOB14", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "to_pin": "DOB15", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "to_pin": "DOB16", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "to_pin": "DOB17", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "to_pin": "DOB2", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "to_pin": "DOB3", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "to_pin": "DOB4", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "to_pin": "DOB5", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "to_pin": "DOB6", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "to_pin": "DOB7", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "to_pin": "DOB8", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "to_pin": "DOB9", |
| "type": "IOPath" |
| } |
| ], |
| "DP16KD:REGMODE_A=NOREG,REGMODE_B=OUTREG": [ |
| { |
| "clock": [ |
| "negedge", |
| "CLKA" |
| ], |
| "type": "Width", |
| "width": [ |
| 1967, |
| 1967, |
| 1967 |
| ] |
| }, |
| { |
| "clock": [ |
| "negedge", |
| "CLKB" |
| ], |
| "type": "Width", |
| "width": [ |
| 1967, |
| 1967, |
| 1967 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "OCEA", |
| "setup": [ |
| 207, |
| 207, |
| 207 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "RSTA", |
| "setup": [ |
| 511, |
| 511, |
| 511 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 178, |
| 178, |
| 178 |
| ], |
| "pin": "CSA0", |
| "setup": [ |
| 24, |
| 24, |
| 24 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 178, |
| 178, |
| 178 |
| ], |
| "pin": "CSA1", |
| "setup": [ |
| 24, |
| 24, |
| 24 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 178, |
| 178, |
| 178 |
| ], |
| "pin": "CSA2", |
| "setup": [ |
| 24, |
| 24, |
| 24 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA0", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA1", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA10", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA11", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA12", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA13", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA14", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA15", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA16", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA17", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA2", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA3", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA4", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA5", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA6", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA7", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA8", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA9", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA0", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA1", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA10", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA11", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA12", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA13", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA2", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA3", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA4", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA5", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA6", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA7", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA8", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA9", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 61, |
| 61, |
| 61 |
| ], |
| "pin": "CEA", |
| "setup": [ |
| 184, |
| 184, |
| 184 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 95, |
| 95, |
| 95 |
| ], |
| "pin": "WEA", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "type": "Width", |
| "width": [ |
| 1967, |
| 1967, |
| 1967 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "OCEB", |
| "setup": [ |
| 225, |
| 225, |
| 225 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "RSTB", |
| "setup": [ |
| 517, |
| 517, |
| 517 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB0", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB1", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB10", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB11", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB12", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB13", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB14", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB15", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB16", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB17", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB2", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB3", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB4", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB5", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB6", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB7", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB8", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB9", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 350, |
| 350, |
| 350 |
| ], |
| "pin": "CSB0", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 350, |
| 350, |
| 350 |
| ], |
| "pin": "CSB1", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 350, |
| 350, |
| 350 |
| ], |
| "pin": "CSB2", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 357, |
| 357, |
| 357 |
| ], |
| "pin": "WEB", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 65, |
| 65, |
| 65 |
| ], |
| "pin": "CEB", |
| "setup": [ |
| 298, |
| 298, |
| 298 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB0", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB1", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB10", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB11", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB12", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB13", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB2", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB3", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB4", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB5", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB6", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB7", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB8", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB9", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "type": "Width", |
| "width": [ |
| 1967, |
| 1967, |
| 1967 |
| ] |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA10", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA11", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA12", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA13", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA14", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA15", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA16", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA17", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA2", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA3", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA4", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA5", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA6", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA7", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA8", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA9", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 781, |
| 809, |
| 837 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 781, |
| 809, |
| 837 |
| ], |
| "to_pin": "DOB0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 781, |
| 809, |
| 837 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 781, |
| 809, |
| 837 |
| ], |
| "to_pin": "DOB1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 781, |
| 809, |
| 837 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 781, |
| 809, |
| 837 |
| ], |
| "to_pin": "DOB10", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 781, |
| 809, |
| 837 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 781, |
| 809, |
| 837 |
| ], |
| "to_pin": "DOB11", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 781, |
| 809, |
| 837 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 781, |
| 809, |
| 837 |
| ], |
| "to_pin": "DOB12", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 781, |
| 809, |
| 837 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 781, |
| 809, |
| 837 |
| ], |
| "to_pin": "DOB13", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 781, |
| 809, |
| 837 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 781, |
| 809, |
| 837 |
| ], |
| "to_pin": "DOB14", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 781, |
| 809, |
| 837 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 781, |
| 809, |
| 837 |
| ], |
| "to_pin": "DOB15", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 781, |
| 809, |
| 837 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 781, |
| 809, |
| 837 |
| ], |
| "to_pin": "DOB16", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 781, |
| 809, |
| 837 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 781, |
| 809, |
| 837 |
| ], |
| "to_pin": "DOB17", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 781, |
| 809, |
| 837 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 781, |
| 809, |
| 837 |
| ], |
| "to_pin": "DOB2", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 781, |
| 809, |
| 837 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 781, |
| 809, |
| 837 |
| ], |
| "to_pin": "DOB3", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 781, |
| 809, |
| 837 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 781, |
| 809, |
| 837 |
| ], |
| "to_pin": "DOB4", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 781, |
| 809, |
| 837 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 781, |
| 809, |
| 837 |
| ], |
| "to_pin": "DOB5", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 781, |
| 809, |
| 837 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 781, |
| 809, |
| 837 |
| ], |
| "to_pin": "DOB6", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 781, |
| 809, |
| 837 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 781, |
| 809, |
| 837 |
| ], |
| "to_pin": "DOB7", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 781, |
| 809, |
| 837 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 781, |
| 809, |
| 837 |
| ], |
| "to_pin": "DOB8", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 781, |
| 809, |
| 837 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 781, |
| 809, |
| 837 |
| ], |
| "to_pin": "DOB9", |
| "type": "IOPath" |
| } |
| ], |
| "DP16KD:REGMODE_A=OUTREG,REGMODE_B=NOREG": [ |
| { |
| "clock": [ |
| "negedge", |
| "CLKA" |
| ], |
| "type": "Width", |
| "width": [ |
| 1967, |
| 1967, |
| 1967 |
| ] |
| }, |
| { |
| "clock": [ |
| "negedge", |
| "CLKB" |
| ], |
| "type": "Width", |
| "width": [ |
| 1967, |
| 1967, |
| 1967 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "OCEA", |
| "setup": [ |
| 207, |
| 207, |
| 207 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "RSTA", |
| "setup": [ |
| 510, |
| 510, |
| 510 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 178, |
| 178, |
| 178 |
| ], |
| "pin": "CSA0", |
| "setup": [ |
| 24, |
| 24, |
| 24 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 178, |
| 178, |
| 178 |
| ], |
| "pin": "CSA1", |
| "setup": [ |
| 24, |
| 24, |
| 24 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 178, |
| 178, |
| 178 |
| ], |
| "pin": "CSA2", |
| "setup": [ |
| 24, |
| 24, |
| 24 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA0", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA1", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA10", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA11", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA12", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA13", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA14", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA15", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA16", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA17", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA2", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA3", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA4", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA5", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA6", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA7", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA8", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA9", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA0", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA1", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA10", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA11", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA12", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA13", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA2", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA3", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA4", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA5", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA6", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA7", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA8", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA9", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 61, |
| 61, |
| 61 |
| ], |
| "pin": "CEA", |
| "setup": [ |
| 184, |
| 184, |
| 184 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 95, |
| 95, |
| 95 |
| ], |
| "pin": "WEA", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "type": "Width", |
| "width": [ |
| 1967, |
| 1967, |
| 1967 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "OCEB", |
| "setup": [ |
| 225, |
| 225, |
| 225 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "RSTB", |
| "setup": [ |
| 518, |
| 518, |
| 518 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB0", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB1", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB10", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB11", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB12", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB13", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB14", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB15", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB16", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB17", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB2", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB3", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB4", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB5", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB6", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB7", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB8", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB9", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 350, |
| 350, |
| 350 |
| ], |
| "pin": "CSB0", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 350, |
| 350, |
| 350 |
| ], |
| "pin": "CSB1", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 350, |
| 350, |
| 350 |
| ], |
| "pin": "CSB2", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 357, |
| 357, |
| 357 |
| ], |
| "pin": "WEB", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 65, |
| 65, |
| 65 |
| ], |
| "pin": "CEB", |
| "setup": [ |
| 298, |
| 298, |
| 298 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB0", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB1", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB10", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB11", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB12", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB13", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB2", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB3", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB4", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB5", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB6", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB7", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB8", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB9", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "type": "Width", |
| "width": [ |
| 1967, |
| 1967, |
| 1967 |
| ] |
| }, |
| { |
| "falling": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "to_pin": "DOB0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "to_pin": "DOB1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "to_pin": "DOB10", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "to_pin": "DOB11", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "to_pin": "DOB12", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "to_pin": "DOB13", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "to_pin": "DOB14", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "to_pin": "DOB15", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "to_pin": "DOB16", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "to_pin": "DOB17", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "to_pin": "DOB2", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "to_pin": "DOB3", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "to_pin": "DOB4", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "to_pin": "DOB5", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "to_pin": "DOB6", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "to_pin": "DOB7", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "to_pin": "DOB8", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "to_pin": "DOB9", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 800, |
| 828, |
| 856 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 800, |
| 828, |
| 856 |
| ], |
| "to_pin": "DOA0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 800, |
| 828, |
| 856 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 800, |
| 828, |
| 856 |
| ], |
| "to_pin": "DOA1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 800, |
| 828, |
| 856 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 800, |
| 828, |
| 856 |
| ], |
| "to_pin": "DOA10", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 800, |
| 828, |
| 856 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 800, |
| 828, |
| 856 |
| ], |
| "to_pin": "DOA11", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 800, |
| 828, |
| 856 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 800, |
| 828, |
| 856 |
| ], |
| "to_pin": "DOA12", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 800, |
| 828, |
| 856 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 800, |
| 828, |
| 856 |
| ], |
| "to_pin": "DOA13", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 800, |
| 828, |
| 856 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 800, |
| 828, |
| 856 |
| ], |
| "to_pin": "DOA14", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 800, |
| 828, |
| 856 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 800, |
| 828, |
| 856 |
| ], |
| "to_pin": "DOA15", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 800, |
| 828, |
| 856 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 800, |
| 828, |
| 856 |
| ], |
| "to_pin": "DOA16", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 800, |
| 828, |
| 856 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 800, |
| 828, |
| 856 |
| ], |
| "to_pin": "DOA17", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 800, |
| 828, |
| 856 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 800, |
| 828, |
| 856 |
| ], |
| "to_pin": "DOA2", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 800, |
| 828, |
| 856 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 800, |
| 828, |
| 856 |
| ], |
| "to_pin": "DOA3", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 800, |
| 828, |
| 856 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 800, |
| 828, |
| 856 |
| ], |
| "to_pin": "DOA4", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 800, |
| 828, |
| 856 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 800, |
| 828, |
| 856 |
| ], |
| "to_pin": "DOA5", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 800, |
| 828, |
| 856 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 800, |
| 828, |
| 856 |
| ], |
| "to_pin": "DOA6", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 800, |
| 828, |
| 856 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 800, |
| 828, |
| 856 |
| ], |
| "to_pin": "DOA7", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 800, |
| 828, |
| 856 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 800, |
| 828, |
| 856 |
| ], |
| "to_pin": "DOA8", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 800, |
| 828, |
| 856 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 800, |
| 828, |
| 856 |
| ], |
| "to_pin": "DOA9", |
| "type": "IOPath" |
| } |
| ], |
| "DP16KD:REGMODE_A=OUTREG,REGMODE_B=OUTREG": [ |
| { |
| "clock": [ |
| "negedge", |
| "CLKA" |
| ], |
| "type": "Width", |
| "width": [ |
| 1967, |
| 1967, |
| 1967 |
| ] |
| }, |
| { |
| "clock": [ |
| "negedge", |
| "CLKB" |
| ], |
| "type": "Width", |
| "width": [ |
| 1967, |
| 1967, |
| 1967 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "OCEA", |
| "setup": [ |
| 207, |
| 207, |
| 207 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "RSTA", |
| "setup": [ |
| 510, |
| 510, |
| 510 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 178, |
| 178, |
| 178 |
| ], |
| "pin": "CSA0", |
| "setup": [ |
| 24, |
| 24, |
| 24 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 178, |
| 178, |
| 178 |
| ], |
| "pin": "CSA1", |
| "setup": [ |
| 24, |
| 24, |
| 24 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 178, |
| 178, |
| 178 |
| ], |
| "pin": "CSA2", |
| "setup": [ |
| 24, |
| 24, |
| 24 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA0", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA1", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA10", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA11", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA12", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA13", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA14", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA15", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA16", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA17", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA2", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA3", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA4", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA5", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA6", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA7", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA8", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA9", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA0", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA1", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA10", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA11", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA12", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA13", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA2", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA3", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA4", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA5", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA6", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA7", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA8", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA9", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 61, |
| 61, |
| 61 |
| ], |
| "pin": "CEA", |
| "setup": [ |
| 184, |
| 184, |
| 184 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 95, |
| 95, |
| 95 |
| ], |
| "pin": "WEA", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "type": "Width", |
| "width": [ |
| 1967, |
| 1967, |
| 1967 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "OCEB", |
| "setup": [ |
| 225, |
| 225, |
| 225 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "RSTB", |
| "setup": [ |
| 517, |
| 517, |
| 517 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB0", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB1", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB10", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB11", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB12", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB13", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB14", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB15", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB16", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB17", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB2", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB3", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB4", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB5", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB6", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB7", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB8", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB9", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 350, |
| 350, |
| 350 |
| ], |
| "pin": "CSB0", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 350, |
| 350, |
| 350 |
| ], |
| "pin": "CSB1", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 350, |
| 350, |
| 350 |
| ], |
| "pin": "CSB2", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 357, |
| 357, |
| 357 |
| ], |
| "pin": "WEB", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 65, |
| 65, |
| 65 |
| ], |
| "pin": "CEB", |
| "setup": [ |
| 298, |
| 298, |
| 298 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB0", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB1", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB10", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB11", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB12", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB13", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB2", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB3", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB4", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB5", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB6", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB7", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB8", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB9", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "type": "Width", |
| "width": [ |
| 1967, |
| 1967, |
| 1967 |
| ] |
| }, |
| { |
| "falling": [ |
| 781, |
| 809, |
| 837 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 781, |
| 809, |
| 837 |
| ], |
| "to_pin": "DOB0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 781, |
| 809, |
| 837 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 781, |
| 809, |
| 837 |
| ], |
| "to_pin": "DOB1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 781, |
| 809, |
| 837 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 781, |
| 809, |
| 837 |
| ], |
| "to_pin": "DOB10", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 781, |
| 809, |
| 837 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 781, |
| 809, |
| 837 |
| ], |
| "to_pin": "DOB11", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 781, |
| 809, |
| 837 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 781, |
| 809, |
| 837 |
| ], |
| "to_pin": "DOB12", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 781, |
| 809, |
| 837 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 781, |
| 809, |
| 837 |
| ], |
| "to_pin": "DOB13", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 781, |
| 809, |
| 837 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 781, |
| 809, |
| 837 |
| ], |
| "to_pin": "DOB14", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 781, |
| 809, |
| 837 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 781, |
| 809, |
| 837 |
| ], |
| "to_pin": "DOB15", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 781, |
| 809, |
| 837 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 781, |
| 809, |
| 837 |
| ], |
| "to_pin": "DOB16", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 781, |
| 809, |
| 837 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 781, |
| 809, |
| 837 |
| ], |
| "to_pin": "DOB17", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 781, |
| 809, |
| 837 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 781, |
| 809, |
| 837 |
| ], |
| "to_pin": "DOB2", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 781, |
| 809, |
| 837 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 781, |
| 809, |
| 837 |
| ], |
| "to_pin": "DOB3", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 781, |
| 809, |
| 837 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 781, |
| 809, |
| 837 |
| ], |
| "to_pin": "DOB4", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 781, |
| 809, |
| 837 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 781, |
| 809, |
| 837 |
| ], |
| "to_pin": "DOB5", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 781, |
| 809, |
| 837 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 781, |
| 809, |
| 837 |
| ], |
| "to_pin": "DOB6", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 781, |
| 809, |
| 837 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 781, |
| 809, |
| 837 |
| ], |
| "to_pin": "DOB7", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 781, |
| 809, |
| 837 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 781, |
| 809, |
| 837 |
| ], |
| "to_pin": "DOB8", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 781, |
| 809, |
| 837 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 781, |
| 809, |
| 837 |
| ], |
| "to_pin": "DOB9", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 800, |
| 828, |
| 856 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 800, |
| 828, |
| 856 |
| ], |
| "to_pin": "DOA0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 800, |
| 828, |
| 856 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 800, |
| 828, |
| 856 |
| ], |
| "to_pin": "DOA1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 800, |
| 828, |
| 856 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 800, |
| 828, |
| 856 |
| ], |
| "to_pin": "DOA10", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 800, |
| 828, |
| 856 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 800, |
| 828, |
| 856 |
| ], |
| "to_pin": "DOA11", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 800, |
| 828, |
| 856 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 800, |
| 828, |
| 856 |
| ], |
| "to_pin": "DOA12", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 800, |
| 828, |
| 856 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 800, |
| 828, |
| 856 |
| ], |
| "to_pin": "DOA13", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 800, |
| 828, |
| 856 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 800, |
| 828, |
| 856 |
| ], |
| "to_pin": "DOA14", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 800, |
| 828, |
| 856 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 800, |
| 828, |
| 856 |
| ], |
| "to_pin": "DOA15", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 800, |
| 828, |
| 856 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 800, |
| 828, |
| 856 |
| ], |
| "to_pin": "DOA16", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 800, |
| 828, |
| 856 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 800, |
| 828, |
| 856 |
| ], |
| "to_pin": "DOA17", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 800, |
| 828, |
| 856 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 800, |
| 828, |
| 856 |
| ], |
| "to_pin": "DOA2", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 800, |
| 828, |
| 856 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 800, |
| 828, |
| 856 |
| ], |
| "to_pin": "DOA3", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 800, |
| 828, |
| 856 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 800, |
| 828, |
| 856 |
| ], |
| "to_pin": "DOA4", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 800, |
| 828, |
| 856 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 800, |
| 828, |
| 856 |
| ], |
| "to_pin": "DOA5", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 800, |
| 828, |
| 856 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 800, |
| 828, |
| 856 |
| ], |
| "to_pin": "DOA6", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 800, |
| 828, |
| 856 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 800, |
| 828, |
| 856 |
| ], |
| "to_pin": "DOA7", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 800, |
| 828, |
| 856 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 800, |
| 828, |
| 856 |
| ], |
| "to_pin": "DOA8", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 800, |
| 828, |
| 856 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 800, |
| 828, |
| 856 |
| ], |
| "to_pin": "DOA9", |
| "type": "IOPath" |
| } |
| ], |
| "DP16KD:WRITEMODE_A=NORMAL,WRITEMODE_B=NORMAL": [ |
| { |
| "clock": [ |
| "negedge", |
| "CLKA" |
| ], |
| "type": "Width", |
| "width": [ |
| 1967, |
| 1967, |
| 1967 |
| ] |
| }, |
| { |
| "clock": [ |
| "negedge", |
| "CLKB" |
| ], |
| "type": "Width", |
| "width": [ |
| 1967, |
| 1967, |
| 1967 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "OCEA", |
| "setup": [ |
| 207, |
| 207, |
| 207 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "RSTA", |
| "setup": [ |
| 511, |
| 511, |
| 511 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 178, |
| 178, |
| 178 |
| ], |
| "pin": "CSA0", |
| "setup": [ |
| 24, |
| 24, |
| 24 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 178, |
| 178, |
| 178 |
| ], |
| "pin": "CSA1", |
| "setup": [ |
| 24, |
| 24, |
| 24 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 178, |
| 178, |
| 178 |
| ], |
| "pin": "CSA2", |
| "setup": [ |
| 24, |
| 24, |
| 24 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA0", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA1", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA10", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA11", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA12", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA13", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA14", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA15", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA16", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA17", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA2", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA3", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA4", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA5", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA6", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA7", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA8", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA9", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA0", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA1", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA10", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA11", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA12", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA13", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA2", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA3", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA4", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA5", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA6", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA7", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA8", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA9", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 61, |
| 61, |
| 61 |
| ], |
| "pin": "CEA", |
| "setup": [ |
| 184, |
| 184, |
| 184 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 95, |
| 95, |
| 95 |
| ], |
| "pin": "WEA", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "type": "Width", |
| "width": [ |
| 1967, |
| 1967, |
| 1967 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "OCEB", |
| "setup": [ |
| 225, |
| 225, |
| 225 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "RSTB", |
| "setup": [ |
| 518, |
| 518, |
| 518 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB0", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB1", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB10", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB11", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB12", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB13", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB14", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB15", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB16", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB17", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB2", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB3", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB4", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB5", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB6", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB7", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB8", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB9", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 350, |
| 350, |
| 350 |
| ], |
| "pin": "CSB0", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 350, |
| 350, |
| 350 |
| ], |
| "pin": "CSB1", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 350, |
| 350, |
| 350 |
| ], |
| "pin": "CSB2", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 357, |
| 357, |
| 357 |
| ], |
| "pin": "WEB", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 65, |
| 65, |
| 65 |
| ], |
| "pin": "CEB", |
| "setup": [ |
| 298, |
| 298, |
| 298 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB0", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB1", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB10", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB11", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB12", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB13", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB2", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB3", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB4", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB5", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB6", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB7", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB8", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB9", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "type": "Width", |
| "width": [ |
| 1967, |
| 1967, |
| 1967 |
| ] |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA10", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA11", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA12", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA13", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA14", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA15", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA16", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA17", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA2", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA3", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA4", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA5", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA6", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA7", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA8", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA9", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "to_pin": "DOB0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "to_pin": "DOB1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "to_pin": "DOB10", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "to_pin": "DOB11", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "to_pin": "DOB12", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "to_pin": "DOB13", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "to_pin": "DOB14", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "to_pin": "DOB15", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "to_pin": "DOB16", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "to_pin": "DOB17", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "to_pin": "DOB2", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "to_pin": "DOB3", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "to_pin": "DOB4", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "to_pin": "DOB5", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "to_pin": "DOB6", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "to_pin": "DOB7", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "to_pin": "DOB8", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5020, |
| 5033, |
| 5046 |
| ], |
| "to_pin": "DOB9", |
| "type": "IOPath" |
| } |
| ], |
| "DP16KD:WRITEMODE_A=NORMAL,WRITEMODE_B=READBEFOREWRITE": [ |
| { |
| "clock": [ |
| "negedge", |
| "CLKA" |
| ], |
| "type": "Width", |
| "width": [ |
| 1967, |
| 1967, |
| 1967 |
| ] |
| }, |
| { |
| "clock": [ |
| "negedge", |
| "CLKB" |
| ], |
| "type": "Width", |
| "width": [ |
| 2581, |
| 2581, |
| 2581 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "OCEA", |
| "setup": [ |
| 207, |
| 207, |
| 207 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "RSTA", |
| "setup": [ |
| 511, |
| 511, |
| 511 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 178, |
| 178, |
| 178 |
| ], |
| "pin": "CSA0", |
| "setup": [ |
| 24, |
| 24, |
| 24 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 178, |
| 178, |
| 178 |
| ], |
| "pin": "CSA1", |
| "setup": [ |
| 24, |
| 24, |
| 24 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 178, |
| 178, |
| 178 |
| ], |
| "pin": "CSA2", |
| "setup": [ |
| 24, |
| 24, |
| 24 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA0", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA1", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA10", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA11", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA12", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA13", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA14", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA15", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA16", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA17", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA2", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA3", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA4", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA5", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA6", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA7", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA8", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA9", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA0", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA1", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA10", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA11", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA12", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA13", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA2", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA3", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA4", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA5", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA6", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA7", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA8", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA9", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 61, |
| 61, |
| 61 |
| ], |
| "pin": "CEA", |
| "setup": [ |
| 184, |
| 184, |
| 184 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 95, |
| 95, |
| 95 |
| ], |
| "pin": "WEA", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "type": "Width", |
| "width": [ |
| 1967, |
| 1967, |
| 1967 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "OCEB", |
| "setup": [ |
| 225, |
| 225, |
| 225 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "RSTB", |
| "setup": [ |
| 518, |
| 518, |
| 518 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB0", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB1", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB10", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB11", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB12", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB13", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB14", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB15", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB16", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB17", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB2", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB3", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB4", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB5", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB6", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB7", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB8", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB9", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 350, |
| 350, |
| 350 |
| ], |
| "pin": "CSB0", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 350, |
| 350, |
| 350 |
| ], |
| "pin": "CSB1", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 350, |
| 350, |
| 350 |
| ], |
| "pin": "CSB2", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 357, |
| 357, |
| 357 |
| ], |
| "pin": "WEB", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 65, |
| 65, |
| 65 |
| ], |
| "pin": "CEB", |
| "setup": [ |
| 298, |
| 298, |
| 298 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB0", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB1", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB10", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB11", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB12", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB13", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB2", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB3", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB4", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB5", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB6", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB7", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB8", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB9", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "type": "Width", |
| "width": [ |
| 2581, |
| 2581, |
| 2581 |
| ] |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA10", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA11", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA12", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA13", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA14", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA15", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA16", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA17", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA2", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA3", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA4", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA5", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA6", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA7", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA8", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA9", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4982, |
| 4986, |
| 4990 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4982, |
| 4986, |
| 4990 |
| ], |
| "to_pin": "DOB0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4982, |
| 4986, |
| 4990 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4982, |
| 4986, |
| 4990 |
| ], |
| "to_pin": "DOB1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4982, |
| 4986, |
| 4990 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4982, |
| 4986, |
| 4990 |
| ], |
| "to_pin": "DOB10", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4982, |
| 4986, |
| 4990 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4982, |
| 4986, |
| 4990 |
| ], |
| "to_pin": "DOB11", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4982, |
| 4986, |
| 4990 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4982, |
| 4986, |
| 4990 |
| ], |
| "to_pin": "DOB12", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4982, |
| 4986, |
| 4990 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4982, |
| 4986, |
| 4990 |
| ], |
| "to_pin": "DOB13", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4982, |
| 4986, |
| 4990 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4982, |
| 4986, |
| 4990 |
| ], |
| "to_pin": "DOB14", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4982, |
| 4986, |
| 4990 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4982, |
| 4986, |
| 4990 |
| ], |
| "to_pin": "DOB15", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4982, |
| 4986, |
| 4990 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4982, |
| 4986, |
| 4990 |
| ], |
| "to_pin": "DOB16", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4982, |
| 4986, |
| 4990 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4982, |
| 4986, |
| 4990 |
| ], |
| "to_pin": "DOB17", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4982, |
| 4986, |
| 4990 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4982, |
| 4986, |
| 4990 |
| ], |
| "to_pin": "DOB2", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4982, |
| 4986, |
| 4990 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4982, |
| 4986, |
| 4990 |
| ], |
| "to_pin": "DOB3", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4982, |
| 4986, |
| 4990 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4982, |
| 4986, |
| 4990 |
| ], |
| "to_pin": "DOB4", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4982, |
| 4986, |
| 4990 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4982, |
| 4986, |
| 4990 |
| ], |
| "to_pin": "DOB5", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4982, |
| 4986, |
| 4990 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4982, |
| 4986, |
| 4990 |
| ], |
| "to_pin": "DOB6", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4982, |
| 4986, |
| 4990 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4982, |
| 4986, |
| 4990 |
| ], |
| "to_pin": "DOB7", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4982, |
| 4986, |
| 4990 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4982, |
| 4986, |
| 4990 |
| ], |
| "to_pin": "DOB8", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4982, |
| 4986, |
| 4990 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4982, |
| 4986, |
| 4990 |
| ], |
| "to_pin": "DOB9", |
| "type": "IOPath" |
| } |
| ], |
| "DP16KD:WRITEMODE_A=NORMAL,WRITEMODE_B=WRITETHROUGH": [ |
| { |
| "clock": [ |
| "negedge", |
| "CLKA" |
| ], |
| "type": "Width", |
| "width": [ |
| 1967, |
| 1967, |
| 1967 |
| ] |
| }, |
| { |
| "clock": [ |
| "negedge", |
| "CLKB" |
| ], |
| "type": "Width", |
| "width": [ |
| 1954, |
| 1954, |
| 1954 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "OCEA", |
| "setup": [ |
| 207, |
| 207, |
| 207 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "RSTA", |
| "setup": [ |
| 511, |
| 511, |
| 511 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 178, |
| 178, |
| 178 |
| ], |
| "pin": "CSA0", |
| "setup": [ |
| 24, |
| 24, |
| 24 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 178, |
| 178, |
| 178 |
| ], |
| "pin": "CSA1", |
| "setup": [ |
| 24, |
| 24, |
| 24 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 178, |
| 178, |
| 178 |
| ], |
| "pin": "CSA2", |
| "setup": [ |
| 24, |
| 24, |
| 24 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA0", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA1", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA10", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA11", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA12", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA13", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA14", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA15", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA16", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA17", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA2", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA3", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA4", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA5", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA6", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA7", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA8", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 28, |
| 28, |
| 28 |
| ], |
| "pin": "DIA9", |
| "setup": [ |
| 198, |
| 198, |
| 198 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA0", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA1", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA10", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA11", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA12", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA13", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA2", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA3", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA4", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA5", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA6", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA7", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA8", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 3, |
| 3, |
| 3 |
| ], |
| "pin": "ADA9", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 61, |
| 61, |
| 61 |
| ], |
| "pin": "CEA", |
| "setup": [ |
| 184, |
| 184, |
| 184 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 95, |
| 95, |
| 95 |
| ], |
| "pin": "WEA", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "type": "Width", |
| "width": [ |
| 1967, |
| 1967, |
| 1967 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "OCEB", |
| "setup": [ |
| 225, |
| 225, |
| 225 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "RSTB", |
| "setup": [ |
| 518, |
| 518, |
| 518 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB0", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB1", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB10", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB11", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB12", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB13", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB14", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB15", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB16", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB17", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB2", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB3", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB4", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB5", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB6", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB7", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB8", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 228, |
| 228, |
| 228 |
| ], |
| "pin": "DIB9", |
| "setup": [ |
| 132, |
| 132, |
| 132 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 350, |
| 350, |
| 350 |
| ], |
| "pin": "CSB0", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 350, |
| 350, |
| 350 |
| ], |
| "pin": "CSB1", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 350, |
| 350, |
| 350 |
| ], |
| "pin": "CSB2", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 357, |
| 357, |
| 357 |
| ], |
| "pin": "WEB", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 65, |
| 65, |
| 65 |
| ], |
| "pin": "CEB", |
| "setup": [ |
| 298, |
| 298, |
| 298 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB0", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB1", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB10", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB11", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB12", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB13", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB2", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB3", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB4", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB5", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB6", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB7", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB8", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 93, |
| 93, |
| 93 |
| ], |
| "pin": "ADB9", |
| "setup": [ |
| 189, |
| 189, |
| 189 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "type": "Width", |
| "width": [ |
| 1954, |
| 1954, |
| 1954 |
| ] |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA10", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA11", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA12", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA13", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA14", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA15", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA16", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA17", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA2", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA3", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA4", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA5", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA6", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA7", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA8", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4804, |
| 4829, |
| 4854 |
| ], |
| "to_pin": "DOA9", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4984, |
| 4989, |
| 4995 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4984, |
| 4989, |
| 4995 |
| ], |
| "to_pin": "DOB0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4984, |
| 4989, |
| 4995 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4984, |
| 4989, |
| 4995 |
| ], |
| "to_pin": "DOB1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4984, |
| 4989, |
| 4995 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4984, |
| 4989, |
| 4995 |
| ], |
| "to_pin": "DOB10", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4984, |
| 4989, |
| 4995 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4984, |
| 4989, |
| 4995 |
| ], |
| "to_pin": "DOB11", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4984, |
| 4989, |
| 4995 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4984, |
| 4989, |
| 4995 |
| ], |
| "to_pin": "DOB12", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4984, |
| 4989, |
| 4995 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4984, |
| 4989, |
| 4995 |
| ], |
| "to_pin": "DOB13", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4984, |
| 4989, |
| 4995 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4984, |
| 4989, |
| 4995 |
| ], |
| "to_pin": "DOB14", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4984, |
| 4989, |
| 4995 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4984, |
| 4989, |
| 4995 |
| ], |
| "to_pin": "DOB15", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4984, |
| 4989, |
| 4995 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4984, |
| 4989, |
| 4995 |
| ], |
| "to_pin": "DOB16", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4984, |
| 4989, |
| 4995 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4984, |
| 4989, |
| 4995 |
| ], |
| "to_pin": "DOB17", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4984, |
| 4989, |
| 4995 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4984, |
| 4989, |
| 4995 |
| ], |
| "to_pin": "DOB2", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4984, |
| 4989, |
| 4995 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4984, |
| 4989, |
| 4995 |
| ], |
| "to_pin": "DOB3", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4984, |
| 4989, |
| 4995 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4984, |
| 4989, |
| 4995 |
| ], |
| "to_pin": "DOB4", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4984, |
| 4989, |
| 4995 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4984, |
| 4989, |
| 4995 |
| ], |
| "to_pin": "DOB5", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4984, |
| 4989, |
| 4995 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4984, |
| 4989, |
| 4995 |
| ], |
| "to_pin": "DOB6", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4984, |
| 4989, |
| 4995 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4984, |
| 4989, |
| 4995 |
| ], |
| "to_pin": "DOB7", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4984, |
| 4989, |
| 4995 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4984, |
| 4989, |
| 4995 |
| ], |
| "to_pin": "DOB8", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4984, |
| 4989, |
| 4995 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4984, |
| 4989, |
| 4995 |
| ], |
| "to_pin": "DOB9", |
| "type": "IOPath" |
| } |
| ], |
| "PIO:IOTYPE=LVCMOS12": [ |
| { |
| "clock": [ |
| "negedge", |
| "PAD" |
| ], |
| "type": "Width", |
| "width": [ |
| 2500, |
| 2500, |
| 2500 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "PAD" |
| ], |
| "type": "Width", |
| "width": [ |
| 2500, |
| 2500, |
| 2500 |
| ] |
| }, |
| { |
| "falling": [ |
| 1445, |
| 1589, |
| 1733 |
| ], |
| "from_pin": "PADDO", |
| "rising": [ |
| 1445, |
| 1589, |
| 1733 |
| ], |
| "to_pin": "PAD", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 1602, |
| 1858, |
| 2115 |
| ], |
| "from_pin": "PADDT", |
| "rising": [ |
| 1602, |
| 1858, |
| 2115 |
| ], |
| "to_pin": "PAD", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 642, |
| 669, |
| 697 |
| ], |
| "from_pin": "PAD", |
| "rising": [ |
| 642, |
| 669, |
| 697 |
| ], |
| "to_pin": "PADDI", |
| "type": "IOPath" |
| } |
| ], |
| "PIO:IOTYPE=LVCMOS15": [ |
| { |
| "clock": [ |
| "negedge", |
| "PAD" |
| ], |
| "type": "Width", |
| "width": [ |
| 2500, |
| 2500, |
| 2500 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "PAD" |
| ], |
| "type": "Width", |
| "width": [ |
| 2500, |
| 2500, |
| 2500 |
| ] |
| }, |
| { |
| "falling": [ |
| 1469, |
| 1619, |
| 1769 |
| ], |
| "from_pin": "PADDO", |
| "rising": [ |
| 1469, |
| 1619, |
| 1769 |
| ], |
| "to_pin": "PAD", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 1586, |
| 1604, |
| 1622 |
| ], |
| "from_pin": "PAD", |
| "rising": [ |
| 1586, |
| 1604, |
| 1622 |
| ], |
| "to_pin": "PADDI", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 1598, |
| 1790, |
| 1982 |
| ], |
| "from_pin": "PADDT", |
| "rising": [ |
| 1598, |
| 1790, |
| 1982 |
| ], |
| "to_pin": "PAD", |
| "type": "IOPath" |
| } |
| ], |
| "PIO:IOTYPE=LVCMOS18": [ |
| { |
| "clock": [ |
| "negedge", |
| "PAD" |
| ], |
| "type": "Width", |
| "width": [ |
| 2500, |
| 2500, |
| 2500 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "PAD" |
| ], |
| "type": "Width", |
| "width": [ |
| 2500, |
| 2500, |
| 2500 |
| ] |
| }, |
| { |
| "falling": [ |
| 1228, |
| 1290, |
| 1352 |
| ], |
| "from_pin": "PAD", |
| "rising": [ |
| 1228, |
| 1290, |
| 1352 |
| ], |
| "to_pin": "PADDI", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 1520, |
| 1657, |
| 1794 |
| ], |
| "from_pin": "PADDO", |
| "rising": [ |
| 1520, |
| 1657, |
| 1794 |
| ], |
| "to_pin": "PAD", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 1798, |
| 1946, |
| 2095 |
| ], |
| "from_pin": "PADDT", |
| "rising": [ |
| 1798, |
| 1946, |
| 2095 |
| ], |
| "to_pin": "PAD", |
| "type": "IOPath" |
| } |
| ], |
| "PIO:IOTYPE=LVCMOS25": [ |
| { |
| "clock": [ |
| "negedge", |
| "PAD" |
| ], |
| "type": "Width", |
| "width": [ |
| 2500, |
| 2500, |
| 2500 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "PAD" |
| ], |
| "type": "Width", |
| "width": [ |
| 2500, |
| 2500, |
| 2500 |
| ] |
| }, |
| { |
| "falling": [ |
| 1792, |
| 1921, |
| 2050 |
| ], |
| "from_pin": "PADDT", |
| "rising": [ |
| 1792, |
| 1921, |
| 2050 |
| ], |
| "to_pin": "PAD", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 1841, |
| 1842, |
| 1844 |
| ], |
| "from_pin": "PADDO", |
| "rising": [ |
| 1841, |
| 1842, |
| 1844 |
| ], |
| "to_pin": "PAD", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 857, |
| 898, |
| 940 |
| ], |
| "from_pin": "PAD", |
| "rising": [ |
| 857, |
| 898, |
| 940 |
| ], |
| "to_pin": "PADDI", |
| "type": "IOPath" |
| } |
| ], |
| "PIO:IOTYPE=LVCMOS33": [ |
| { |
| "clock": [ |
| "negedge", |
| "PAD" |
| ], |
| "type": "Width", |
| "width": [ |
| 2500, |
| 2500, |
| 2500 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "PAD" |
| ], |
| "type": "Width", |
| "width": [ |
| 2500, |
| 2500, |
| 2500 |
| ] |
| }, |
| { |
| "falling": [ |
| 1903, |
| 2168, |
| 2433 |
| ], |
| "from_pin": "PADDO", |
| "rising": [ |
| 1903, |
| 2168, |
| 2433 |
| ], |
| "to_pin": "PAD", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 2158, |
| 2470, |
| 2783 |
| ], |
| "from_pin": "PADDT", |
| "rising": [ |
| 2158, |
| 2470, |
| 2783 |
| ], |
| "to_pin": "PAD", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 956, |
| 1005, |
| 1055 |
| ], |
| "from_pin": "PAD", |
| "rising": [ |
| 956, |
| 1005, |
| 1055 |
| ], |
| "to_pin": "PADDI", |
| "type": "IOPath" |
| } |
| ], |
| "PIO:IOTYPE=LVDS": [ |
| { |
| "clock": [ |
| "negedge", |
| "PAD" |
| ], |
| "type": "Width", |
| "width": [ |
| 1250, |
| 1250, |
| 1250 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "PAD" |
| ], |
| "type": "Width", |
| "width": [ |
| 1250, |
| 1250, |
| 1250 |
| ] |
| }, |
| { |
| "falling": [ |
| 1011, |
| 1012, |
| 1013 |
| ], |
| "from_pin": "PADDO", |
| "rising": [ |
| 1011, |
| 1012, |
| 1013 |
| ], |
| "to_pin": "PAD", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 465, |
| 466, |
| 467 |
| ], |
| "from_pin": "PAD", |
| "rising": [ |
| 465, |
| 466, |
| 467 |
| ], |
| "to_pin": "PADDI", |
| "type": "IOPath" |
| } |
| ], |
| "PIO:IOTYPE=SSTL15_I": [ |
| { |
| "clock": [ |
| "negedge", |
| "PAD" |
| ], |
| "type": "Width", |
| "width": [ |
| 1250, |
| 1250, |
| 1250 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "PAD" |
| ], |
| "type": "Width", |
| "width": [ |
| 1250, |
| 1250, |
| 1250 |
| ] |
| }, |
| { |
| "falling": [ |
| 1832, |
| 1931, |
| 2030 |
| ], |
| "from_pin": "PADDO", |
| "rising": [ |
| 1832, |
| 1931, |
| 2030 |
| ], |
| "to_pin": "PAD", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 1899, |
| 2481, |
| 3063 |
| ], |
| "from_pin": "PADDT", |
| "rising": [ |
| 1899, |
| 2481, |
| 3063 |
| ], |
| "to_pin": "PAD", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 428, |
| 438, |
| 449 |
| ], |
| "from_pin": "PAD", |
| "rising": [ |
| 428, |
| 438, |
| 449 |
| ], |
| "to_pin": "PADDI", |
| "type": "IOPath" |
| } |
| ], |
| "PIO:IOTYPE=SSTL15_II": [ |
| { |
| "clock": [ |
| "negedge", |
| "PAD" |
| ], |
| "type": "Width", |
| "width": [ |
| 1250, |
| 1250, |
| 1250 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "PAD" |
| ], |
| "type": "Width", |
| "width": [ |
| 1250, |
| 1250, |
| 1250 |
| ] |
| }, |
| { |
| "falling": [ |
| 1727, |
| 2492, |
| 3257 |
| ], |
| "from_pin": "PADDT", |
| "rising": [ |
| 1727, |
| 2492, |
| 3257 |
| ], |
| "to_pin": "PAD", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 1746, |
| 1817, |
| 1888 |
| ], |
| "from_pin": "PADDO", |
| "rising": [ |
| 1746, |
| 1817, |
| 1888 |
| ], |
| "to_pin": "PAD", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 428, |
| 438, |
| 449 |
| ], |
| "from_pin": "PAD", |
| "rising": [ |
| 428, |
| 438, |
| 449 |
| ], |
| "to_pin": "PADDI", |
| "type": "IOPath" |
| } |
| ], |
| "PIO:IOTYPE=SSTL18_I": [ |
| { |
| "clock": [ |
| "negedge", |
| "PAD" |
| ], |
| "type": "Width", |
| "width": [ |
| 1250, |
| 1250, |
| 1250 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "PAD" |
| ], |
| "type": "Width", |
| "width": [ |
| 1250, |
| 1250, |
| 1250 |
| ] |
| }, |
| { |
| "falling": [ |
| 1899, |
| 1985, |
| 2071 |
| ], |
| "from_pin": "PADDO", |
| "rising": [ |
| 1899, |
| 1985, |
| 2071 |
| ], |
| "to_pin": "PAD", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 2043, |
| 2445, |
| 2847 |
| ], |
| "from_pin": "PADDT", |
| "rising": [ |
| 2043, |
| 2445, |
| 2847 |
| ], |
| "to_pin": "PAD", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 425, |
| 436, |
| 448 |
| ], |
| "from_pin": "PAD", |
| "rising": [ |
| 425, |
| 436, |
| 448 |
| ], |
| "to_pin": "PADDI", |
| "type": "IOPath" |
| } |
| ], |
| "PIO:IOTYPE=SSTL18_II": [ |
| { |
| "clock": [ |
| "negedge", |
| "PAD" |
| ], |
| "type": "Width", |
| "width": [ |
| 1250, |
| 1250, |
| 1250 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "PAD" |
| ], |
| "type": "Width", |
| "width": [ |
| 1250, |
| 1250, |
| 1250 |
| ] |
| }, |
| { |
| "falling": [ |
| 1600, |
| 2494, |
| 3389 |
| ], |
| "from_pin": "PADDT", |
| "rising": [ |
| 1600, |
| 2494, |
| 3389 |
| ], |
| "to_pin": "PAD", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 1665, |
| 1717, |
| 1770 |
| ], |
| "from_pin": "PADDO", |
| "rising": [ |
| 1665, |
| 1717, |
| 1770 |
| ], |
| "to_pin": "PAD", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 425, |
| 436, |
| 448 |
| ], |
| "from_pin": "PAD", |
| "rising": [ |
| 425, |
| 436, |
| 448 |
| ], |
| "to_pin": "PADDI", |
| "type": "IOPath" |
| } |
| ], |
| "SCCU2C": [ |
| { |
| "clock": [ |
| "negedge", |
| "CLK" |
| ], |
| "type": "Width", |
| "width": [ |
| 1092, |
| 1092, |
| 1092 |
| ] |
| }, |
| { |
| "clock": [ |
| "negedge", |
| "LSR" |
| ], |
| "type": "Width", |
| "width": [ |
| 546, |
| 546, |
| 546 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "LSR", |
| "setup": [ |
| 229, |
| 292, |
| 355 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "LSR", |
| "setup": [ |
| 229, |
| 292, |
| 356 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "hold": [ |
| 129, |
| 130, |
| 132 |
| ], |
| "pin": "CE", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "hold": [ |
| 129, |
| 131, |
| 133 |
| ], |
| "pin": "CE", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "hold": [ |
| 239, |
| 253, |
| 268 |
| ], |
| "pin": "DI1", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "hold": [ |
| 240, |
| 254, |
| 268 |
| ], |
| "pin": "DI0", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "type": "Width", |
| "width": [ |
| 1092, |
| 1092, |
| 1092 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "LSR" |
| ], |
| "type": "Width", |
| "width": [ |
| 546, |
| 546, |
| 546 |
| ] |
| }, |
| { |
| "falling": [ |
| 160, |
| 280, |
| 401 |
| ], |
| "from_pin": "A0", |
| "rising": [ |
| 160, |
| 280, |
| 401 |
| ], |
| "to_pin": "FCO", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 160, |
| 280, |
| 401 |
| ], |
| "from_pin": "A1", |
| "rising": [ |
| 160, |
| 280, |
| 401 |
| ], |
| "to_pin": "FCO", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 160, |
| 280, |
| 401 |
| ], |
| "from_pin": "B0", |
| "rising": [ |
| 160, |
| 280, |
| 401 |
| ], |
| "to_pin": "FCO", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 160, |
| 280, |
| 401 |
| ], |
| "from_pin": "B1", |
| "rising": [ |
| 160, |
| 280, |
| 401 |
| ], |
| "to_pin": "FCO", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 160, |
| 280, |
| 401 |
| ], |
| "from_pin": "C0", |
| "rising": [ |
| 160, |
| 280, |
| 401 |
| ], |
| "to_pin": "FCO", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 160, |
| 280, |
| 401 |
| ], |
| "from_pin": "C1", |
| "rising": [ |
| 160, |
| 280, |
| 401 |
| ], |
| "to_pin": "FCO", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 160, |
| 280, |
| 401 |
| ], |
| "from_pin": "D0", |
| "rising": [ |
| 160, |
| 280, |
| 401 |
| ], |
| "to_pin": "FCO", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 160, |
| 280, |
| 401 |
| ], |
| "from_pin": "D1", |
| "rising": [ |
| 160, |
| 280, |
| 401 |
| ], |
| "to_pin": "FCO", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 176, |
| 192, |
| 208 |
| ], |
| "from_pin": "A0", |
| "rising": [ |
| 176, |
| 192, |
| 208 |
| ], |
| "to_pin": "F0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 176, |
| 192, |
| 208 |
| ], |
| "from_pin": "A1", |
| "rising": [ |
| 176, |
| 192, |
| 208 |
| ], |
| "to_pin": "F1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 176, |
| 192, |
| 208 |
| ], |
| "from_pin": "B0", |
| "rising": [ |
| 176, |
| 192, |
| 208 |
| ], |
| "to_pin": "F0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 176, |
| 192, |
| 208 |
| ], |
| "from_pin": "B1", |
| "rising": [ |
| 176, |
| 192, |
| 208 |
| ], |
| "to_pin": "F1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 176, |
| 192, |
| 208 |
| ], |
| "from_pin": "C0", |
| "rising": [ |
| 176, |
| 192, |
| 208 |
| ], |
| "to_pin": "F0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 176, |
| 192, |
| 208 |
| ], |
| "from_pin": "C1", |
| "rising": [ |
| 176, |
| 192, |
| 208 |
| ], |
| "to_pin": "F1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 176, |
| 192, |
| 208 |
| ], |
| "from_pin": "D0", |
| "rising": [ |
| 176, |
| 192, |
| 208 |
| ], |
| "to_pin": "F0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 176, |
| 192, |
| 208 |
| ], |
| "from_pin": "D1", |
| "rising": [ |
| 176, |
| 192, |
| 208 |
| ], |
| "to_pin": "F1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 211, |
| 298, |
| 385 |
| ], |
| "from_pin": "FCI", |
| "rising": [ |
| 211, |
| 298, |
| 385 |
| ], |
| "to_pin": "F0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 307, |
| 359, |
| 412 |
| ], |
| "from_pin": "FCI", |
| "rising": [ |
| 307, |
| 359, |
| 412 |
| ], |
| "to_pin": "F1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 378, |
| 417, |
| 457 |
| ], |
| "from_pin": "CLK", |
| "rising": [ |
| 378, |
| 417, |
| 457 |
| ], |
| "to_pin": "Q1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 379, |
| 419, |
| 460 |
| ], |
| "from_pin": "CLK", |
| "rising": [ |
| 379, |
| 419, |
| 460 |
| ], |
| "to_pin": "Q0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 520, |
| 563, |
| 607 |
| ], |
| "from_pin": "A0", |
| "rising": [ |
| 520, |
| 563, |
| 607 |
| ], |
| "to_pin": "F1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 520, |
| 563, |
| 607 |
| ], |
| "from_pin": "B0", |
| "rising": [ |
| 520, |
| 563, |
| 607 |
| ], |
| "to_pin": "F1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 520, |
| 563, |
| 607 |
| ], |
| "from_pin": "C0", |
| "rising": [ |
| 520, |
| 563, |
| 607 |
| ], |
| "to_pin": "F1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 520, |
| 563, |
| 607 |
| ], |
| "from_pin": "D0", |
| "rising": [ |
| 520, |
| 563, |
| 607 |
| ], |
| "to_pin": "F1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 56, |
| 59, |
| 63 |
| ], |
| "from_pin": "FCI", |
| "rising": [ |
| 56, |
| 59, |
| 63 |
| ], |
| "to_pin": "FCO", |
| "type": "IOPath" |
| } |
| ], |
| "SDPRAME": [ |
| { |
| "clock": [ |
| "negedge", |
| "CLK" |
| ], |
| "type": "Width", |
| "width": [ |
| 1092, |
| 1092, |
| 1092 |
| ] |
| }, |
| { |
| "clock": [ |
| "negedge", |
| "WCK" |
| ], |
| "type": "Width", |
| "width": [ |
| 546, |
| 546, |
| 546 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "hold": [ |
| 239, |
| 253, |
| 268 |
| ], |
| "pin": "DI1", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "hold": [ |
| 240, |
| 254, |
| 268 |
| ], |
| "pin": "DI0", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "type": "Width", |
| "width": [ |
| 1092, |
| 1092, |
| 1092 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "WCK" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "WRE", |
| "setup": [ |
| 218, |
| 273, |
| 329 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "WCK" |
| ], |
| "hold": [ |
| 185, |
| 222, |
| 260 |
| ], |
| "pin": "WD0", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "WCK" |
| ], |
| "hold": [ |
| 188, |
| 223, |
| 259 |
| ], |
| "pin": "WD1", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "WCK" |
| ], |
| "hold": [ |
| 236, |
| 272, |
| 308 |
| ], |
| "pin": "WAD2", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "WCK" |
| ], |
| "hold": [ |
| 246, |
| 280, |
| 314 |
| ], |
| "pin": "WAD0", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "WCK" |
| ], |
| "hold": [ |
| 251, |
| 284, |
| 317 |
| ], |
| "pin": "WAD3", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "WCK" |
| ], |
| "hold": [ |
| 255, |
| 287, |
| 320 |
| ], |
| "pin": "WAD1", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "WCK" |
| ], |
| "type": "Width", |
| "width": [ |
| 546, |
| 546, |
| 546 |
| ] |
| }, |
| { |
| "falling": [ |
| 176, |
| 192, |
| 208 |
| ], |
| "from_pin": "RAD0", |
| "rising": [ |
| 176, |
| 192, |
| 208 |
| ], |
| "to_pin": "F0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 176, |
| 192, |
| 208 |
| ], |
| "from_pin": "RAD0", |
| "rising": [ |
| 176, |
| 192, |
| 208 |
| ], |
| "to_pin": "F1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 176, |
| 192, |
| 208 |
| ], |
| "from_pin": "RAD1", |
| "rising": [ |
| 176, |
| 192, |
| 208 |
| ], |
| "to_pin": "F0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 176, |
| 192, |
| 208 |
| ], |
| "from_pin": "RAD1", |
| "rising": [ |
| 176, |
| 192, |
| 208 |
| ], |
| "to_pin": "F1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 176, |
| 192, |
| 208 |
| ], |
| "from_pin": "RAD2", |
| "rising": [ |
| 176, |
| 192, |
| 208 |
| ], |
| "to_pin": "F0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 176, |
| 192, |
| 208 |
| ], |
| "from_pin": "RAD2", |
| "rising": [ |
| 176, |
| 192, |
| 208 |
| ], |
| "to_pin": "F1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 176, |
| 192, |
| 208 |
| ], |
| "from_pin": "RAD3", |
| "rising": [ |
| 176, |
| 192, |
| 208 |
| ], |
| "to_pin": "F0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 176, |
| 192, |
| 208 |
| ], |
| "from_pin": "RAD3", |
| "rising": [ |
| 176, |
| 192, |
| 208 |
| ], |
| "to_pin": "F1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 378, |
| 417, |
| 457 |
| ], |
| "from_pin": "CLK", |
| "rising": [ |
| 378, |
| 417, |
| 457 |
| ], |
| "to_pin": "Q1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 379, |
| 419, |
| 460 |
| ], |
| "from_pin": "CLK", |
| "rising": [ |
| 379, |
| 419, |
| 460 |
| ], |
| "to_pin": "Q0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 806, |
| 813, |
| 820 |
| ], |
| "from_pin": "WCK", |
| "rising": [ |
| 806, |
| 813, |
| 820 |
| ], |
| "to_pin": "F0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 809, |
| 816, |
| 823 |
| ], |
| "from_pin": "WCK", |
| "rising": [ |
| 809, |
| 816, |
| 823 |
| ], |
| "to_pin": "F1", |
| "type": "IOPath" |
| } |
| ], |
| "SLOGICB": [ |
| { |
| "clock": [ |
| "negedge", |
| "CLK" |
| ], |
| "type": "Width", |
| "width": [ |
| 1092, |
| 1092, |
| 1092 |
| ] |
| }, |
| { |
| "clock": [ |
| "negedge", |
| "LSR" |
| ], |
| "type": "Width", |
| "width": [ |
| 546, |
| 546, |
| 546 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "LSR", |
| "setup": [ |
| 229, |
| 292, |
| 356 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "hold": [ |
| 129, |
| 130, |
| 132 |
| ], |
| "pin": "CE", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "hold": [ |
| 129, |
| 131, |
| 133 |
| ], |
| "pin": "CE", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "hold": [ |
| 215, |
| 241, |
| 268 |
| ], |
| "pin": "M0", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "hold": [ |
| 215, |
| 242, |
| 269 |
| ], |
| "pin": "M1", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "hold": [ |
| 239, |
| 253, |
| 268 |
| ], |
| "pin": "DI1", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "hold": [ |
| 240, |
| 254, |
| 268 |
| ], |
| "pin": "DI0", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "type": "Width", |
| "width": [ |
| 1092, |
| 1092, |
| 1092 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "LSR" |
| ], |
| "type": "Width", |
| "width": [ |
| 546, |
| 546, |
| 546 |
| ] |
| }, |
| { |
| "falling": [ |
| 166, |
| 187, |
| 209 |
| ], |
| "from_pin": "FXA", |
| "rising": [ |
| 166, |
| 187, |
| 209 |
| ], |
| "to_pin": "OFX1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 166, |
| 188, |
| 211 |
| ], |
| "from_pin": "FXB", |
| "rising": [ |
| 166, |
| 188, |
| 211 |
| ], |
| "to_pin": "OFX1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 166, |
| 193, |
| 221 |
| ], |
| "from_pin": "M1", |
| "rising": [ |
| 166, |
| 193, |
| 221 |
| ], |
| "to_pin": "OFX1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 166, |
| 195, |
| 225 |
| ], |
| "from_pin": "M0", |
| "rising": [ |
| 166, |
| 195, |
| 225 |
| ], |
| "to_pin": "OFX0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 176, |
| 192, |
| 208 |
| ], |
| "from_pin": "A0", |
| "rising": [ |
| 176, |
| 192, |
| 208 |
| ], |
| "to_pin": "F0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 176, |
| 192, |
| 208 |
| ], |
| "from_pin": "A1", |
| "rising": [ |
| 176, |
| 192, |
| 208 |
| ], |
| "to_pin": "F1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 176, |
| 192, |
| 208 |
| ], |
| "from_pin": "B0", |
| "rising": [ |
| 176, |
| 192, |
| 208 |
| ], |
| "to_pin": "F0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 176, |
| 192, |
| 208 |
| ], |
| "from_pin": "B1", |
| "rising": [ |
| 176, |
| 192, |
| 208 |
| ], |
| "to_pin": "F1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 176, |
| 192, |
| 208 |
| ], |
| "from_pin": "C0", |
| "rising": [ |
| 176, |
| 192, |
| 208 |
| ], |
| "to_pin": "F0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 176, |
| 192, |
| 208 |
| ], |
| "from_pin": "C1", |
| "rising": [ |
| 176, |
| 192, |
| 208 |
| ], |
| "to_pin": "F1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 176, |
| 192, |
| 208 |
| ], |
| "from_pin": "D0", |
| "rising": [ |
| 176, |
| 192, |
| 208 |
| ], |
| "to_pin": "F0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 176, |
| 192, |
| 208 |
| ], |
| "from_pin": "D1", |
| "rising": [ |
| 176, |
| 192, |
| 208 |
| ], |
| "to_pin": "F1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 234, |
| 294, |
| 354 |
| ], |
| "from_pin": "A0", |
| "rising": [ |
| 234, |
| 294, |
| 354 |
| ], |
| "to_pin": "OFX0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 234, |
| 294, |
| 354 |
| ], |
| "from_pin": "A1", |
| "rising": [ |
| 234, |
| 294, |
| 354 |
| ], |
| "to_pin": "OFX0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 234, |
| 294, |
| 354 |
| ], |
| "from_pin": "B0", |
| "rising": [ |
| 234, |
| 294, |
| 354 |
| ], |
| "to_pin": "OFX0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 234, |
| 294, |
| 354 |
| ], |
| "from_pin": "B1", |
| "rising": [ |
| 234, |
| 294, |
| 354 |
| ], |
| "to_pin": "OFX0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 234, |
| 294, |
| 354 |
| ], |
| "from_pin": "C0", |
| "rising": [ |
| 234, |
| 294, |
| 354 |
| ], |
| "to_pin": "OFX0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 234, |
| 294, |
| 354 |
| ], |
| "from_pin": "C1", |
| "rising": [ |
| 234, |
| 294, |
| 354 |
| ], |
| "to_pin": "OFX0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 234, |
| 294, |
| 354 |
| ], |
| "from_pin": "D0", |
| "rising": [ |
| 234, |
| 294, |
| 354 |
| ], |
| "to_pin": "OFX0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 234, |
| 294, |
| 354 |
| ], |
| "from_pin": "D1", |
| "rising": [ |
| 234, |
| 294, |
| 354 |
| ], |
| "to_pin": "OFX0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 378, |
| 417, |
| 457 |
| ], |
| "from_pin": "CLK", |
| "rising": [ |
| 378, |
| 417, |
| 457 |
| ], |
| "to_pin": "Q1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 379, |
| 419, |
| 460 |
| ], |
| "from_pin": "CLK", |
| "rising": [ |
| 379, |
| 419, |
| 460 |
| ], |
| "to_pin": "Q0", |
| "type": "IOPath" |
| } |
| ], |
| "SRAMWB": [ |
| { |
| "falling": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "from_pin": "A0", |
| "rising": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "to_pin": "WADO3", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "from_pin": "A1", |
| "rising": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "to_pin": "WDO1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "from_pin": "B0", |
| "rising": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "to_pin": "WADO1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "from_pin": "B1", |
| "rising": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "to_pin": "WDO3", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "from_pin": "C0", |
| "rising": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "to_pin": "WADO2", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "from_pin": "C1", |
| "rising": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "to_pin": "WDO0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "from_pin": "D0", |
| "rising": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "to_pin": "WADO0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "from_pin": "D1", |
| "rising": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "to_pin": "WDO2", |
| "type": "IOPath" |
| } |
| ] |
| } |