Update to prjtrellis b6cd06783a6f395093765d4bdb02e795b0e6ee66

Signed-off-by: David Shah <dave@ds0.me>

ECP5/tiledata/ECLK_L/bits.db

diff --git a/ECP5/tiledata/ECLK_L/bits.db b/ECP5/tiledata/ECLK_L/bits.db
index 2d7176e..0b1b76f 100644
--- a/ECP5/tiledata/ECLK_L/bits.db
+++ b/ECP5/tiledata/ECLK_L/bits.db
@@ -57,6 +57,14 @@
 S2W2_DLLDEL F100B0
 S2W2_JPADDI -
 
+.mux W2_CLKI0
+G_BANK6ECLK0 F42B0
+G_BANK7ECLK0 F41B0 F42B0
+
+.mux W2_CLKI1
+G_BANK6ECLK1 F44B0
+G_BANK7ECLK1 F43B0 F44B0
+
 .mux W2_DDRDEL
 G_LLDDRDEL F75B0
 G_ULDDRDEL -

ECP5/tiledata/ECLK_R/bits.db

diff --git a/ECP5/tiledata/ECLK_R/bits.db b/ECP5/tiledata/ECLK_R/bits.db
index 5bd1ec2..1c6404f 100644
--- a/ECP5/tiledata/ECLK_R/bits.db
+++ b/ECP5/tiledata/ECLK_R/bits.db
@@ -1,4 +1,12 @@
 # Routing Mux Bits
+.mux E2_CLKI0
+G_BANK2ECLK0 F41B0 F42B0
+G_BANK3ECLK0 F42B0
+
+.mux E2_CLKI1
+G_BANK2ECLK1 F43B0 F44B0
+G_BANK3ECLK1 F44B0
+
 .mux E2_DDRDEL
 G_LRDDRDEL -
 G_URDDRDEL F75B0