Update to prjtrellis 7619f0d70a040b05a70a72a00f21aff974ab8b72 Signed-off-by: David Shah <davey1576@gmail.com>
diff --git a/ECP5/tiledata/DDRDLL_LL/bits.db b/ECP5/tiledata/DDRDLL_LL/bits.db index d13466e..931547e 100644 --- a/ECP5/tiledata/DDRDLL_LL/bits.db +++ b/ECP5/tiledata/DDRDLL_LL/bits.db
@@ -1,5 +1,54 @@ # Routing Mux Bits +.mux S13W2_JDDRDLLCLK +BNK_ECLK0 F9B0 +BNK_ECLK1 F8B0 F9B0 +S13W2_JCIBCLK0 F8B0 + # Non-Routing Configuration +.config_enum DDRDLL.FORCE_MAX_DELAY +NO F13B0 +YES F15B0 + +.config_enum DDRDLL.GSR ENABLED +DISABLED F12B0 +ENABLED - + +.config_enum DDRDLL.MODE NONE +DDRDLLA F14B0 F16B0 +NONE - + # Fixed Connections +.fixed_conn G_LLDDRDEL S13W2_DDRDEL_DDRDLL + +.fixed_conn JF0 S13W2_JDCNTL0_DDRDLL + +.fixed_conn JF1 S13W2_JDCNTL1_DDRDLL + +.fixed_conn JF2 S13W2_JDCNTL2_DDRDLL + +.fixed_conn JF3 S13W2_JDCNTL3_DDRDLL + +.fixed_conn JF4 S13W2_JDCNTL4_DDRDLL + +.fixed_conn JF5 S13W2_JDCNTL5_DDRDLL + +.fixed_conn JF6 S13W2_JDCNTL6_DDRDLL + +.fixed_conn JF7 S13W2_JDCNTL7_DDRDLL + +.fixed_conn JQ0 S13W2_JLOCK_DDRDLL + +.fixed_conn JQ1 S13W2_JDIVOSC_DDRDLL + +.fixed_conn S13W2_JCIBCLK0 JCLK0 + +.fixed_conn S13W2_JCLK_DDRDLL S13W2_JDDRDLLCLK + +.fixed_conn S13W2_JFREEZE_DDRDLL JA0 + +.fixed_conn S13W2_JRST_DDRDLL JLSR0 + +.fixed_conn S13W2_JUDDCNTLN_DDRDLL JB0 +
diff --git a/ECP5/tiledata/DDRDLL_LR/bits.db b/ECP5/tiledata/DDRDLL_LR/bits.db index d13466e..a410b4e 100644 --- a/ECP5/tiledata/DDRDLL_LR/bits.db +++ b/ECP5/tiledata/DDRDLL_LR/bits.db
@@ -1,5 +1,54 @@ # Routing Mux Bits +.mux S13E2_JDDRDLLCLK +BNK_ECLK0 F9B0 +BNK_ECLK1 F8B0 F9B0 +S13E2_JCIBCLK0 F8B0 + # Non-Routing Configuration +.config_enum DDRDLL.FORCE_MAX_DELAY +NO F13B0 +YES F15B0 + +.config_enum DDRDLL.GSR ENABLED +DISABLED F12B0 +ENABLED - + +.config_enum DDRDLL.MODE NONE +DDRDLLA F14B0 F16B0 +NONE - + # Fixed Connections +.fixed_conn G_LRDDRDEL S13E2_DDRDEL_DDRDLL + +.fixed_conn JF0 S13E2_JDCNTL0_DDRDLL + +.fixed_conn JF1 S13E2_JDCNTL1_DDRDLL + +.fixed_conn JF2 S13E2_JDCNTL2_DDRDLL + +.fixed_conn JF3 S13E2_JDCNTL3_DDRDLL + +.fixed_conn JF4 S13E2_JDCNTL4_DDRDLL + +.fixed_conn JF5 S13E2_JDCNTL5_DDRDLL + +.fixed_conn JF6 S13E2_JDCNTL6_DDRDLL + +.fixed_conn JF7 S13E2_JDCNTL7_DDRDLL + +.fixed_conn JQ0 S13E2_JLOCK_DDRDLL + +.fixed_conn JQ1 S13E2_JDIVOSC_DDRDLL + +.fixed_conn S13E2_JCIBCLK0 JCLK0 + +.fixed_conn S13E2_JCLK_DDRDLL S13E2_JDDRDLLCLK + +.fixed_conn S13E2_JFREEZE_DDRDLL JA0 + +.fixed_conn S13E2_JRST_DDRDLL JLSR0 + +.fixed_conn S13E2_JUDDCNTLN_DDRDLL JB0 +
diff --git a/ECP5/tiledata/DDRDLL_UL/bits.db b/ECP5/tiledata/DDRDLL_UL/bits.db index d13466e..ada8daa 100644 --- a/ECP5/tiledata/DDRDLL_UL/bits.db +++ b/ECP5/tiledata/DDRDLL_UL/bits.db
@@ -1,5 +1,54 @@ # Routing Mux Bits +.mux N10W2_JDDRDLLCLK +BNK_ECLK0 F9B0 +BNK_ECLK1 F8B0 F9B0 +N10W2_JCIBCLK0 F8B0 + # Non-Routing Configuration +.config_enum DDRDLL.FORCE_MAX_DELAY +NO F13B0 +YES F15B0 + +.config_enum DDRDLL.GSR ENABLED +DISABLED F12B0 +ENABLED - + +.config_enum DDRDLL.MODE NONE +DDRDLLA F14B0 F16B0 +NONE - + # Fixed Connections +.fixed_conn G_ULDDRDEL N10W2_DDRDEL_DDRDLL + +.fixed_conn JF0 N10W2_JDCNTL0_DDRDLL + +.fixed_conn JF1 N10W2_JDCNTL1_DDRDLL + +.fixed_conn JF2 N10W2_JDCNTL2_DDRDLL + +.fixed_conn JF3 N10W2_JDCNTL3_DDRDLL + +.fixed_conn JF4 N10W2_JDCNTL4_DDRDLL + +.fixed_conn JF5 N10W2_JDCNTL5_DDRDLL + +.fixed_conn JF6 N10W2_JDCNTL6_DDRDLL + +.fixed_conn JF7 N10W2_JDCNTL7_DDRDLL + +.fixed_conn JQ0 N10W2_JLOCK_DDRDLL + +.fixed_conn JQ1 N10W2_JDIVOSC_DDRDLL + +.fixed_conn N10W2_JCIBCLK0 JCLK0 + +.fixed_conn N10W2_JCLK_DDRDLL N10W2_JDDRDLLCLK + +.fixed_conn N10W2_JFREEZE_DDRDLL JA0 + +.fixed_conn N10W2_JRST_DDRDLL JLSR0 + +.fixed_conn N10W2_JUDDCNTLN_DDRDLL JB0 +
diff --git a/ECP5/tiledata/DDRDLL_ULA/bits.db b/ECP5/tiledata/DDRDLL_ULA/bits.db index 8b13789..a238495 100644 --- a/ECP5/tiledata/DDRDLL_ULA/bits.db +++ b/ECP5/tiledata/DDRDLL_ULA/bits.db
@@ -1 +1,54 @@ +# Routing Mux Bits +.mux N13W2_JDDRDLLCLK +BNK_ECLK0 F9B0 +BNK_ECLK1 F8B0 F9B0 +N13W2_JCIBCLK0 F8B0 + + +# Non-Routing Configuration +.config_enum DDRDLL.FORCE_MAX_DELAY +NO F13B0 +YES F15B0 + +.config_enum DDRDLL.GSR ENABLED +DISABLED F12B0 +ENABLED - + +.config_enum DDRDLL.MODE NONE +DDRDLLA F14B0 F16B0 +NONE - + + +# Fixed Connections +.fixed_conn G_ULDDRDEL N13W2_DDRDEL_DDRDLL + +.fixed_conn JF0 N13W2_JDCNTL0_DDRDLL + +.fixed_conn JF1 N13W2_JDCNTL1_DDRDLL + +.fixed_conn JF2 N13W2_JDCNTL2_DDRDLL + +.fixed_conn JF3 N13W2_JDCNTL3_DDRDLL + +.fixed_conn JF4 N13W2_JDCNTL4_DDRDLL + +.fixed_conn JF5 N13W2_JDCNTL5_DDRDLL + +.fixed_conn JF6 N13W2_JDCNTL6_DDRDLL + +.fixed_conn JF7 N13W2_JDCNTL7_DDRDLL + +.fixed_conn JQ0 N13W2_JLOCK_DDRDLL + +.fixed_conn JQ1 N13W2_JDIVOSC_DDRDLL + +.fixed_conn N13W2_JCIBCLK0 JCLK0 + +.fixed_conn N13W2_JCLK_DDRDLL N13W2_JDDRDLLCLK + +.fixed_conn N13W2_JFREEZE_DDRDLL JA0 + +.fixed_conn N13W2_JRST_DDRDLL JLSR0 + +.fixed_conn N13W2_JUDDCNTLN_DDRDLL JB0
diff --git a/ECP5/tiledata/DDRDLL_UR/bits.db b/ECP5/tiledata/DDRDLL_UR/bits.db index d13466e..616b48c 100644 --- a/ECP5/tiledata/DDRDLL_UR/bits.db +++ b/ECP5/tiledata/DDRDLL_UR/bits.db
@@ -1,5 +1,54 @@ # Routing Mux Bits +.mux N10E2_JDDRDLLCLK +BNK_ECLK0 F9B0 +BNK_ECLK1 F8B0 F9B0 +N10E2_JCIBCLK0 F8B0 + # Non-Routing Configuration +.config_enum DDRDLL.FORCE_MAX_DELAY +NO F13B0 +YES F15B0 + +.config_enum DDRDLL.GSR ENABLED +DISABLED F12B0 +ENABLED - + +.config_enum DDRDLL.MODE NONE +DDRDLLA F14B0 F16B0 +NONE - + # Fixed Connections +.fixed_conn G_URDDRDEL N10E2_DDRDEL_DDRDLL + +.fixed_conn JF0 N10E2_JDCNTL0_DDRDLL + +.fixed_conn JF1 N10E2_JDCNTL1_DDRDLL + +.fixed_conn JF2 N10E2_JDCNTL2_DDRDLL + +.fixed_conn JF3 N10E2_JDCNTL3_DDRDLL + +.fixed_conn JF4 N10E2_JDCNTL4_DDRDLL + +.fixed_conn JF5 N10E2_JDCNTL5_DDRDLL + +.fixed_conn JF6 N10E2_JDCNTL6_DDRDLL + +.fixed_conn JF7 N10E2_JDCNTL7_DDRDLL + +.fixed_conn JQ0 N10E2_JLOCK_DDRDLL + +.fixed_conn JQ1 N10E2_JDIVOSC_DDRDLL + +.fixed_conn N10E2_JCIBCLK0 JCLK0 + +.fixed_conn N10E2_JCLK_DDRDLL N10E2_JDDRDLLCLK + +.fixed_conn N10E2_JFREEZE_DDRDLL JA0 + +.fixed_conn N10E2_JRST_DDRDLL JLSR0 + +.fixed_conn N10E2_JUDDCNTLN_DDRDLL JB0 +
diff --git a/ECP5/tiledata/DDRDLL_URA/bits.db b/ECP5/tiledata/DDRDLL_URA/bits.db index 8b13789..5d7d31e 100644 --- a/ECP5/tiledata/DDRDLL_URA/bits.db +++ b/ECP5/tiledata/DDRDLL_URA/bits.db
@@ -1 +1,54 @@ +# Routing Mux Bits +.mux N13E2_JDDRDLLCLK +BNK_ECLK0 F9B0 +BNK_ECLK1 F8B0 F9B0 +N13E2_JCIBCLK0 F8B0 + + +# Non-Routing Configuration +.config_enum DDRDLL.FORCE_MAX_DELAY +NO F13B0 +YES F15B0 + +.config_enum DDRDLL.GSR ENABLED +DISABLED F12B0 +ENABLED - + +.config_enum DDRDLL.MODE NONE +DDRDLLA F14B0 F16B0 +NONE - + + +# Fixed Connections +.fixed_conn G_URDDRDEL N13E2_DDRDEL_DDRDLL + +.fixed_conn JF0 N13E2_JDCNTL0_DDRDLL + +.fixed_conn JF1 N13E2_JDCNTL1_DDRDLL + +.fixed_conn JF2 N13E2_JDCNTL2_DDRDLL + +.fixed_conn JF3 N13E2_JDCNTL3_DDRDLL + +.fixed_conn JF4 N13E2_JDCNTL4_DDRDLL + +.fixed_conn JF5 N13E2_JDCNTL5_DDRDLL + +.fixed_conn JF6 N13E2_JDCNTL6_DDRDLL + +.fixed_conn JF7 N13E2_JDCNTL7_DDRDLL + +.fixed_conn JQ0 N13E2_JLOCK_DDRDLL + +.fixed_conn JQ1 N13E2_JDIVOSC_DDRDLL + +.fixed_conn N13E2_JCIBCLK0 JCLK0 + +.fixed_conn N13E2_JCLK_DDRDLL N13E2_JDDRDLLCLK + +.fixed_conn N13E2_JFREEZE_DDRDLL JA0 + +.fixed_conn N13E2_JRST_DDRDLL JLSR0 + +.fixed_conn N13E2_JUDDCNTLN_DDRDLL JB0