| { | |
| "DP16KD:REGMODE_A=NOREG,REGMODE_B=NOREG": [ | |
| { | |
| "clock": [ | |
| "negedge", | |
| "CLKA" | |
| ], | |
| "type": "Width", | |
| "width": [ | |
| 613, | |
| 613, | |
| 613 | |
| ] | |
| }, | |
| { | |
| "clock": [ | |
| "negedge", | |
| "CLKB" | |
| ], | |
| "type": "Width", | |
| "width": [ | |
| 613, | |
| 613, | |
| 613 | |
| ] | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "pin": "OCEA", | |
| "setup": [ | |
| 62, | |
| 62, | |
| 62 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "pin": "RSTA", | |
| "setup": [ | |
| 147, | |
| 147, | |
| 147 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA0", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA1", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA10", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA11", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA12", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA13", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA2", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA3", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA4", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA5", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA6", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA7", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA8", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA9", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 24, | |
| 24, | |
| 24 | |
| ], | |
| "pin": "CEA", | |
| "setup": [ | |
| 52, | |
| 52, | |
| 52 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 29, | |
| 29, | |
| 29 | |
| ], | |
| "pin": "WEA", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 51, | |
| 51, | |
| 51 | |
| ], | |
| "pin": "CSA0", | |
| "setup": [ | |
| 8, | |
| 8, | |
| 8 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 51, | |
| 51, | |
| 51 | |
| ], | |
| "pin": "CSA1", | |
| "setup": [ | |
| 8, | |
| 8, | |
| 8 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 51, | |
| 51, | |
| 51 | |
| ], | |
| "pin": "CSA2", | |
| "setup": [ | |
| 8, | |
| 8, | |
| 8 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA0", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA1", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA10", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA11", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA12", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA13", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA14", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA15", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA16", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA17", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA2", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA3", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA4", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA5", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA6", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA7", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA8", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA9", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "type": "Width", | |
| "width": [ | |
| 613, | |
| 613, | |
| 613 | |
| ] | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "pin": "OCEB", | |
| "setup": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "pin": "RSTB", | |
| "setup": [ | |
| 149, | |
| 149, | |
| 149 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 107, | |
| 107, | |
| 107 | |
| ], | |
| "pin": "WEB", | |
| "setup": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 23, | |
| 23, | |
| 23 | |
| ], | |
| "pin": "CEB", | |
| "setup": [ | |
| 85, | |
| 85, | |
| 85 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB0", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB1", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB10", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB11", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB12", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB13", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB2", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB3", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB4", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB5", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB6", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB7", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB8", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB9", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB0", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB1", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB10", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB11", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB12", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB13", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB14", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB15", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB16", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB17", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB2", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB3", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB4", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB5", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB6", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB7", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB8", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB9", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 98, | |
| 98, | |
| 98 | |
| ], | |
| "pin": "CSB0", | |
| "setup": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 98, | |
| 98, | |
| 98 | |
| ], | |
| "pin": "CSB1", | |
| "setup": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 98, | |
| 98, | |
| 98 | |
| ], | |
| "pin": "CSB2", | |
| "setup": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "type": "Width", | |
| "width": [ | |
| 613, | |
| 613, | |
| 613 | |
| ] | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA0", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA1", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA10", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA11", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA12", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA13", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA14", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA15", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA16", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA17", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA2", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA3", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA4", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA5", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA6", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA7", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA8", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA9", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "to_pin": "DOB0", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "to_pin": "DOB1", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "to_pin": "DOB10", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "to_pin": "DOB11", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "to_pin": "DOB12", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "to_pin": "DOB13", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "to_pin": "DOB14", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "to_pin": "DOB15", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "to_pin": "DOB16", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "to_pin": "DOB17", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "to_pin": "DOB2", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "to_pin": "DOB3", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "to_pin": "DOB4", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "to_pin": "DOB5", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "to_pin": "DOB6", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "to_pin": "DOB7", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "to_pin": "DOB8", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "to_pin": "DOB9", | |
| "type": "IOPath" | |
| } | |
| ], | |
| "DP16KD:REGMODE_A=NOREG,REGMODE_B=OUTREG": [ | |
| { | |
| "clock": [ | |
| "negedge", | |
| "CLKA" | |
| ], | |
| "type": "Width", | |
| "width": [ | |
| 613, | |
| 613, | |
| 613 | |
| ] | |
| }, | |
| { | |
| "clock": [ | |
| "negedge", | |
| "CLKB" | |
| ], | |
| "type": "Width", | |
| "width": [ | |
| 613, | |
| 613, | |
| 613 | |
| ] | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "pin": "OCEA", | |
| "setup": [ | |
| 62, | |
| 62, | |
| 62 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "pin": "RSTA", | |
| "setup": [ | |
| 147, | |
| 147, | |
| 147 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA0", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA1", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA10", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA11", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA12", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA13", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA2", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA3", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA4", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA5", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA6", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA7", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA8", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA9", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 24, | |
| 24, | |
| 24 | |
| ], | |
| "pin": "CEA", | |
| "setup": [ | |
| 52, | |
| 52, | |
| 52 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 29, | |
| 29, | |
| 29 | |
| ], | |
| "pin": "WEA", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 51, | |
| 51, | |
| 51 | |
| ], | |
| "pin": "CSA0", | |
| "setup": [ | |
| 8, | |
| 8, | |
| 8 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 51, | |
| 51, | |
| 51 | |
| ], | |
| "pin": "CSA1", | |
| "setup": [ | |
| 8, | |
| 8, | |
| 8 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 51, | |
| 51, | |
| 51 | |
| ], | |
| "pin": "CSA2", | |
| "setup": [ | |
| 8, | |
| 8, | |
| 8 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA0", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA1", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA10", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA11", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA12", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA13", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA14", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA15", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA16", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA17", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA2", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA3", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA4", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA5", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA6", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA7", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA8", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA9", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "type": "Width", | |
| "width": [ | |
| 613, | |
| 613, | |
| 613 | |
| ] | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "pin": "OCEB", | |
| "setup": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "pin": "RSTB", | |
| "setup": [ | |
| 149, | |
| 149, | |
| 149 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 107, | |
| 107, | |
| 107 | |
| ], | |
| "pin": "WEB", | |
| "setup": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 23, | |
| 23, | |
| 23 | |
| ], | |
| "pin": "CEB", | |
| "setup": [ | |
| 85, | |
| 85, | |
| 85 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB0", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB1", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB10", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB11", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB12", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB13", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB2", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB3", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB4", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB5", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB6", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB7", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB8", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB9", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB0", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB1", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB10", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB11", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB12", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB13", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB14", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB15", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB16", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB17", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB2", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB3", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB4", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB5", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB6", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB7", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB8", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB9", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 98, | |
| 98, | |
| 98 | |
| ], | |
| "pin": "CSB0", | |
| "setup": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 98, | |
| 98, | |
| 98 | |
| ], | |
| "pin": "CSB1", | |
| "setup": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 98, | |
| 98, | |
| 98 | |
| ], | |
| "pin": "CSB2", | |
| "setup": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "type": "Width", | |
| "width": [ | |
| 613, | |
| 613, | |
| 613 | |
| ] | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA0", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA1", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA10", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA11", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA12", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA13", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA14", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA15", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA16", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA17", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA2", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA3", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA4", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA5", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA6", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA7", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA8", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA9", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 226, | |
| 232, | |
| 239 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 226, | |
| 232, | |
| 239 | |
| ], | |
| "to_pin": "DOB0", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 226, | |
| 232, | |
| 239 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 226, | |
| 232, | |
| 239 | |
| ], | |
| "to_pin": "DOB1", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 226, | |
| 232, | |
| 239 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 226, | |
| 232, | |
| 239 | |
| ], | |
| "to_pin": "DOB10", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 226, | |
| 232, | |
| 239 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 226, | |
| 232, | |
| 239 | |
| ], | |
| "to_pin": "DOB11", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 226, | |
| 232, | |
| 239 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 226, | |
| 232, | |
| 239 | |
| ], | |
| "to_pin": "DOB12", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 226, | |
| 232, | |
| 239 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 226, | |
| 232, | |
| 239 | |
| ], | |
| "to_pin": "DOB13", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 226, | |
| 232, | |
| 239 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 226, | |
| 232, | |
| 239 | |
| ], | |
| "to_pin": "DOB14", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 226, | |
| 232, | |
| 239 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 226, | |
| 232, | |
| 239 | |
| ], | |
| "to_pin": "DOB15", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 226, | |
| 232, | |
| 239 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 226, | |
| 232, | |
| 239 | |
| ], | |
| "to_pin": "DOB16", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 226, | |
| 232, | |
| 239 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 226, | |
| 232, | |
| 239 | |
| ], | |
| "to_pin": "DOB17", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 226, | |
| 232, | |
| 239 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 226, | |
| 232, | |
| 239 | |
| ], | |
| "to_pin": "DOB2", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 226, | |
| 232, | |
| 239 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 226, | |
| 232, | |
| 239 | |
| ], | |
| "to_pin": "DOB3", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 226, | |
| 232, | |
| 239 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 226, | |
| 232, | |
| 239 | |
| ], | |
| "to_pin": "DOB4", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 226, | |
| 232, | |
| 239 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 226, | |
| 232, | |
| 239 | |
| ], | |
| "to_pin": "DOB5", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 226, | |
| 232, | |
| 239 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 226, | |
| 232, | |
| 239 | |
| ], | |
| "to_pin": "DOB6", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 226, | |
| 232, | |
| 239 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 226, | |
| 232, | |
| 239 | |
| ], | |
| "to_pin": "DOB7", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 226, | |
| 232, | |
| 239 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 226, | |
| 232, | |
| 239 | |
| ], | |
| "to_pin": "DOB8", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 226, | |
| 232, | |
| 239 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 226, | |
| 232, | |
| 239 | |
| ], | |
| "to_pin": "DOB9", | |
| "type": "IOPath" | |
| } | |
| ], | |
| "DP16KD:REGMODE_A=OUTREG,REGMODE_B=NOREG": [ | |
| { | |
| "clock": [ | |
| "negedge", | |
| "CLKA" | |
| ], | |
| "type": "Width", | |
| "width": [ | |
| 613, | |
| 613, | |
| 613 | |
| ] | |
| }, | |
| { | |
| "clock": [ | |
| "negedge", | |
| "CLKB" | |
| ], | |
| "type": "Width", | |
| "width": [ | |
| 613, | |
| 613, | |
| 613 | |
| ] | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "pin": "OCEA", | |
| "setup": [ | |
| 62, | |
| 62, | |
| 62 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "pin": "RSTA", | |
| "setup": [ | |
| 147, | |
| 147, | |
| 147 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA0", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA1", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA10", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA11", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA12", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA13", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA2", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA3", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA4", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA5", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA6", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA7", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA8", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA9", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 24, | |
| 24, | |
| 24 | |
| ], | |
| "pin": "CEA", | |
| "setup": [ | |
| 52, | |
| 52, | |
| 52 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 29, | |
| 29, | |
| 29 | |
| ], | |
| "pin": "WEA", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 51, | |
| 51, | |
| 51 | |
| ], | |
| "pin": "CSA0", | |
| "setup": [ | |
| 8, | |
| 8, | |
| 8 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 51, | |
| 51, | |
| 51 | |
| ], | |
| "pin": "CSA1", | |
| "setup": [ | |
| 8, | |
| 8, | |
| 8 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 51, | |
| 51, | |
| 51 | |
| ], | |
| "pin": "CSA2", | |
| "setup": [ | |
| 8, | |
| 8, | |
| 8 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA0", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA1", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA10", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA11", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA12", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA13", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA14", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA15", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA16", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA17", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA2", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA3", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA4", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA5", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA6", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA7", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA8", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA9", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "type": "Width", | |
| "width": [ | |
| 613, | |
| 613, | |
| 613 | |
| ] | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "pin": "OCEB", | |
| "setup": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "pin": "RSTB", | |
| "setup": [ | |
| 149, | |
| 149, | |
| 149 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 107, | |
| 107, | |
| 107 | |
| ], | |
| "pin": "WEB", | |
| "setup": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 23, | |
| 23, | |
| 23 | |
| ], | |
| "pin": "CEB", | |
| "setup": [ | |
| 85, | |
| 85, | |
| 85 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB0", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB1", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB10", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB11", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB12", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB13", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB2", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB3", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB4", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB5", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB6", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB7", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB8", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB9", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB0", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB1", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB10", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB11", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB12", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB13", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB14", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB15", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB16", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB17", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB2", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB3", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB4", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB5", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB6", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB7", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB8", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB9", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 98, | |
| 98, | |
| 98 | |
| ], | |
| "pin": "CSB0", | |
| "setup": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 98, | |
| 98, | |
| 98 | |
| ], | |
| "pin": "CSB1", | |
| "setup": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 98, | |
| 98, | |
| 98 | |
| ], | |
| "pin": "CSB2", | |
| "setup": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "type": "Width", | |
| "width": [ | |
| 613, | |
| 613, | |
| 613 | |
| ] | |
| }, | |
| { | |
| "falling": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "to_pin": "DOB0", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "to_pin": "DOB1", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "to_pin": "DOB10", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "to_pin": "DOB11", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "to_pin": "DOB12", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "to_pin": "DOB13", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "to_pin": "DOB14", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "to_pin": "DOB15", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "to_pin": "DOB16", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "to_pin": "DOB17", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "to_pin": "DOB2", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "to_pin": "DOB3", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "to_pin": "DOB4", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "to_pin": "DOB5", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "to_pin": "DOB6", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "to_pin": "DOB7", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "to_pin": "DOB8", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "to_pin": "DOB9", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 232, | |
| 238, | |
| 245 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 232, | |
| 238, | |
| 245 | |
| ], | |
| "to_pin": "DOA0", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 232, | |
| 238, | |
| 245 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 232, | |
| 238, | |
| 245 | |
| ], | |
| "to_pin": "DOA1", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 232, | |
| 238, | |
| 245 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 232, | |
| 238, | |
| 245 | |
| ], | |
| "to_pin": "DOA10", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 232, | |
| 238, | |
| 245 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 232, | |
| 238, | |
| 245 | |
| ], | |
| "to_pin": "DOA11", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 232, | |
| 238, | |
| 245 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 232, | |
| 238, | |
| 245 | |
| ], | |
| "to_pin": "DOA12", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 232, | |
| 238, | |
| 245 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 232, | |
| 238, | |
| 245 | |
| ], | |
| "to_pin": "DOA13", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 232, | |
| 238, | |
| 245 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 232, | |
| 238, | |
| 245 | |
| ], | |
| "to_pin": "DOA14", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 232, | |
| 238, | |
| 245 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 232, | |
| 238, | |
| 245 | |
| ], | |
| "to_pin": "DOA15", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 232, | |
| 238, | |
| 245 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 232, | |
| 238, | |
| 245 | |
| ], | |
| "to_pin": "DOA16", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 232, | |
| 238, | |
| 245 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 232, | |
| 238, | |
| 245 | |
| ], | |
| "to_pin": "DOA17", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 232, | |
| 238, | |
| 245 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 232, | |
| 238, | |
| 245 | |
| ], | |
| "to_pin": "DOA2", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 232, | |
| 238, | |
| 245 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 232, | |
| 238, | |
| 245 | |
| ], | |
| "to_pin": "DOA3", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 232, | |
| 238, | |
| 245 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 232, | |
| 238, | |
| 245 | |
| ], | |
| "to_pin": "DOA4", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 232, | |
| 238, | |
| 245 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 232, | |
| 238, | |
| 245 | |
| ], | |
| "to_pin": "DOA5", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 232, | |
| 238, | |
| 245 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 232, | |
| 238, | |
| 245 | |
| ], | |
| "to_pin": "DOA6", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 232, | |
| 238, | |
| 245 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 232, | |
| 238, | |
| 245 | |
| ], | |
| "to_pin": "DOA7", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 232, | |
| 238, | |
| 245 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 232, | |
| 238, | |
| 245 | |
| ], | |
| "to_pin": "DOA8", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 232, | |
| 238, | |
| 245 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 232, | |
| 238, | |
| 245 | |
| ], | |
| "to_pin": "DOA9", | |
| "type": "IOPath" | |
| } | |
| ], | |
| "DP16KD:REGMODE_A=OUTREG,REGMODE_B=OUTREG": [ | |
| { | |
| "clock": [ | |
| "negedge", | |
| "CLKA" | |
| ], | |
| "type": "Width", | |
| "width": [ | |
| 613, | |
| 613, | |
| 613 | |
| ] | |
| }, | |
| { | |
| "clock": [ | |
| "negedge", | |
| "CLKB" | |
| ], | |
| "type": "Width", | |
| "width": [ | |
| 613, | |
| 613, | |
| 613 | |
| ] | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "pin": "OCEA", | |
| "setup": [ | |
| 62, | |
| 62, | |
| 62 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "pin": "RSTA", | |
| "setup": [ | |
| 147, | |
| 147, | |
| 147 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA0", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA1", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA10", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA11", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA12", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA13", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA2", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA3", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA4", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA5", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA6", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA7", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA8", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA9", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 24, | |
| 24, | |
| 24 | |
| ], | |
| "pin": "CEA", | |
| "setup": [ | |
| 52, | |
| 52, | |
| 52 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 29, | |
| 29, | |
| 29 | |
| ], | |
| "pin": "WEA", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 51, | |
| 51, | |
| 51 | |
| ], | |
| "pin": "CSA0", | |
| "setup": [ | |
| 8, | |
| 8, | |
| 8 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 51, | |
| 51, | |
| 51 | |
| ], | |
| "pin": "CSA1", | |
| "setup": [ | |
| 8, | |
| 8, | |
| 8 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 51, | |
| 51, | |
| 51 | |
| ], | |
| "pin": "CSA2", | |
| "setup": [ | |
| 8, | |
| 8, | |
| 8 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA0", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA1", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA10", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA11", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA12", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA13", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA14", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA15", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA16", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA17", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA2", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA3", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA4", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA5", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA6", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA7", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA8", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA9", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "type": "Width", | |
| "width": [ | |
| 613, | |
| 613, | |
| 613 | |
| ] | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "pin": "OCEB", | |
| "setup": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "pin": "RSTB", | |
| "setup": [ | |
| 149, | |
| 149, | |
| 149 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 107, | |
| 107, | |
| 107 | |
| ], | |
| "pin": "WEB", | |
| "setup": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 23, | |
| 23, | |
| 23 | |
| ], | |
| "pin": "CEB", | |
| "setup": [ | |
| 85, | |
| 85, | |
| 85 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB0", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB1", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB10", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB11", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB12", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB13", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB2", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB3", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB4", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB5", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB6", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB7", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB8", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB9", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB0", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB1", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB10", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB11", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB12", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB13", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB14", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB15", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB16", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB17", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB2", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB3", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB4", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB5", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB6", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB7", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB8", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB9", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 98, | |
| 98, | |
| 98 | |
| ], | |
| "pin": "CSB0", | |
| "setup": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 98, | |
| 98, | |
| 98 | |
| ], | |
| "pin": "CSB1", | |
| "setup": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 98, | |
| 98, | |
| 98 | |
| ], | |
| "pin": "CSB2", | |
| "setup": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "type": "Width", | |
| "width": [ | |
| 613, | |
| 613, | |
| 613 | |
| ] | |
| }, | |
| { | |
| "falling": [ | |
| 226, | |
| 232, | |
| 239 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 226, | |
| 232, | |
| 239 | |
| ], | |
| "to_pin": "DOB0", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 226, | |
| 232, | |
| 239 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 226, | |
| 232, | |
| 239 | |
| ], | |
| "to_pin": "DOB1", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 226, | |
| 232, | |
| 239 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 226, | |
| 232, | |
| 239 | |
| ], | |
| "to_pin": "DOB10", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 226, | |
| 232, | |
| 239 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 226, | |
| 232, | |
| 239 | |
| ], | |
| "to_pin": "DOB11", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 226, | |
| 232, | |
| 239 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 226, | |
| 232, | |
| 239 | |
| ], | |
| "to_pin": "DOB12", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 226, | |
| 232, | |
| 239 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 226, | |
| 232, | |
| 239 | |
| ], | |
| "to_pin": "DOB13", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 226, | |
| 232, | |
| 239 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 226, | |
| 232, | |
| 239 | |
| ], | |
| "to_pin": "DOB14", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 226, | |
| 232, | |
| 239 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 226, | |
| 232, | |
| 239 | |
| ], | |
| "to_pin": "DOB15", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 226, | |
| 232, | |
| 239 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 226, | |
| 232, | |
| 239 | |
| ], | |
| "to_pin": "DOB16", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 226, | |
| 232, | |
| 239 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 226, | |
| 232, | |
| 239 | |
| ], | |
| "to_pin": "DOB17", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 226, | |
| 232, | |
| 239 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 226, | |
| 232, | |
| 239 | |
| ], | |
| "to_pin": "DOB2", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 226, | |
| 232, | |
| 239 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 226, | |
| 232, | |
| 239 | |
| ], | |
| "to_pin": "DOB3", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 226, | |
| 232, | |
| 239 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 226, | |
| 232, | |
| 239 | |
| ], | |
| "to_pin": "DOB4", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 226, | |
| 232, | |
| 239 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 226, | |
| 232, | |
| 239 | |
| ], | |
| "to_pin": "DOB5", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 226, | |
| 232, | |
| 239 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 226, | |
| 232, | |
| 239 | |
| ], | |
| "to_pin": "DOB6", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 226, | |
| 232, | |
| 239 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 226, | |
| 232, | |
| 239 | |
| ], | |
| "to_pin": "DOB7", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 226, | |
| 232, | |
| 239 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 226, | |
| 232, | |
| 239 | |
| ], | |
| "to_pin": "DOB8", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 226, | |
| 232, | |
| 239 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 226, | |
| 232, | |
| 239 | |
| ], | |
| "to_pin": "DOB9", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 232, | |
| 238, | |
| 245 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 232, | |
| 238, | |
| 245 | |
| ], | |
| "to_pin": "DOA0", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 232, | |
| 238, | |
| 245 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 232, | |
| 238, | |
| 245 | |
| ], | |
| "to_pin": "DOA1", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 232, | |
| 238, | |
| 245 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 232, | |
| 238, | |
| 245 | |
| ], | |
| "to_pin": "DOA10", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 232, | |
| 238, | |
| 245 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 232, | |
| 238, | |
| 245 | |
| ], | |
| "to_pin": "DOA11", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 232, | |
| 238, | |
| 245 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 232, | |
| 238, | |
| 245 | |
| ], | |
| "to_pin": "DOA12", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 232, | |
| 238, | |
| 245 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 232, | |
| 238, | |
| 245 | |
| ], | |
| "to_pin": "DOA13", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 232, | |
| 238, | |
| 245 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 232, | |
| 238, | |
| 245 | |
| ], | |
| "to_pin": "DOA14", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 232, | |
| 238, | |
| 245 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 232, | |
| 238, | |
| 245 | |
| ], | |
| "to_pin": "DOA15", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 232, | |
| 238, | |
| 245 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 232, | |
| 238, | |
| 245 | |
| ], | |
| "to_pin": "DOA16", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 232, | |
| 238, | |
| 245 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 232, | |
| 238, | |
| 245 | |
| ], | |
| "to_pin": "DOA17", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 232, | |
| 238, | |
| 245 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 232, | |
| 238, | |
| 245 | |
| ], | |
| "to_pin": "DOA2", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 232, | |
| 238, | |
| 245 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 232, | |
| 238, | |
| 245 | |
| ], | |
| "to_pin": "DOA3", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 232, | |
| 238, | |
| 245 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 232, | |
| 238, | |
| 245 | |
| ], | |
| "to_pin": "DOA4", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 232, | |
| 238, | |
| 245 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 232, | |
| 238, | |
| 245 | |
| ], | |
| "to_pin": "DOA5", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 232, | |
| 238, | |
| 245 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 232, | |
| 238, | |
| 245 | |
| ], | |
| "to_pin": "DOA6", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 232, | |
| 238, | |
| 245 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 232, | |
| 238, | |
| 245 | |
| ], | |
| "to_pin": "DOA7", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 232, | |
| 238, | |
| 245 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 232, | |
| 238, | |
| 245 | |
| ], | |
| "to_pin": "DOA8", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 232, | |
| 238, | |
| 245 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 232, | |
| 238, | |
| 245 | |
| ], | |
| "to_pin": "DOA9", | |
| "type": "IOPath" | |
| } | |
| ], | |
| "DP16KD:WRITEMODE_A=NORMAL,WRITEMODE_B=NORMAL": [ | |
| { | |
| "clock": [ | |
| "negedge", | |
| "CLKA" | |
| ], | |
| "type": "Width", | |
| "width": [ | |
| 613, | |
| 613, | |
| 613 | |
| ] | |
| }, | |
| { | |
| "clock": [ | |
| "negedge", | |
| "CLKB" | |
| ], | |
| "type": "Width", | |
| "width": [ | |
| 613, | |
| 613, | |
| 613 | |
| ] | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "pin": "OCEA", | |
| "setup": [ | |
| 62, | |
| 62, | |
| 62 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "pin": "RSTA", | |
| "setup": [ | |
| 147, | |
| 147, | |
| 147 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA0", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA1", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA10", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA11", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA12", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA13", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA2", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA3", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA4", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA5", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA6", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA7", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA8", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA9", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 24, | |
| 24, | |
| 24 | |
| ], | |
| "pin": "CEA", | |
| "setup": [ | |
| 52, | |
| 52, | |
| 52 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 29, | |
| 29, | |
| 29 | |
| ], | |
| "pin": "WEA", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 51, | |
| 51, | |
| 51 | |
| ], | |
| "pin": "CSA0", | |
| "setup": [ | |
| 8, | |
| 8, | |
| 8 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 51, | |
| 51, | |
| 51 | |
| ], | |
| "pin": "CSA1", | |
| "setup": [ | |
| 8, | |
| 8, | |
| 8 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 51, | |
| 51, | |
| 51 | |
| ], | |
| "pin": "CSA2", | |
| "setup": [ | |
| 8, | |
| 8, | |
| 8 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA0", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA1", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA10", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA11", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA12", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA13", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA14", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA15", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA16", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA17", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA2", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA3", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA4", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA5", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA6", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA7", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA8", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA9", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "type": "Width", | |
| "width": [ | |
| 613, | |
| 613, | |
| 613 | |
| ] | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "pin": "OCEB", | |
| "setup": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "pin": "RSTB", | |
| "setup": [ | |
| 149, | |
| 149, | |
| 149 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 107, | |
| 107, | |
| 107 | |
| ], | |
| "pin": "WEB", | |
| "setup": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 23, | |
| 23, | |
| 23 | |
| ], | |
| "pin": "CEB", | |
| "setup": [ | |
| 85, | |
| 85, | |
| 85 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB0", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB1", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB10", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB11", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB12", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB13", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB2", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB3", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB4", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB5", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB6", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB7", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB8", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB9", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB0", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB1", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB10", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB11", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB12", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB13", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB14", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB15", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB16", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB17", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB2", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB3", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB4", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB5", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB6", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB7", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB8", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB9", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 98, | |
| 98, | |
| 98 | |
| ], | |
| "pin": "CSB0", | |
| "setup": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 98, | |
| 98, | |
| 98 | |
| ], | |
| "pin": "CSB1", | |
| "setup": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 98, | |
| 98, | |
| 98 | |
| ], | |
| "pin": "CSB2", | |
| "setup": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "type": "Width", | |
| "width": [ | |
| 613, | |
| 613, | |
| 613 | |
| ] | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA0", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA1", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA10", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA11", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA12", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA13", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA14", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA15", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA16", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA17", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA2", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA3", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA4", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA5", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA6", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA7", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA8", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA9", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "to_pin": "DOB0", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "to_pin": "DOB1", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "to_pin": "DOB10", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "to_pin": "DOB11", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "to_pin": "DOB12", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "to_pin": "DOB13", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "to_pin": "DOB14", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "to_pin": "DOB15", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "to_pin": "DOB16", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "to_pin": "DOB17", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "to_pin": "DOB2", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "to_pin": "DOB3", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "to_pin": "DOB4", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "to_pin": "DOB5", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "to_pin": "DOB6", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "to_pin": "DOB7", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "to_pin": "DOB8", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1413, | |
| 1416, | |
| 1419 | |
| ], | |
| "to_pin": "DOB9", | |
| "type": "IOPath" | |
| } | |
| ], | |
| "DP16KD:WRITEMODE_A=NORMAL,WRITEMODE_B=READBEFOREWRITE": [ | |
| { | |
| "clock": [ | |
| "negedge", | |
| "CLKA" | |
| ], | |
| "type": "Width", | |
| "width": [ | |
| 613, | |
| 613, | |
| 613 | |
| ] | |
| }, | |
| { | |
| "clock": [ | |
| "negedge", | |
| "CLKB" | |
| ], | |
| "type": "Width", | |
| "width": [ | |
| 777, | |
| 777, | |
| 777 | |
| ] | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "pin": "OCEA", | |
| "setup": [ | |
| 62, | |
| 62, | |
| 62 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "pin": "RSTA", | |
| "setup": [ | |
| 147, | |
| 147, | |
| 147 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA0", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA1", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA10", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA11", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA12", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA13", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA2", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA3", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA4", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA5", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA6", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA7", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA8", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA9", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 24, | |
| 24, | |
| 24 | |
| ], | |
| "pin": "CEA", | |
| "setup": [ | |
| 52, | |
| 52, | |
| 52 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 29, | |
| 29, | |
| 29 | |
| ], | |
| "pin": "WEA", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 51, | |
| 51, | |
| 51 | |
| ], | |
| "pin": "CSA0", | |
| "setup": [ | |
| 8, | |
| 8, | |
| 8 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 51, | |
| 51, | |
| 51 | |
| ], | |
| "pin": "CSA1", | |
| "setup": [ | |
| 8, | |
| 8, | |
| 8 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 51, | |
| 51, | |
| 51 | |
| ], | |
| "pin": "CSA2", | |
| "setup": [ | |
| 8, | |
| 8, | |
| 8 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA0", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA1", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA10", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA11", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA12", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA13", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA14", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA15", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA16", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA17", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA2", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA3", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA4", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA5", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA6", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA7", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA8", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA9", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "type": "Width", | |
| "width": [ | |
| 613, | |
| 613, | |
| 613 | |
| ] | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "pin": "OCEB", | |
| "setup": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "pin": "RSTB", | |
| "setup": [ | |
| 149, | |
| 149, | |
| 149 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 107, | |
| 107, | |
| 107 | |
| ], | |
| "pin": "WEB", | |
| "setup": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 23, | |
| 23, | |
| 23 | |
| ], | |
| "pin": "CEB", | |
| "setup": [ | |
| 85, | |
| 85, | |
| 85 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB0", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB1", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB10", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB11", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB12", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB13", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB2", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB3", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB4", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB5", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB6", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB7", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB8", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB9", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB0", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB1", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB10", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB11", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB12", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB13", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB14", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB15", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB16", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB17", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB2", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB3", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB4", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB5", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB6", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB7", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB8", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB9", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 98, | |
| 98, | |
| 98 | |
| ], | |
| "pin": "CSB0", | |
| "setup": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 98, | |
| 98, | |
| 98 | |
| ], | |
| "pin": "CSB1", | |
| "setup": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 98, | |
| 98, | |
| 98 | |
| ], | |
| "pin": "CSB2", | |
| "setup": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "type": "Width", | |
| "width": [ | |
| 777, | |
| 777, | |
| 777 | |
| ] | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA0", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA1", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA10", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA11", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA12", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA13", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA14", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA15", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA16", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA17", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA2", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA3", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA4", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA5", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA6", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA7", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA8", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA9", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1414, | |
| 1417, | |
| 1420 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1414, | |
| 1417, | |
| 1420 | |
| ], | |
| "to_pin": "DOB0", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1414, | |
| 1417, | |
| 1420 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1414, | |
| 1417, | |
| 1420 | |
| ], | |
| "to_pin": "DOB1", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1414, | |
| 1417, | |
| 1420 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1414, | |
| 1417, | |
| 1420 | |
| ], | |
| "to_pin": "DOB10", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1414, | |
| 1417, | |
| 1420 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1414, | |
| 1417, | |
| 1420 | |
| ], | |
| "to_pin": "DOB11", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1414, | |
| 1417, | |
| 1420 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1414, | |
| 1417, | |
| 1420 | |
| ], | |
| "to_pin": "DOB12", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1414, | |
| 1417, | |
| 1420 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1414, | |
| 1417, | |
| 1420 | |
| ], | |
| "to_pin": "DOB13", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1414, | |
| 1417, | |
| 1420 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1414, | |
| 1417, | |
| 1420 | |
| ], | |
| "to_pin": "DOB14", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1414, | |
| 1417, | |
| 1420 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1414, | |
| 1417, | |
| 1420 | |
| ], | |
| "to_pin": "DOB15", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1414, | |
| 1417, | |
| 1420 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1414, | |
| 1417, | |
| 1420 | |
| ], | |
| "to_pin": "DOB16", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1414, | |
| 1417, | |
| 1420 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1414, | |
| 1417, | |
| 1420 | |
| ], | |
| "to_pin": "DOB17", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1414, | |
| 1417, | |
| 1420 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1414, | |
| 1417, | |
| 1420 | |
| ], | |
| "to_pin": "DOB2", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1414, | |
| 1417, | |
| 1420 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1414, | |
| 1417, | |
| 1420 | |
| ], | |
| "to_pin": "DOB3", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1414, | |
| 1417, | |
| 1420 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1414, | |
| 1417, | |
| 1420 | |
| ], | |
| "to_pin": "DOB4", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1414, | |
| 1417, | |
| 1420 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1414, | |
| 1417, | |
| 1420 | |
| ], | |
| "to_pin": "DOB5", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1414, | |
| 1417, | |
| 1420 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1414, | |
| 1417, | |
| 1420 | |
| ], | |
| "to_pin": "DOB6", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1414, | |
| 1417, | |
| 1420 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1414, | |
| 1417, | |
| 1420 | |
| ], | |
| "to_pin": "DOB7", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1414, | |
| 1417, | |
| 1420 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1414, | |
| 1417, | |
| 1420 | |
| ], | |
| "to_pin": "DOB8", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1414, | |
| 1417, | |
| 1420 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1414, | |
| 1417, | |
| 1420 | |
| ], | |
| "to_pin": "DOB9", | |
| "type": "IOPath" | |
| } | |
| ], | |
| "DP16KD:WRITEMODE_A=NORMAL,WRITEMODE_B=WRITETHROUGH": [ | |
| { | |
| "clock": [ | |
| "negedge", | |
| "CLKA" | |
| ], | |
| "type": "Width", | |
| "width": [ | |
| 613, | |
| 613, | |
| 613 | |
| ] | |
| }, | |
| { | |
| "clock": [ | |
| "negedge", | |
| "CLKB" | |
| ], | |
| "type": "Width", | |
| "width": [ | |
| 609, | |
| 609, | |
| 609 | |
| ] | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "pin": "OCEA", | |
| "setup": [ | |
| 62, | |
| 62, | |
| 62 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "pin": "RSTA", | |
| "setup": [ | |
| 147, | |
| 147, | |
| 147 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA0", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA1", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA10", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA11", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA12", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA13", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA2", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA3", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA4", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA5", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA6", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA7", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA8", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 1, | |
| 1, | |
| 1 | |
| ], | |
| "pin": "ADA9", | |
| "setup": [ | |
| 67, | |
| 67, | |
| 67 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 24, | |
| 24, | |
| 24 | |
| ], | |
| "pin": "CEA", | |
| "setup": [ | |
| 52, | |
| 52, | |
| 52 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 29, | |
| 29, | |
| 29 | |
| ], | |
| "pin": "WEA", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 51, | |
| 51, | |
| 51 | |
| ], | |
| "pin": "CSA0", | |
| "setup": [ | |
| 8, | |
| 8, | |
| 8 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 51, | |
| 51, | |
| 51 | |
| ], | |
| "pin": "CSA1", | |
| "setup": [ | |
| 8, | |
| 8, | |
| 8 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 51, | |
| 51, | |
| 51 | |
| ], | |
| "pin": "CSA2", | |
| "setup": [ | |
| 8, | |
| 8, | |
| 8 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA0", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA1", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA10", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA11", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA12", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA13", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA14", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA15", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA16", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA17", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA2", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA3", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA4", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA5", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA6", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA7", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA8", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "hold": [ | |
| 9, | |
| 9, | |
| 9 | |
| ], | |
| "pin": "DIA9", | |
| "setup": [ | |
| 59, | |
| 59, | |
| 59 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKA" | |
| ], | |
| "type": "Width", | |
| "width": [ | |
| 613, | |
| 613, | |
| 613 | |
| ] | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "pin": "OCEB", | |
| "setup": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "pin": "RSTB", | |
| "setup": [ | |
| 149, | |
| 149, | |
| 149 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 107, | |
| 107, | |
| 107 | |
| ], | |
| "pin": "WEB", | |
| "setup": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 23, | |
| 23, | |
| 23 | |
| ], | |
| "pin": "CEB", | |
| "setup": [ | |
| 85, | |
| 85, | |
| 85 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB0", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB1", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB10", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB11", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB12", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB13", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB2", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB3", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB4", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB5", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB6", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB7", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB8", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 28, | |
| 28, | |
| 28 | |
| ], | |
| "pin": "ADB9", | |
| "setup": [ | |
| 57, | |
| 57, | |
| 57 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB0", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB1", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB10", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB11", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB12", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB13", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB14", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB15", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB16", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB17", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB2", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB3", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB4", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB5", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB6", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB7", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB8", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 65, | |
| 65, | |
| 65 | |
| ], | |
| "pin": "DIB9", | |
| "setup": [ | |
| 42, | |
| 42, | |
| 42 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 98, | |
| 98, | |
| 98 | |
| ], | |
| "pin": "CSB0", | |
| "setup": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 98, | |
| 98, | |
| 98 | |
| ], | |
| "pin": "CSB1", | |
| "setup": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "hold": [ | |
| 98, | |
| 98, | |
| 98 | |
| ], | |
| "pin": "CSB2", | |
| "setup": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLKB" | |
| ], | |
| "type": "Width", | |
| "width": [ | |
| 609, | |
| 609, | |
| 609 | |
| ] | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA0", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA1", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA10", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA11", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA12", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA13", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA14", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA15", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA16", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA17", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA2", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA3", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA4", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA5", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA6", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA7", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA8", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "from_pin": "CLKA", | |
| "rising": [ | |
| 1356, | |
| 1360, | |
| 1364 | |
| ], | |
| "to_pin": "DOA9", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1414, | |
| 1417, | |
| 1420 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1414, | |
| 1417, | |
| 1420 | |
| ], | |
| "to_pin": "DOB0", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1414, | |
| 1417, | |
| 1420 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1414, | |
| 1417, | |
| 1420 | |
| ], | |
| "to_pin": "DOB1", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1414, | |
| 1417, | |
| 1420 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1414, | |
| 1417, | |
| 1420 | |
| ], | |
| "to_pin": "DOB10", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1414, | |
| 1417, | |
| 1420 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1414, | |
| 1417, | |
| 1420 | |
| ], | |
| "to_pin": "DOB11", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1414, | |
| 1417, | |
| 1420 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1414, | |
| 1417, | |
| 1420 | |
| ], | |
| "to_pin": "DOB12", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1414, | |
| 1417, | |
| 1420 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1414, | |
| 1417, | |
| 1420 | |
| ], | |
| "to_pin": "DOB13", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1414, | |
| 1417, | |
| 1420 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1414, | |
| 1417, | |
| 1420 | |
| ], | |
| "to_pin": "DOB14", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1414, | |
| 1417, | |
| 1420 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1414, | |
| 1417, | |
| 1420 | |
| ], | |
| "to_pin": "DOB15", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1414, | |
| 1417, | |
| 1420 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1414, | |
| 1417, | |
| 1420 | |
| ], | |
| "to_pin": "DOB16", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1414, | |
| 1417, | |
| 1420 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1414, | |
| 1417, | |
| 1420 | |
| ], | |
| "to_pin": "DOB17", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1414, | |
| 1417, | |
| 1420 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1414, | |
| 1417, | |
| 1420 | |
| ], | |
| "to_pin": "DOB2", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1414, | |
| 1417, | |
| 1420 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1414, | |
| 1417, | |
| 1420 | |
| ], | |
| "to_pin": "DOB3", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1414, | |
| 1417, | |
| 1420 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1414, | |
| 1417, | |
| 1420 | |
| ], | |
| "to_pin": "DOB4", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1414, | |
| 1417, | |
| 1420 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1414, | |
| 1417, | |
| 1420 | |
| ], | |
| "to_pin": "DOB5", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1414, | |
| 1417, | |
| 1420 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1414, | |
| 1417, | |
| 1420 | |
| ], | |
| "to_pin": "DOB6", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1414, | |
| 1417, | |
| 1420 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1414, | |
| 1417, | |
| 1420 | |
| ], | |
| "to_pin": "DOB7", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1414, | |
| 1417, | |
| 1420 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1414, | |
| 1417, | |
| 1420 | |
| ], | |
| "to_pin": "DOB8", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1414, | |
| 1417, | |
| 1420 | |
| ], | |
| "from_pin": "CLKB", | |
| "rising": [ | |
| 1414, | |
| 1417, | |
| 1420 | |
| ], | |
| "to_pin": "DOB9", | |
| "type": "IOPath" | |
| } | |
| ], | |
| "PIO:IOTYPE=LVCMOS12": [ | |
| { | |
| "clock": [ | |
| "negedge", | |
| "PAD" | |
| ], | |
| "type": "Width", | |
| "width": [ | |
| 2500, | |
| 2500, | |
| 2500 | |
| ] | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "PAD" | |
| ], | |
| "type": "Width", | |
| "width": [ | |
| 2500, | |
| 2500, | |
| 2500 | |
| ] | |
| }, | |
| { | |
| "falling": [ | |
| 1347, | |
| 1513, | |
| 1679 | |
| ], | |
| "from_pin": "PADDO", | |
| "rising": [ | |
| 1347, | |
| 1513, | |
| 1679 | |
| ], | |
| "to_pin": "PAD", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1554, | |
| 1800, | |
| 2047 | |
| ], | |
| "from_pin": "PADDT", | |
| "rising": [ | |
| 1554, | |
| 1800, | |
| 2047 | |
| ], | |
| "to_pin": "PAD", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 594, | |
| 610, | |
| 626 | |
| ], | |
| "from_pin": "PAD", | |
| "rising": [ | |
| 594, | |
| 610, | |
| 626 | |
| ], | |
| "to_pin": "PADDI", | |
| "type": "IOPath" | |
| } | |
| ], | |
| "PIO:IOTYPE=LVCMOS15": [ | |
| { | |
| "clock": [ | |
| "negedge", | |
| "PAD" | |
| ], | |
| "type": "Width", | |
| "width": [ | |
| 2500, | |
| 2500, | |
| 2500 | |
| ] | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "PAD" | |
| ], | |
| "type": "Width", | |
| "width": [ | |
| 2500, | |
| 2500, | |
| 2500 | |
| ] | |
| }, | |
| { | |
| "falling": [ | |
| 1396, | |
| 1553, | |
| 1711 | |
| ], | |
| "from_pin": "PADDO", | |
| "rising": [ | |
| 1396, | |
| 1553, | |
| 1711 | |
| ], | |
| "to_pin": "PAD", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1464, | |
| 1474, | |
| 1484 | |
| ], | |
| "from_pin": "PAD", | |
| "rising": [ | |
| 1464, | |
| 1474, | |
| 1484 | |
| ], | |
| "to_pin": "PADDI", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1553, | |
| 1734, | |
| 1915 | |
| ], | |
| "from_pin": "PADDT", | |
| "rising": [ | |
| 1553, | |
| 1734, | |
| 1915 | |
| ], | |
| "to_pin": "PAD", | |
| "type": "IOPath" | |
| } | |
| ], | |
| "PIO:IOTYPE=LVCMOS18": [ | |
| { | |
| "clock": [ | |
| "negedge", | |
| "PAD" | |
| ], | |
| "type": "Width", | |
| "width": [ | |
| 2500, | |
| 2500, | |
| 2500 | |
| ] | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "PAD" | |
| ], | |
| "type": "Width", | |
| "width": [ | |
| 2500, | |
| 2500, | |
| 2500 | |
| ] | |
| }, | |
| { | |
| "falling": [ | |
| 1145, | |
| 1191, | |
| 1237 | |
| ], | |
| "from_pin": "PAD", | |
| "rising": [ | |
| 1145, | |
| 1191, | |
| 1237 | |
| ], | |
| "to_pin": "PADDI", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1441, | |
| 1587, | |
| 1734 | |
| ], | |
| "from_pin": "PADDO", | |
| "rising": [ | |
| 1441, | |
| 1587, | |
| 1734 | |
| ], | |
| "to_pin": "PAD", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1750, | |
| 1888, | |
| 2027 | |
| ], | |
| "from_pin": "PADDT", | |
| "rising": [ | |
| 1750, | |
| 1888, | |
| 2027 | |
| ], | |
| "to_pin": "PAD", | |
| "type": "IOPath" | |
| } | |
| ], | |
| "PIO:IOTYPE=LVCMOS25": [ | |
| { | |
| "clock": [ | |
| "negedge", | |
| "PAD" | |
| ], | |
| "type": "Width", | |
| "width": [ | |
| 2500, | |
| 2500, | |
| 2500 | |
| ] | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "PAD" | |
| ], | |
| "type": "Width", | |
| "width": [ | |
| 2500, | |
| 2500, | |
| 2500 | |
| ] | |
| }, | |
| { | |
| "falling": [ | |
| 1736, | |
| 1751, | |
| 1766 | |
| ], | |
| "from_pin": "PADDO", | |
| "rising": [ | |
| 1736, | |
| 1751, | |
| 1766 | |
| ], | |
| "to_pin": "PAD", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1747, | |
| 1843, | |
| 1940 | |
| ], | |
| "from_pin": "PADDT", | |
| "rising": [ | |
| 1747, | |
| 1843, | |
| 1940 | |
| ], | |
| "to_pin": "PAD", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 826, | |
| 851, | |
| 876 | |
| ], | |
| "from_pin": "PAD", | |
| "rising": [ | |
| 826, | |
| 851, | |
| 876 | |
| ], | |
| "to_pin": "PADDI", | |
| "type": "IOPath" | |
| } | |
| ], | |
| "PIO:IOTYPE=LVCMOS33": [ | |
| { | |
| "clock": [ | |
| "negedge", | |
| "PAD" | |
| ], | |
| "type": "Width", | |
| "width": [ | |
| 2500, | |
| 2500, | |
| 2500 | |
| ] | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "PAD" | |
| ], | |
| "type": "Width", | |
| "width": [ | |
| 2500, | |
| 2500, | |
| 2500 | |
| ] | |
| }, | |
| { | |
| "falling": [ | |
| 1819, | |
| 2006, | |
| 2193 | |
| ], | |
| "from_pin": "PADDO", | |
| "rising": [ | |
| 1819, | |
| 2006, | |
| 2193 | |
| ], | |
| "to_pin": "PAD", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 2113, | |
| 2327, | |
| 2542 | |
| ], | |
| "from_pin": "PADDT", | |
| "rising": [ | |
| 2113, | |
| 2327, | |
| 2542 | |
| ], | |
| "to_pin": "PAD", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 921, | |
| 945, | |
| 970 | |
| ], | |
| "from_pin": "PAD", | |
| "rising": [ | |
| 921, | |
| 945, | |
| 970 | |
| ], | |
| "to_pin": "PADDI", | |
| "type": "IOPath" | |
| } | |
| ], | |
| "PIO:IOTYPE=LVDS": [ | |
| { | |
| "clock": [ | |
| "negedge", | |
| "PAD" | |
| ], | |
| "type": "Width", | |
| "width": [ | |
| 1250, | |
| 1250, | |
| 1250 | |
| ] | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "PAD" | |
| ], | |
| "type": "Width", | |
| "width": [ | |
| 1250, | |
| 1250, | |
| 1250 | |
| ] | |
| }, | |
| { | |
| "falling": [ | |
| 437, | |
| 437, | |
| 437 | |
| ], | |
| "from_pin": "PAD", | |
| "rising": [ | |
| 437, | |
| 437, | |
| 437 | |
| ], | |
| "to_pin": "PADDI", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 957, | |
| 958, | |
| 959 | |
| ], | |
| "from_pin": "PADDO", | |
| "rising": [ | |
| 957, | |
| 958, | |
| 959 | |
| ], | |
| "to_pin": "PAD", | |
| "type": "IOPath" | |
| } | |
| ], | |
| "PIO:IOTYPE=SSTL15_I": [ | |
| { | |
| "clock": [ | |
| "negedge", | |
| "PAD" | |
| ], | |
| "type": "Width", | |
| "width": [ | |
| 1250, | |
| 1250, | |
| 1250 | |
| ] | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "PAD" | |
| ], | |
| "type": "Width", | |
| "width": [ | |
| 1250, | |
| 1250, | |
| 1250 | |
| ] | |
| }, | |
| { | |
| "falling": [ | |
| 1758, | |
| 1862, | |
| 1966 | |
| ], | |
| "from_pin": "PADDO", | |
| "rising": [ | |
| 1758, | |
| 1862, | |
| 1966 | |
| ], | |
| "to_pin": "PAD", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1821, | |
| 2419, | |
| 3017 | |
| ], | |
| "from_pin": "PADDT", | |
| "rising": [ | |
| 1821, | |
| 2419, | |
| 3017 | |
| ], | |
| "to_pin": "PAD", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 403, | |
| 413, | |
| 424 | |
| ], | |
| "from_pin": "PAD", | |
| "rising": [ | |
| 403, | |
| 413, | |
| 424 | |
| ], | |
| "to_pin": "PADDI", | |
| "type": "IOPath" | |
| } | |
| ], | |
| "PIO:IOTYPE=SSTL15_II": [ | |
| { | |
| "clock": [ | |
| "negedge", | |
| "PAD" | |
| ], | |
| "type": "Width", | |
| "width": [ | |
| 1250, | |
| 1250, | |
| 1250 | |
| ] | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "PAD" | |
| ], | |
| "type": "Width", | |
| "width": [ | |
| 1250, | |
| 1250, | |
| 1250 | |
| ] | |
| }, | |
| { | |
| "falling": [ | |
| 1661, | |
| 2432, | |
| 3203 | |
| ], | |
| "from_pin": "PADDT", | |
| "rising": [ | |
| 1661, | |
| 2432, | |
| 3203 | |
| ], | |
| "to_pin": "PAD", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1678, | |
| 1752, | |
| 1827 | |
| ], | |
| "from_pin": "PADDO", | |
| "rising": [ | |
| 1678, | |
| 1752, | |
| 1827 | |
| ], | |
| "to_pin": "PAD", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 403, | |
| 413, | |
| 424 | |
| ], | |
| "from_pin": "PAD", | |
| "rising": [ | |
| 403, | |
| 413, | |
| 424 | |
| ], | |
| "to_pin": "PADDI", | |
| "type": "IOPath" | |
| } | |
| ], | |
| "PIO:IOTYPE=SSTL18_I": [ | |
| { | |
| "clock": [ | |
| "negedge", | |
| "PAD" | |
| ], | |
| "type": "Width", | |
| "width": [ | |
| 1250, | |
| 1250, | |
| 1250 | |
| ] | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "PAD" | |
| ], | |
| "type": "Width", | |
| "width": [ | |
| 1250, | |
| 1250, | |
| 1250 | |
| ] | |
| }, | |
| { | |
| "falling": [ | |
| 1818, | |
| 1913, | |
| 2008 | |
| ], | |
| "from_pin": "PADDO", | |
| "rising": [ | |
| 1818, | |
| 1913, | |
| 2008 | |
| ], | |
| "to_pin": "PAD", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1954, | |
| 2379, | |
| 2805 | |
| ], | |
| "from_pin": "PADDT", | |
| "rising": [ | |
| 1954, | |
| 2379, | |
| 2805 | |
| ], | |
| "to_pin": "PAD", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 399, | |
| 411, | |
| 423 | |
| ], | |
| "from_pin": "PAD", | |
| "rising": [ | |
| 399, | |
| 411, | |
| 423 | |
| ], | |
| "to_pin": "PADDI", | |
| "type": "IOPath" | |
| } | |
| ], | |
| "PIO:IOTYPE=SSTL18_II": [ | |
| { | |
| "clock": [ | |
| "negedge", | |
| "PAD" | |
| ], | |
| "type": "Width", | |
| "width": [ | |
| 1250, | |
| 1250, | |
| 1250 | |
| ] | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "PAD" | |
| ], | |
| "type": "Width", | |
| "width": [ | |
| 1250, | |
| 1250, | |
| 1250 | |
| ] | |
| }, | |
| { | |
| "falling": [ | |
| 1519, | |
| 2431, | |
| 3344 | |
| ], | |
| "from_pin": "PADDT", | |
| "rising": [ | |
| 1519, | |
| 2431, | |
| 3344 | |
| ], | |
| "to_pin": "PAD", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 1584, | |
| 1648, | |
| 1712 | |
| ], | |
| "from_pin": "PADDO", | |
| "rising": [ | |
| 1584, | |
| 1648, | |
| 1712 | |
| ], | |
| "to_pin": "PAD", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 399, | |
| 411, | |
| 423 | |
| ], | |
| "from_pin": "PAD", | |
| "rising": [ | |
| 399, | |
| 411, | |
| 423 | |
| ], | |
| "to_pin": "PADDI", | |
| "type": "IOPath" | |
| } | |
| ], | |
| "SCCU2C": [ | |
| { | |
| "clock": [ | |
| "negedge", | |
| "CLK" | |
| ], | |
| "type": "Width", | |
| "width": [ | |
| 889, | |
| 889, | |
| 889 | |
| ] | |
| }, | |
| { | |
| "clock": [ | |
| "negedge", | |
| "LSR" | |
| ], | |
| "type": "Width", | |
| "width": [ | |
| 444, | |
| 444, | |
| 444 | |
| ] | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLK" | |
| ], | |
| "hold": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "pin": "LSR", | |
| "setup": [ | |
| 146, | |
| 185, | |
| 224 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLK" | |
| ], | |
| "hold": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "pin": "LSR", | |
| "setup": [ | |
| 146, | |
| 185, | |
| 225 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLK" | |
| ], | |
| "hold": [ | |
| 166, | |
| 173, | |
| 181 | |
| ], | |
| "pin": "DI0", | |
| "setup": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLK" | |
| ], | |
| "hold": [ | |
| 166, | |
| 173, | |
| 181 | |
| ], | |
| "pin": "DI1", | |
| "setup": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLK" | |
| ], | |
| "hold": [ | |
| 167, | |
| 174, | |
| 181 | |
| ], | |
| "pin": "DI0", | |
| "setup": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLK" | |
| ], | |
| "hold": [ | |
| 88, | |
| 89, | |
| 90 | |
| ], | |
| "pin": "CE", | |
| "setup": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLK" | |
| ], | |
| "type": "Width", | |
| "width": [ | |
| 889, | |
| 889, | |
| 889 | |
| ] | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "LSR" | |
| ], | |
| "type": "Width", | |
| "width": [ | |
| 444, | |
| 444, | |
| 444 | |
| ] | |
| }, | |
| { | |
| "falling": [ | |
| 112, | |
| 195, | |
| 278 | |
| ], | |
| "from_pin": "A0", | |
| "rising": [ | |
| 112, | |
| 195, | |
| 278 | |
| ], | |
| "to_pin": "FCO", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 112, | |
| 195, | |
| 278 | |
| ], | |
| "from_pin": "A1", | |
| "rising": [ | |
| 112, | |
| 195, | |
| 278 | |
| ], | |
| "to_pin": "FCO", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 112, | |
| 195, | |
| 278 | |
| ], | |
| "from_pin": "B0", | |
| "rising": [ | |
| 112, | |
| 195, | |
| 278 | |
| ], | |
| "to_pin": "FCO", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 112, | |
| 195, | |
| 278 | |
| ], | |
| "from_pin": "B1", | |
| "rising": [ | |
| 112, | |
| 195, | |
| 278 | |
| ], | |
| "to_pin": "FCO", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 112, | |
| 195, | |
| 278 | |
| ], | |
| "from_pin": "C0", | |
| "rising": [ | |
| 112, | |
| 195, | |
| 278 | |
| ], | |
| "to_pin": "FCO", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 112, | |
| 195, | |
| 278 | |
| ], | |
| "from_pin": "C1", | |
| "rising": [ | |
| 112, | |
| 195, | |
| 278 | |
| ], | |
| "to_pin": "FCO", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 112, | |
| 195, | |
| 278 | |
| ], | |
| "from_pin": "D0", | |
| "rising": [ | |
| 112, | |
| 195, | |
| 278 | |
| ], | |
| "to_pin": "FCO", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 112, | |
| 195, | |
| 278 | |
| ], | |
| "from_pin": "D1", | |
| "rising": [ | |
| 112, | |
| 195, | |
| 278 | |
| ], | |
| "to_pin": "FCO", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 119, | |
| 130, | |
| 141 | |
| ], | |
| "from_pin": "A0", | |
| "rising": [ | |
| 119, | |
| 130, | |
| 141 | |
| ], | |
| "to_pin": "F0", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 119, | |
| 130, | |
| 141 | |
| ], | |
| "from_pin": "A1", | |
| "rising": [ | |
| 119, | |
| 130, | |
| 141 | |
| ], | |
| "to_pin": "F1", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 119, | |
| 130, | |
| 141 | |
| ], | |
| "from_pin": "B0", | |
| "rising": [ | |
| 119, | |
| 130, | |
| 141 | |
| ], | |
| "to_pin": "F0", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 119, | |
| 130, | |
| 141 | |
| ], | |
| "from_pin": "B1", | |
| "rising": [ | |
| 119, | |
| 130, | |
| 141 | |
| ], | |
| "to_pin": "F1", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 119, | |
| 130, | |
| 141 | |
| ], | |
| "from_pin": "C0", | |
| "rising": [ | |
| 119, | |
| 130, | |
| 141 | |
| ], | |
| "to_pin": "F0", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 119, | |
| 130, | |
| 141 | |
| ], | |
| "from_pin": "C1", | |
| "rising": [ | |
| 119, | |
| 130, | |
| 141 | |
| ], | |
| "to_pin": "F1", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 119, | |
| 130, | |
| 141 | |
| ], | |
| "from_pin": "D0", | |
| "rising": [ | |
| 119, | |
| 130, | |
| 141 | |
| ], | |
| "to_pin": "F0", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 119, | |
| 130, | |
| 141 | |
| ], | |
| "from_pin": "D1", | |
| "rising": [ | |
| 119, | |
| 130, | |
| 141 | |
| ], | |
| "to_pin": "F1", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 140, | |
| 198, | |
| 257 | |
| ], | |
| "from_pin": "FCI", | |
| "rising": [ | |
| 140, | |
| 198, | |
| 257 | |
| ], | |
| "to_pin": "F0", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 201, | |
| 237, | |
| 273 | |
| ], | |
| "from_pin": "FCI", | |
| "rising": [ | |
| 201, | |
| 237, | |
| 273 | |
| ], | |
| "to_pin": "F1", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 257, | |
| 282, | |
| 308 | |
| ], | |
| "from_pin": "CLK", | |
| "rising": [ | |
| 257, | |
| 282, | |
| 308 | |
| ], | |
| "to_pin": "Q1", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 257, | |
| 283, | |
| 309 | |
| ], | |
| "from_pin": "CLK", | |
| "rising": [ | |
| 257, | |
| 283, | |
| 309 | |
| ], | |
| "to_pin": "Q0", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 352, | |
| 372, | |
| 392 | |
| ], | |
| "from_pin": "A0", | |
| "rising": [ | |
| 352, | |
| 372, | |
| 392 | |
| ], | |
| "to_pin": "F1", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 352, | |
| 372, | |
| 392 | |
| ], | |
| "from_pin": "B0", | |
| "rising": [ | |
| 352, | |
| 372, | |
| 392 | |
| ], | |
| "to_pin": "F1", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 352, | |
| 372, | |
| 392 | |
| ], | |
| "from_pin": "C0", | |
| "rising": [ | |
| 352, | |
| 372, | |
| 392 | |
| ], | |
| "to_pin": "F1", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 352, | |
| 372, | |
| 392 | |
| ], | |
| "from_pin": "D0", | |
| "rising": [ | |
| 352, | |
| 372, | |
| 392 | |
| ], | |
| "to_pin": "F1", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 39, | |
| 41, | |
| 43 | |
| ], | |
| "from_pin": "FCI", | |
| "rising": [ | |
| 39, | |
| 41, | |
| 43 | |
| ], | |
| "to_pin": "FCO", | |
| "type": "IOPath" | |
| } | |
| ], | |
| "SDPRAME": [ | |
| { | |
| "clock": [ | |
| "negedge", | |
| "CLK" | |
| ], | |
| "type": "Width", | |
| "width": [ | |
| 889, | |
| 889, | |
| 889 | |
| ] | |
| }, | |
| { | |
| "clock": [ | |
| "negedge", | |
| "WCK" | |
| ], | |
| "type": "Width", | |
| "width": [ | |
| 444, | |
| 444, | |
| 444 | |
| ] | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLK" | |
| ], | |
| "hold": [ | |
| 166, | |
| 173, | |
| 181 | |
| ], | |
| "pin": "DI0", | |
| "setup": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLK" | |
| ], | |
| "hold": [ | |
| 166, | |
| 173, | |
| 181 | |
| ], | |
| "pin": "DI1", | |
| "setup": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLK" | |
| ], | |
| "type": "Width", | |
| "width": [ | |
| 889, | |
| 889, | |
| 889 | |
| ] | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "WCK" | |
| ], | |
| "hold": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "pin": "WRE", | |
| "setup": [ | |
| 143, | |
| 175, | |
| 208 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "WCK" | |
| ], | |
| "hold": [ | |
| 132, | |
| 153, | |
| 175 | |
| ], | |
| "pin": "WD0", | |
| "setup": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "WCK" | |
| ], | |
| "hold": [ | |
| 134, | |
| 154, | |
| 174 | |
| ], | |
| "pin": "WD1", | |
| "setup": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "WCK" | |
| ], | |
| "hold": [ | |
| 169, | |
| 189, | |
| 209 | |
| ], | |
| "pin": "WAD2", | |
| "setup": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "WCK" | |
| ], | |
| "hold": [ | |
| 175, | |
| 194, | |
| 213 | |
| ], | |
| "pin": "WAD0", | |
| "setup": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "WCK" | |
| ], | |
| "hold": [ | |
| 179, | |
| 197, | |
| 215 | |
| ], | |
| "pin": "WAD3", | |
| "setup": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "WCK" | |
| ], | |
| "hold": [ | |
| 181, | |
| 199, | |
| 217 | |
| ], | |
| "pin": "WAD1", | |
| "setup": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "WCK" | |
| ], | |
| "type": "Width", | |
| "width": [ | |
| 444, | |
| 444, | |
| 444 | |
| ] | |
| }, | |
| { | |
| "falling": [ | |
| 119, | |
| 130, | |
| 141 | |
| ], | |
| "from_pin": "RAD0", | |
| "rising": [ | |
| 119, | |
| 130, | |
| 141 | |
| ], | |
| "to_pin": "F0", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 119, | |
| 130, | |
| 141 | |
| ], | |
| "from_pin": "RAD0", | |
| "rising": [ | |
| 119, | |
| 130, | |
| 141 | |
| ], | |
| "to_pin": "F1", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 119, | |
| 130, | |
| 141 | |
| ], | |
| "from_pin": "RAD1", | |
| "rising": [ | |
| 119, | |
| 130, | |
| 141 | |
| ], | |
| "to_pin": "F0", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 119, | |
| 130, | |
| 141 | |
| ], | |
| "from_pin": "RAD1", | |
| "rising": [ | |
| 119, | |
| 130, | |
| 141 | |
| ], | |
| "to_pin": "F1", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 119, | |
| 130, | |
| 141 | |
| ], | |
| "from_pin": "RAD2", | |
| "rising": [ | |
| 119, | |
| 130, | |
| 141 | |
| ], | |
| "to_pin": "F0", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 119, | |
| 130, | |
| 141 | |
| ], | |
| "from_pin": "RAD2", | |
| "rising": [ | |
| 119, | |
| 130, | |
| 141 | |
| ], | |
| "to_pin": "F1", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 119, | |
| 130, | |
| 141 | |
| ], | |
| "from_pin": "RAD3", | |
| "rising": [ | |
| 119, | |
| 130, | |
| 141 | |
| ], | |
| "to_pin": "F0", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 119, | |
| 130, | |
| 141 | |
| ], | |
| "from_pin": "RAD3", | |
| "rising": [ | |
| 119, | |
| 130, | |
| 141 | |
| ], | |
| "to_pin": "F1", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 257, | |
| 282, | |
| 308 | |
| ], | |
| "from_pin": "CLK", | |
| "rising": [ | |
| 257, | |
| 282, | |
| 308 | |
| ], | |
| "to_pin": "Q1", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 257, | |
| 283, | |
| 309 | |
| ], | |
| "from_pin": "CLK", | |
| "rising": [ | |
| 257, | |
| 283, | |
| 309 | |
| ], | |
| "to_pin": "Q0", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 553, | |
| 556, | |
| 559 | |
| ], | |
| "from_pin": "WCK", | |
| "rising": [ | |
| 553, | |
| 556, | |
| 559 | |
| ], | |
| "to_pin": "F0", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 555, | |
| 558, | |
| 562 | |
| ], | |
| "from_pin": "WCK", | |
| "rising": [ | |
| 555, | |
| 558, | |
| 562 | |
| ], | |
| "to_pin": "F1", | |
| "type": "IOPath" | |
| } | |
| ], | |
| "SLOGICB": [ | |
| { | |
| "clock": [ | |
| "negedge", | |
| "CLK" | |
| ], | |
| "type": "Width", | |
| "width": [ | |
| 889, | |
| 889, | |
| 889 | |
| ] | |
| }, | |
| { | |
| "clock": [ | |
| "negedge", | |
| "LSR" | |
| ], | |
| "type": "Width", | |
| "width": [ | |
| 444, | |
| 444, | |
| 444 | |
| ] | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLK" | |
| ], | |
| "hold": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "pin": "LSR", | |
| "setup": [ | |
| 146, | |
| 185, | |
| 225 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLK" | |
| ], | |
| "hold": [ | |
| 153, | |
| 167, | |
| 181 | |
| ], | |
| "pin": "M0", | |
| "setup": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLK" | |
| ], | |
| "hold": [ | |
| 153, | |
| 167, | |
| 181 | |
| ], | |
| "pin": "M1", | |
| "setup": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLK" | |
| ], | |
| "hold": [ | |
| 166, | |
| 173, | |
| 181 | |
| ], | |
| "pin": "DI0", | |
| "setup": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLK" | |
| ], | |
| "hold": [ | |
| 166, | |
| 173, | |
| 181 | |
| ], | |
| "pin": "DI1", | |
| "setup": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLK" | |
| ], | |
| "hold": [ | |
| 167, | |
| 174, | |
| 181 | |
| ], | |
| "pin": "DI0", | |
| "setup": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLK" | |
| ], | |
| "hold": [ | |
| 88, | |
| 89, | |
| 90 | |
| ], | |
| "pin": "CE", | |
| "setup": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "type": "SetupHold" | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "CLK" | |
| ], | |
| "type": "Width", | |
| "width": [ | |
| 889, | |
| 889, | |
| 889 | |
| ] | |
| }, | |
| { | |
| "clock": [ | |
| "posedge", | |
| "LSR" | |
| ], | |
| "type": "Width", | |
| "width": [ | |
| 444, | |
| 444, | |
| 444 | |
| ] | |
| }, | |
| { | |
| "falling": [ | |
| 111, | |
| 125, | |
| 140 | |
| ], | |
| "from_pin": "FXA", | |
| "rising": [ | |
| 111, | |
| 125, | |
| 140 | |
| ], | |
| "to_pin": "OFX1", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 111, | |
| 126, | |
| 141 | |
| ], | |
| "from_pin": "FXB", | |
| "rising": [ | |
| 111, | |
| 126, | |
| 141 | |
| ], | |
| "to_pin": "OFX1", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 113, | |
| 130, | |
| 148 | |
| ], | |
| "from_pin": "M1", | |
| "rising": [ | |
| 113, | |
| 130, | |
| 148 | |
| ], | |
| "to_pin": "OFX1", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 113, | |
| 132, | |
| 151 | |
| ], | |
| "from_pin": "M0", | |
| "rising": [ | |
| 113, | |
| 132, | |
| 151 | |
| ], | |
| "to_pin": "OFX0", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 119, | |
| 130, | |
| 141 | |
| ], | |
| "from_pin": "A0", | |
| "rising": [ | |
| 119, | |
| 130, | |
| 141 | |
| ], | |
| "to_pin": "F0", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 119, | |
| 130, | |
| 141 | |
| ], | |
| "from_pin": "A1", | |
| "rising": [ | |
| 119, | |
| 130, | |
| 141 | |
| ], | |
| "to_pin": "F1", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 119, | |
| 130, | |
| 141 | |
| ], | |
| "from_pin": "B0", | |
| "rising": [ | |
| 119, | |
| 130, | |
| 141 | |
| ], | |
| "to_pin": "F0", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 119, | |
| 130, | |
| 141 | |
| ], | |
| "from_pin": "B1", | |
| "rising": [ | |
| 119, | |
| 130, | |
| 141 | |
| ], | |
| "to_pin": "F1", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 119, | |
| 130, | |
| 141 | |
| ], | |
| "from_pin": "C0", | |
| "rising": [ | |
| 119, | |
| 130, | |
| 141 | |
| ], | |
| "to_pin": "F0", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 119, | |
| 130, | |
| 141 | |
| ], | |
| "from_pin": "C1", | |
| "rising": [ | |
| 119, | |
| 130, | |
| 141 | |
| ], | |
| "to_pin": "F1", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 119, | |
| 130, | |
| 141 | |
| ], | |
| "from_pin": "D0", | |
| "rising": [ | |
| 119, | |
| 130, | |
| 141 | |
| ], | |
| "to_pin": "F0", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 119, | |
| 130, | |
| 141 | |
| ], | |
| "from_pin": "D1", | |
| "rising": [ | |
| 119, | |
| 130, | |
| 141 | |
| ], | |
| "to_pin": "F1", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 156, | |
| 197, | |
| 239 | |
| ], | |
| "from_pin": "A0", | |
| "rising": [ | |
| 156, | |
| 197, | |
| 239 | |
| ], | |
| "to_pin": "OFX0", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 156, | |
| 197, | |
| 239 | |
| ], | |
| "from_pin": "A1", | |
| "rising": [ | |
| 156, | |
| 197, | |
| 239 | |
| ], | |
| "to_pin": "OFX0", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 156, | |
| 197, | |
| 239 | |
| ], | |
| "from_pin": "B0", | |
| "rising": [ | |
| 156, | |
| 197, | |
| 239 | |
| ], | |
| "to_pin": "OFX0", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 156, | |
| 197, | |
| 239 | |
| ], | |
| "from_pin": "B1", | |
| "rising": [ | |
| 156, | |
| 197, | |
| 239 | |
| ], | |
| "to_pin": "OFX0", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 156, | |
| 197, | |
| 239 | |
| ], | |
| "from_pin": "C0", | |
| "rising": [ | |
| 156, | |
| 197, | |
| 239 | |
| ], | |
| "to_pin": "OFX0", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 156, | |
| 197, | |
| 239 | |
| ], | |
| "from_pin": "C1", | |
| "rising": [ | |
| 156, | |
| 197, | |
| 239 | |
| ], | |
| "to_pin": "OFX0", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 156, | |
| 197, | |
| 239 | |
| ], | |
| "from_pin": "D0", | |
| "rising": [ | |
| 156, | |
| 197, | |
| 239 | |
| ], | |
| "to_pin": "OFX0", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 156, | |
| 197, | |
| 239 | |
| ], | |
| "from_pin": "D1", | |
| "rising": [ | |
| 156, | |
| 197, | |
| 239 | |
| ], | |
| "to_pin": "OFX0", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 257, | |
| 282, | |
| 308 | |
| ], | |
| "from_pin": "CLK", | |
| "rising": [ | |
| 257, | |
| 282, | |
| 308 | |
| ], | |
| "to_pin": "Q1", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 257, | |
| 283, | |
| 309 | |
| ], | |
| "from_pin": "CLK", | |
| "rising": [ | |
| 257, | |
| 283, | |
| 309 | |
| ], | |
| "to_pin": "Q0", | |
| "type": "IOPath" | |
| } | |
| ], | |
| "SRAMWB": [ | |
| { | |
| "falling": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "from_pin": "A0", | |
| "rising": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "to_pin": "WADO3", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "from_pin": "A1", | |
| "rising": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "to_pin": "WDO1", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "from_pin": "B0", | |
| "rising": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "to_pin": "WADO1", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "from_pin": "B1", | |
| "rising": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "to_pin": "WDO3", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "from_pin": "C0", | |
| "rising": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "to_pin": "WADO2", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "from_pin": "C1", | |
| "rising": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "to_pin": "WDO0", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "from_pin": "D0", | |
| "rising": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "to_pin": "WADO0", | |
| "type": "IOPath" | |
| }, | |
| { | |
| "falling": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "from_pin": "D1", | |
| "rising": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "to_pin": "WDO2", | |
| "type": "IOPath" | |
| } | |
| ] | |
| } |