| { |
| "DP16KD:REGMODE_A=NOREG,REGMODE_B=NOREG": [ |
| { |
| "clock": [ |
| "negedge", |
| "CLKA" |
| ], |
| "type": "Width", |
| "width": [ |
| 1842, |
| 1842, |
| 1842 |
| ] |
| }, |
| { |
| "clock": [ |
| "negedge", |
| "CLKB" |
| ], |
| "type": "Width", |
| "width": [ |
| 1842, |
| 1842, |
| 1842 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "OCEA", |
| "setup": [ |
| 188, |
| 188, |
| 188 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "RSTA", |
| "setup": [ |
| 444, |
| 444, |
| 444 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 154, |
| 154, |
| 154 |
| ], |
| "pin": "CSA0", |
| "setup": [ |
| 27, |
| 27, |
| 27 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 154, |
| 154, |
| 154 |
| ], |
| "pin": "CSA1", |
| "setup": [ |
| 27, |
| 27, |
| 27 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 154, |
| 154, |
| 154 |
| ], |
| "pin": "CSA2", |
| "setup": [ |
| 27, |
| 27, |
| 27 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA0", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA1", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA10", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA11", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA12", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA13", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA14", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA15", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA16", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA17", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA2", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA3", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA4", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA5", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA6", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA7", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA8", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA9", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA0", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA1", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA10", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA11", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA12", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA13", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA2", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA3", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA4", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA5", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA6", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA7", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA8", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA9", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 74, |
| 74, |
| 74 |
| ], |
| "pin": "CEA", |
| "setup": [ |
| 158, |
| 158, |
| 158 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 88, |
| 88, |
| 88 |
| ], |
| "pin": "WEA", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "type": "Width", |
| "width": [ |
| 1842, |
| 1842, |
| 1842 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "OCEB", |
| "setup": [ |
| 196, |
| 196, |
| 196 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "RSTB", |
| "setup": [ |
| 449, |
| 449, |
| 449 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB0", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB1", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB10", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB11", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB12", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB13", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB14", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB15", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB16", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB17", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB2", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB3", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB4", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB5", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB6", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB7", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB8", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB9", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 297, |
| 297, |
| 297 |
| ], |
| "pin": "CSB0", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 297, |
| 297, |
| 297 |
| ], |
| "pin": "CSB1", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 297, |
| 297, |
| 297 |
| ], |
| "pin": "CSB2", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 323, |
| 323, |
| 323 |
| ], |
| "pin": "WEB", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 71, |
| 71, |
| 71 |
| ], |
| "pin": "CEB", |
| "setup": [ |
| 256, |
| 256, |
| 256 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB0", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB1", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB10", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB11", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB12", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB13", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB2", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB3", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB4", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB5", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB6", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB7", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB8", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB9", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "type": "Width", |
| "width": [ |
| 1842, |
| 1842, |
| 1842 |
| ] |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA10", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA11", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA12", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA13", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA14", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA15", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA16", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA17", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA2", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA3", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA4", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA5", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA6", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA7", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA8", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA9", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "to_pin": "DOB0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "to_pin": "DOB1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "to_pin": "DOB10", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "to_pin": "DOB11", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "to_pin": "DOB12", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "to_pin": "DOB13", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "to_pin": "DOB14", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "to_pin": "DOB15", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "to_pin": "DOB16", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "to_pin": "DOB17", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "to_pin": "DOB2", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "to_pin": "DOB3", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "to_pin": "DOB4", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "to_pin": "DOB5", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "to_pin": "DOB6", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "to_pin": "DOB7", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "to_pin": "DOB8", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "to_pin": "DOB9", |
| "type": "IOPath" |
| } |
| ], |
| "DP16KD:REGMODE_A=NOREG,REGMODE_B=OUTREG": [ |
| { |
| "clock": [ |
| "negedge", |
| "CLKA" |
| ], |
| "type": "Width", |
| "width": [ |
| 1842, |
| 1842, |
| 1842 |
| ] |
| }, |
| { |
| "clock": [ |
| "negedge", |
| "CLKB" |
| ], |
| "type": "Width", |
| "width": [ |
| 1842, |
| 1842, |
| 1842 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "OCEA", |
| "setup": [ |
| 188, |
| 188, |
| 188 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "RSTA", |
| "setup": [ |
| 444, |
| 444, |
| 444 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 154, |
| 154, |
| 154 |
| ], |
| "pin": "CSA0", |
| "setup": [ |
| 27, |
| 27, |
| 27 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 154, |
| 154, |
| 154 |
| ], |
| "pin": "CSA1", |
| "setup": [ |
| 27, |
| 27, |
| 27 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 154, |
| 154, |
| 154 |
| ], |
| "pin": "CSA2", |
| "setup": [ |
| 27, |
| 27, |
| 27 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA0", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA1", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA10", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA11", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA12", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA13", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA14", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA15", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA16", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA17", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA2", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA3", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA4", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA5", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA6", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA7", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA8", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA9", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA0", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA1", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA10", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA11", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA12", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA13", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA2", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA3", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA4", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA5", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA6", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA7", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA8", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA9", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 74, |
| 74, |
| 74 |
| ], |
| "pin": "CEA", |
| "setup": [ |
| 158, |
| 158, |
| 158 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 88, |
| 88, |
| 88 |
| ], |
| "pin": "WEA", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "type": "Width", |
| "width": [ |
| 1842, |
| 1842, |
| 1842 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "OCEB", |
| "setup": [ |
| 196, |
| 196, |
| 196 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "RSTB", |
| "setup": [ |
| 449, |
| 449, |
| 449 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB0", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB1", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB10", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB11", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB12", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB13", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB14", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB15", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB16", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB17", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB2", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB3", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB4", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB5", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB6", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB7", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB8", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB9", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 297, |
| 297, |
| 297 |
| ], |
| "pin": "CSB0", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 297, |
| 297, |
| 297 |
| ], |
| "pin": "CSB1", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 297, |
| 297, |
| 297 |
| ], |
| "pin": "CSB2", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 323, |
| 323, |
| 323 |
| ], |
| "pin": "WEB", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 71, |
| 71, |
| 71 |
| ], |
| "pin": "CEB", |
| "setup": [ |
| 256, |
| 256, |
| 256 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB0", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB1", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB10", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB11", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB12", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB13", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB2", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB3", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB4", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB5", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB6", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB7", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB8", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB9", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "type": "Width", |
| "width": [ |
| 1842, |
| 1842, |
| 1842 |
| ] |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA10", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA11", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA12", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA13", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA14", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA15", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA16", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA17", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA2", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA3", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA4", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA5", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA6", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA7", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA8", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA9", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 679, |
| 698, |
| 718 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 679, |
| 698, |
| 718 |
| ], |
| "to_pin": "DOB0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 679, |
| 698, |
| 718 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 679, |
| 698, |
| 718 |
| ], |
| "to_pin": "DOB1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 679, |
| 698, |
| 718 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 679, |
| 698, |
| 718 |
| ], |
| "to_pin": "DOB10", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 679, |
| 698, |
| 718 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 679, |
| 698, |
| 718 |
| ], |
| "to_pin": "DOB11", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 679, |
| 698, |
| 718 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 679, |
| 698, |
| 718 |
| ], |
| "to_pin": "DOB12", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 679, |
| 698, |
| 718 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 679, |
| 698, |
| 718 |
| ], |
| "to_pin": "DOB13", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 679, |
| 698, |
| 718 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 679, |
| 698, |
| 718 |
| ], |
| "to_pin": "DOB14", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 679, |
| 698, |
| 718 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 679, |
| 698, |
| 718 |
| ], |
| "to_pin": "DOB15", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 679, |
| 698, |
| 718 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 679, |
| 698, |
| 718 |
| ], |
| "to_pin": "DOB16", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 679, |
| 698, |
| 718 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 679, |
| 698, |
| 718 |
| ], |
| "to_pin": "DOB17", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 679, |
| 698, |
| 718 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 679, |
| 698, |
| 718 |
| ], |
| "to_pin": "DOB2", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 679, |
| 698, |
| 718 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 679, |
| 698, |
| 718 |
| ], |
| "to_pin": "DOB3", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 679, |
| 698, |
| 718 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 679, |
| 698, |
| 718 |
| ], |
| "to_pin": "DOB4", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 679, |
| 698, |
| 718 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 679, |
| 698, |
| 718 |
| ], |
| "to_pin": "DOB5", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 679, |
| 698, |
| 718 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 679, |
| 698, |
| 718 |
| ], |
| "to_pin": "DOB6", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 679, |
| 698, |
| 718 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 679, |
| 698, |
| 718 |
| ], |
| "to_pin": "DOB7", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 679, |
| 698, |
| 718 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 679, |
| 698, |
| 718 |
| ], |
| "to_pin": "DOB8", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 679, |
| 698, |
| 718 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 679, |
| 698, |
| 718 |
| ], |
| "to_pin": "DOB9", |
| "type": "IOPath" |
| } |
| ], |
| "DP16KD:REGMODE_A=OUTREG,REGMODE_B=NOREG": [ |
| { |
| "clock": [ |
| "negedge", |
| "CLKA" |
| ], |
| "type": "Width", |
| "width": [ |
| 1842, |
| 1842, |
| 1842 |
| ] |
| }, |
| { |
| "clock": [ |
| "negedge", |
| "CLKB" |
| ], |
| "type": "Width", |
| "width": [ |
| 1842, |
| 1842, |
| 1842 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "OCEA", |
| "setup": [ |
| 188, |
| 188, |
| 188 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "RSTA", |
| "setup": [ |
| 444, |
| 444, |
| 444 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 154, |
| 154, |
| 154 |
| ], |
| "pin": "CSA0", |
| "setup": [ |
| 27, |
| 27, |
| 27 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 154, |
| 154, |
| 154 |
| ], |
| "pin": "CSA1", |
| "setup": [ |
| 27, |
| 27, |
| 27 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 154, |
| 154, |
| 154 |
| ], |
| "pin": "CSA2", |
| "setup": [ |
| 27, |
| 27, |
| 27 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA0", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA1", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA10", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA11", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA12", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA13", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA14", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA15", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA16", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA17", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA2", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA3", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA4", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA5", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA6", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA7", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA8", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA9", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA0", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA1", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA10", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA11", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA12", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA13", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA2", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA3", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA4", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA5", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA6", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA7", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA8", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA9", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 74, |
| 74, |
| 74 |
| ], |
| "pin": "CEA", |
| "setup": [ |
| 158, |
| 158, |
| 158 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 88, |
| 88, |
| 88 |
| ], |
| "pin": "WEA", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "type": "Width", |
| "width": [ |
| 1842, |
| 1842, |
| 1842 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "OCEB", |
| "setup": [ |
| 196, |
| 196, |
| 196 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "RSTB", |
| "setup": [ |
| 449, |
| 449, |
| 449 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB0", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB1", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB10", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB11", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB12", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB13", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB14", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB15", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB16", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB17", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB2", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB3", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB4", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB5", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB6", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB7", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB8", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB9", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 297, |
| 297, |
| 297 |
| ], |
| "pin": "CSB0", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 297, |
| 297, |
| 297 |
| ], |
| "pin": "CSB1", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 297, |
| 297, |
| 297 |
| ], |
| "pin": "CSB2", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 323, |
| 323, |
| 323 |
| ], |
| "pin": "WEB", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 71, |
| 71, |
| 71 |
| ], |
| "pin": "CEB", |
| "setup": [ |
| 256, |
| 256, |
| 256 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB0", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB1", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB10", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB11", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB12", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB13", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB2", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB3", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB4", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB5", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB6", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB7", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB8", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB9", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "type": "Width", |
| "width": [ |
| 1842, |
| 1842, |
| 1842 |
| ] |
| }, |
| { |
| "falling": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "to_pin": "DOB0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "to_pin": "DOB1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "to_pin": "DOB10", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "to_pin": "DOB11", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "to_pin": "DOB12", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "to_pin": "DOB13", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "to_pin": "DOB14", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "to_pin": "DOB15", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "to_pin": "DOB16", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "to_pin": "DOB17", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "to_pin": "DOB2", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "to_pin": "DOB3", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "to_pin": "DOB4", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "to_pin": "DOB5", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "to_pin": "DOB6", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "to_pin": "DOB7", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "to_pin": "DOB8", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "to_pin": "DOB9", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 698, |
| 718, |
| 738 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 698, |
| 718, |
| 738 |
| ], |
| "to_pin": "DOA0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 698, |
| 718, |
| 738 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 698, |
| 718, |
| 738 |
| ], |
| "to_pin": "DOA1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 698, |
| 718, |
| 738 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 698, |
| 718, |
| 738 |
| ], |
| "to_pin": "DOA10", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 698, |
| 718, |
| 738 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 698, |
| 718, |
| 738 |
| ], |
| "to_pin": "DOA11", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 698, |
| 718, |
| 738 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 698, |
| 718, |
| 738 |
| ], |
| "to_pin": "DOA12", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 698, |
| 718, |
| 738 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 698, |
| 718, |
| 738 |
| ], |
| "to_pin": "DOA13", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 698, |
| 718, |
| 738 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 698, |
| 718, |
| 738 |
| ], |
| "to_pin": "DOA14", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 698, |
| 718, |
| 738 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 698, |
| 718, |
| 738 |
| ], |
| "to_pin": "DOA15", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 698, |
| 718, |
| 738 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 698, |
| 718, |
| 738 |
| ], |
| "to_pin": "DOA16", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 698, |
| 718, |
| 738 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 698, |
| 718, |
| 738 |
| ], |
| "to_pin": "DOA17", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 698, |
| 718, |
| 738 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 698, |
| 718, |
| 738 |
| ], |
| "to_pin": "DOA2", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 698, |
| 718, |
| 738 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 698, |
| 718, |
| 738 |
| ], |
| "to_pin": "DOA3", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 698, |
| 718, |
| 738 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 698, |
| 718, |
| 738 |
| ], |
| "to_pin": "DOA4", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 698, |
| 718, |
| 738 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 698, |
| 718, |
| 738 |
| ], |
| "to_pin": "DOA5", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 698, |
| 718, |
| 738 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 698, |
| 718, |
| 738 |
| ], |
| "to_pin": "DOA6", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 698, |
| 718, |
| 738 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 698, |
| 718, |
| 738 |
| ], |
| "to_pin": "DOA7", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 698, |
| 718, |
| 738 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 698, |
| 718, |
| 738 |
| ], |
| "to_pin": "DOA8", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 698, |
| 718, |
| 738 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 698, |
| 718, |
| 738 |
| ], |
| "to_pin": "DOA9", |
| "type": "IOPath" |
| } |
| ], |
| "DP16KD:REGMODE_A=OUTREG,REGMODE_B=OUTREG": [ |
| { |
| "clock": [ |
| "negedge", |
| "CLKA" |
| ], |
| "type": "Width", |
| "width": [ |
| 1842, |
| 1842, |
| 1842 |
| ] |
| }, |
| { |
| "clock": [ |
| "negedge", |
| "CLKB" |
| ], |
| "type": "Width", |
| "width": [ |
| 1842, |
| 1842, |
| 1842 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "OCEA", |
| "setup": [ |
| 188, |
| 188, |
| 188 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "RSTA", |
| "setup": [ |
| 444, |
| 444, |
| 444 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 154, |
| 154, |
| 154 |
| ], |
| "pin": "CSA0", |
| "setup": [ |
| 27, |
| 27, |
| 27 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 154, |
| 154, |
| 154 |
| ], |
| "pin": "CSA1", |
| "setup": [ |
| 27, |
| 27, |
| 27 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 154, |
| 154, |
| 154 |
| ], |
| "pin": "CSA2", |
| "setup": [ |
| 27, |
| 27, |
| 27 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA0", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA1", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA10", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA11", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA12", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA13", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA14", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA15", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA16", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA17", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA2", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA3", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA4", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA5", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA6", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA7", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA8", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA9", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA0", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA1", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA10", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA11", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA12", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA13", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA2", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA3", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA4", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA5", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA6", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA7", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA8", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA9", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 74, |
| 74, |
| 74 |
| ], |
| "pin": "CEA", |
| "setup": [ |
| 158, |
| 158, |
| 158 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 88, |
| 88, |
| 88 |
| ], |
| "pin": "WEA", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "type": "Width", |
| "width": [ |
| 1842, |
| 1842, |
| 1842 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "OCEB", |
| "setup": [ |
| 196, |
| 196, |
| 196 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "RSTB", |
| "setup": [ |
| 449, |
| 449, |
| 449 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB0", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB1", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB10", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB11", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB12", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB13", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB14", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB15", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB16", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB17", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB2", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB3", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB4", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB5", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB6", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB7", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB8", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB9", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 297, |
| 297, |
| 297 |
| ], |
| "pin": "CSB0", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 297, |
| 297, |
| 297 |
| ], |
| "pin": "CSB1", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 297, |
| 297, |
| 297 |
| ], |
| "pin": "CSB2", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 323, |
| 323, |
| 323 |
| ], |
| "pin": "WEB", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 71, |
| 71, |
| 71 |
| ], |
| "pin": "CEB", |
| "setup": [ |
| 256, |
| 256, |
| 256 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB0", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB1", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB10", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB11", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB12", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB13", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB2", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB3", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB4", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB5", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB6", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB7", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB8", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB9", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "type": "Width", |
| "width": [ |
| 1842, |
| 1842, |
| 1842 |
| ] |
| }, |
| { |
| "falling": [ |
| 679, |
| 698, |
| 718 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 679, |
| 698, |
| 718 |
| ], |
| "to_pin": "DOB0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 679, |
| 698, |
| 718 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 679, |
| 698, |
| 718 |
| ], |
| "to_pin": "DOB1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 679, |
| 698, |
| 718 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 679, |
| 698, |
| 718 |
| ], |
| "to_pin": "DOB10", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 679, |
| 698, |
| 718 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 679, |
| 698, |
| 718 |
| ], |
| "to_pin": "DOB11", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 679, |
| 698, |
| 718 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 679, |
| 698, |
| 718 |
| ], |
| "to_pin": "DOB12", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 679, |
| 698, |
| 718 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 679, |
| 698, |
| 718 |
| ], |
| "to_pin": "DOB13", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 679, |
| 698, |
| 718 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 679, |
| 698, |
| 718 |
| ], |
| "to_pin": "DOB14", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 679, |
| 698, |
| 718 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 679, |
| 698, |
| 718 |
| ], |
| "to_pin": "DOB15", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 679, |
| 698, |
| 718 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 679, |
| 698, |
| 718 |
| ], |
| "to_pin": "DOB16", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 679, |
| 698, |
| 718 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 679, |
| 698, |
| 718 |
| ], |
| "to_pin": "DOB17", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 679, |
| 698, |
| 718 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 679, |
| 698, |
| 718 |
| ], |
| "to_pin": "DOB2", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 679, |
| 698, |
| 718 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 679, |
| 698, |
| 718 |
| ], |
| "to_pin": "DOB3", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 679, |
| 698, |
| 718 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 679, |
| 698, |
| 718 |
| ], |
| "to_pin": "DOB4", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 679, |
| 698, |
| 718 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 679, |
| 698, |
| 718 |
| ], |
| "to_pin": "DOB5", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 679, |
| 698, |
| 718 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 679, |
| 698, |
| 718 |
| ], |
| "to_pin": "DOB6", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 679, |
| 698, |
| 718 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 679, |
| 698, |
| 718 |
| ], |
| "to_pin": "DOB7", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 679, |
| 698, |
| 718 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 679, |
| 698, |
| 718 |
| ], |
| "to_pin": "DOB8", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 679, |
| 698, |
| 718 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 679, |
| 698, |
| 718 |
| ], |
| "to_pin": "DOB9", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 698, |
| 718, |
| 738 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 698, |
| 718, |
| 738 |
| ], |
| "to_pin": "DOA0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 698, |
| 718, |
| 738 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 698, |
| 718, |
| 738 |
| ], |
| "to_pin": "DOA1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 698, |
| 718, |
| 738 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 698, |
| 718, |
| 738 |
| ], |
| "to_pin": "DOA10", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 698, |
| 718, |
| 738 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 698, |
| 718, |
| 738 |
| ], |
| "to_pin": "DOA11", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 698, |
| 718, |
| 738 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 698, |
| 718, |
| 738 |
| ], |
| "to_pin": "DOA12", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 698, |
| 718, |
| 738 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 698, |
| 718, |
| 738 |
| ], |
| "to_pin": "DOA13", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 698, |
| 718, |
| 738 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 698, |
| 718, |
| 738 |
| ], |
| "to_pin": "DOA14", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 698, |
| 718, |
| 738 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 698, |
| 718, |
| 738 |
| ], |
| "to_pin": "DOA15", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 698, |
| 718, |
| 738 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 698, |
| 718, |
| 738 |
| ], |
| "to_pin": "DOA16", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 698, |
| 718, |
| 738 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 698, |
| 718, |
| 738 |
| ], |
| "to_pin": "DOA17", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 698, |
| 718, |
| 738 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 698, |
| 718, |
| 738 |
| ], |
| "to_pin": "DOA2", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 698, |
| 718, |
| 738 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 698, |
| 718, |
| 738 |
| ], |
| "to_pin": "DOA3", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 698, |
| 718, |
| 738 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 698, |
| 718, |
| 738 |
| ], |
| "to_pin": "DOA4", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 698, |
| 718, |
| 738 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 698, |
| 718, |
| 738 |
| ], |
| "to_pin": "DOA5", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 698, |
| 718, |
| 738 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 698, |
| 718, |
| 738 |
| ], |
| "to_pin": "DOA6", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 698, |
| 718, |
| 738 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 698, |
| 718, |
| 738 |
| ], |
| "to_pin": "DOA7", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 698, |
| 718, |
| 738 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 698, |
| 718, |
| 738 |
| ], |
| "to_pin": "DOA8", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 698, |
| 718, |
| 738 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 698, |
| 718, |
| 738 |
| ], |
| "to_pin": "DOA9", |
| "type": "IOPath" |
| } |
| ], |
| "DP16KD:WRITEMODE_A=NORMAL,WRITEMODE_B=NORMAL": [ |
| { |
| "clock": [ |
| "negedge", |
| "CLKA" |
| ], |
| "type": "Width", |
| "width": [ |
| 1842, |
| 1842, |
| 1842 |
| ] |
| }, |
| { |
| "clock": [ |
| "negedge", |
| "CLKB" |
| ], |
| "type": "Width", |
| "width": [ |
| 1842, |
| 1842, |
| 1842 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "OCEA", |
| "setup": [ |
| 188, |
| 188, |
| 188 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "RSTA", |
| "setup": [ |
| 444, |
| 444, |
| 444 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 154, |
| 154, |
| 154 |
| ], |
| "pin": "CSA0", |
| "setup": [ |
| 27, |
| 27, |
| 27 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 154, |
| 154, |
| 154 |
| ], |
| "pin": "CSA1", |
| "setup": [ |
| 27, |
| 27, |
| 27 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 154, |
| 154, |
| 154 |
| ], |
| "pin": "CSA2", |
| "setup": [ |
| 27, |
| 27, |
| 27 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA0", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA1", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA10", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA11", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA12", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA13", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA14", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA15", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA16", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA17", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA2", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA3", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA4", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA5", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA6", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA7", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA8", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA9", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA0", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA1", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA10", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA11", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA12", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA13", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA2", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA3", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA4", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA5", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA6", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA7", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA8", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA9", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 74, |
| 74, |
| 74 |
| ], |
| "pin": "CEA", |
| "setup": [ |
| 158, |
| 158, |
| 158 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 88, |
| 88, |
| 88 |
| ], |
| "pin": "WEA", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "type": "Width", |
| "width": [ |
| 1842, |
| 1842, |
| 1842 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "OCEB", |
| "setup": [ |
| 196, |
| 196, |
| 196 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "RSTB", |
| "setup": [ |
| 449, |
| 449, |
| 449 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB0", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB1", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB10", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB11", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB12", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB13", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB14", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB15", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB16", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB17", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB2", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB3", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB4", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB5", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB6", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB7", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB8", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB9", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 297, |
| 297, |
| 297 |
| ], |
| "pin": "CSB0", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 297, |
| 297, |
| 297 |
| ], |
| "pin": "CSB1", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 297, |
| 297, |
| 297 |
| ], |
| "pin": "CSB2", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 323, |
| 323, |
| 323 |
| ], |
| "pin": "WEB", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 71, |
| 71, |
| 71 |
| ], |
| "pin": "CEB", |
| "setup": [ |
| 256, |
| 256, |
| 256 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB0", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB1", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB10", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB11", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB12", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB13", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB2", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB3", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB4", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB5", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB6", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB7", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB8", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB9", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "type": "Width", |
| "width": [ |
| 1842, |
| 1842, |
| 1842 |
| ] |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA10", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA11", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA12", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA13", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA14", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA15", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA16", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA17", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA2", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA3", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA4", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA5", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA6", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA7", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA8", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA9", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "to_pin": "DOB0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "to_pin": "DOB1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "to_pin": "DOB10", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "to_pin": "DOB11", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "to_pin": "DOB12", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "to_pin": "DOB13", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "to_pin": "DOB14", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "to_pin": "DOB15", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "to_pin": "DOB16", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "to_pin": "DOB17", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "to_pin": "DOB2", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "to_pin": "DOB3", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "to_pin": "DOB4", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "to_pin": "DOB5", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "to_pin": "DOB6", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "to_pin": "DOB7", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "to_pin": "DOB8", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4246, |
| 4254, |
| 4263 |
| ], |
| "to_pin": "DOB9", |
| "type": "IOPath" |
| } |
| ], |
| "DP16KD:WRITEMODE_A=NORMAL,WRITEMODE_B=READBEFOREWRITE": [ |
| { |
| "clock": [ |
| "negedge", |
| "CLKA" |
| ], |
| "type": "Width", |
| "width": [ |
| 1842, |
| 1842, |
| 1842 |
| ] |
| }, |
| { |
| "clock": [ |
| "negedge", |
| "CLKB" |
| ], |
| "type": "Width", |
| "width": [ |
| 2335, |
| 2335, |
| 2335 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "OCEA", |
| "setup": [ |
| 188, |
| 188, |
| 188 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "RSTA", |
| "setup": [ |
| 444, |
| 444, |
| 444 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 154, |
| 154, |
| 154 |
| ], |
| "pin": "CSA0", |
| "setup": [ |
| 27, |
| 27, |
| 27 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 154, |
| 154, |
| 154 |
| ], |
| "pin": "CSA1", |
| "setup": [ |
| 27, |
| 27, |
| 27 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 154, |
| 154, |
| 154 |
| ], |
| "pin": "CSA2", |
| "setup": [ |
| 27, |
| 27, |
| 27 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA0", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA1", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA10", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA11", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA12", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA13", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA14", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA15", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA16", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA17", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA2", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA3", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA4", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA5", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA6", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA7", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA8", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA9", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA0", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA1", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA10", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA11", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA12", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA13", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA2", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA3", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA4", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA5", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA6", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA7", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA8", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA9", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 74, |
| 74, |
| 74 |
| ], |
| "pin": "CEA", |
| "setup": [ |
| 158, |
| 158, |
| 158 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 88, |
| 88, |
| 88 |
| ], |
| "pin": "WEA", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "type": "Width", |
| "width": [ |
| 1842, |
| 1842, |
| 1842 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "OCEB", |
| "setup": [ |
| 196, |
| 196, |
| 196 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "RSTB", |
| "setup": [ |
| 449, |
| 449, |
| 449 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB0", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB1", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB10", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB11", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB12", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB13", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB14", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB15", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB16", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB17", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB2", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB3", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB4", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB5", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB6", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB7", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB8", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB9", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 297, |
| 297, |
| 297 |
| ], |
| "pin": "CSB0", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 297, |
| 297, |
| 297 |
| ], |
| "pin": "CSB1", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 297, |
| 297, |
| 297 |
| ], |
| "pin": "CSB2", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 323, |
| 323, |
| 323 |
| ], |
| "pin": "WEB", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 71, |
| 71, |
| 71 |
| ], |
| "pin": "CEB", |
| "setup": [ |
| 256, |
| 256, |
| 256 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB0", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB1", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB10", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB11", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB12", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB13", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB2", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB3", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB4", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB5", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB6", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB7", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB8", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB9", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "type": "Width", |
| "width": [ |
| 2335, |
| 2335, |
| 2335 |
| ] |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA10", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA11", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA12", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA13", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA14", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA15", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA16", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA17", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA2", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA3", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA4", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA5", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA6", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA7", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA8", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA9", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4248, |
| 4257, |
| 4266 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4248, |
| 4257, |
| 4266 |
| ], |
| "to_pin": "DOB0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4248, |
| 4257, |
| 4266 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4248, |
| 4257, |
| 4266 |
| ], |
| "to_pin": "DOB1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4248, |
| 4257, |
| 4266 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4248, |
| 4257, |
| 4266 |
| ], |
| "to_pin": "DOB10", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4248, |
| 4257, |
| 4266 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4248, |
| 4257, |
| 4266 |
| ], |
| "to_pin": "DOB11", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4248, |
| 4257, |
| 4266 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4248, |
| 4257, |
| 4266 |
| ], |
| "to_pin": "DOB12", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4248, |
| 4257, |
| 4266 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4248, |
| 4257, |
| 4266 |
| ], |
| "to_pin": "DOB13", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4248, |
| 4257, |
| 4266 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4248, |
| 4257, |
| 4266 |
| ], |
| "to_pin": "DOB14", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4248, |
| 4257, |
| 4266 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4248, |
| 4257, |
| 4266 |
| ], |
| "to_pin": "DOB15", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4248, |
| 4257, |
| 4266 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4248, |
| 4257, |
| 4266 |
| ], |
| "to_pin": "DOB16", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4248, |
| 4257, |
| 4266 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4248, |
| 4257, |
| 4266 |
| ], |
| "to_pin": "DOB17", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4248, |
| 4257, |
| 4266 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4248, |
| 4257, |
| 4266 |
| ], |
| "to_pin": "DOB2", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4248, |
| 4257, |
| 4266 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4248, |
| 4257, |
| 4266 |
| ], |
| "to_pin": "DOB3", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4248, |
| 4257, |
| 4266 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4248, |
| 4257, |
| 4266 |
| ], |
| "to_pin": "DOB4", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4248, |
| 4257, |
| 4266 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4248, |
| 4257, |
| 4266 |
| ], |
| "to_pin": "DOB5", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4248, |
| 4257, |
| 4266 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4248, |
| 4257, |
| 4266 |
| ], |
| "to_pin": "DOB6", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4248, |
| 4257, |
| 4266 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4248, |
| 4257, |
| 4266 |
| ], |
| "to_pin": "DOB7", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4248, |
| 4257, |
| 4266 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4248, |
| 4257, |
| 4266 |
| ], |
| "to_pin": "DOB8", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4248, |
| 4257, |
| 4266 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4248, |
| 4257, |
| 4266 |
| ], |
| "to_pin": "DOB9", |
| "type": "IOPath" |
| } |
| ], |
| "DP16KD:WRITEMODE_A=NORMAL,WRITEMODE_B=WRITETHROUGH": [ |
| { |
| "clock": [ |
| "negedge", |
| "CLKA" |
| ], |
| "type": "Width", |
| "width": [ |
| 1842, |
| 1842, |
| 1842 |
| ] |
| }, |
| { |
| "clock": [ |
| "negedge", |
| "CLKB" |
| ], |
| "type": "Width", |
| "width": [ |
| 1831, |
| 1831, |
| 1831 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "OCEA", |
| "setup": [ |
| 188, |
| 188, |
| 188 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "RSTA", |
| "setup": [ |
| 444, |
| 444, |
| 444 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 154, |
| 154, |
| 154 |
| ], |
| "pin": "CSA0", |
| "setup": [ |
| 27, |
| 27, |
| 27 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 154, |
| 154, |
| 154 |
| ], |
| "pin": "CSA1", |
| "setup": [ |
| 27, |
| 27, |
| 27 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 154, |
| 154, |
| 154 |
| ], |
| "pin": "CSA2", |
| "setup": [ |
| 27, |
| 27, |
| 27 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA0", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA1", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA10", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA11", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA12", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA13", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA14", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA15", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA16", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA17", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA2", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA3", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA4", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA5", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA6", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA7", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA8", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 30, |
| 30, |
| 30 |
| ], |
| "pin": "DIA9", |
| "setup": [ |
| 179, |
| 179, |
| 179 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA0", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA1", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA10", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA11", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA12", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA13", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA2", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA3", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA4", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA5", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA6", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA7", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA8", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 5, |
| 5, |
| 5 |
| ], |
| "pin": "ADA9", |
| "setup": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 74, |
| 74, |
| 74 |
| ], |
| "pin": "CEA", |
| "setup": [ |
| 158, |
| 158, |
| 158 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 88, |
| 88, |
| 88 |
| ], |
| "pin": "WEA", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "type": "Width", |
| "width": [ |
| 1842, |
| 1842, |
| 1842 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "OCEB", |
| "setup": [ |
| 196, |
| 196, |
| 196 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "RSTB", |
| "setup": [ |
| 449, |
| 449, |
| 449 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB0", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB1", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB10", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB11", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB12", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB13", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB14", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB15", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB16", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB17", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB2", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB3", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB4", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB5", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB6", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB7", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB8", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DIB9", |
| "setup": [ |
| 129, |
| 129, |
| 129 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 297, |
| 297, |
| 297 |
| ], |
| "pin": "CSB0", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 297, |
| 297, |
| 297 |
| ], |
| "pin": "CSB1", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 297, |
| 297, |
| 297 |
| ], |
| "pin": "CSB2", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 323, |
| 323, |
| 323 |
| ], |
| "pin": "WEB", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 71, |
| 71, |
| 71 |
| ], |
| "pin": "CEB", |
| "setup": [ |
| 256, |
| 256, |
| 256 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB0", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB1", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB10", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB11", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB12", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB13", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB2", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB3", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB4", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB5", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB6", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB7", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB8", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 86, |
| 86, |
| 86 |
| ], |
| "pin": "ADB9", |
| "setup": [ |
| 174, |
| 174, |
| 174 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "type": "Width", |
| "width": [ |
| 1831, |
| 1831, |
| 1831 |
| ] |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA10", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA11", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA12", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA13", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA14", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA15", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA16", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA17", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA2", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA3", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA4", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA5", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA6", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA7", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA8", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 4074, |
| 4086, |
| 4099 |
| ], |
| "to_pin": "DOA9", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4247, |
| 4256, |
| 4266 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4247, |
| 4256, |
| 4266 |
| ], |
| "to_pin": "DOB0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4247, |
| 4256, |
| 4266 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4247, |
| 4256, |
| 4266 |
| ], |
| "to_pin": "DOB1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4247, |
| 4256, |
| 4266 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4247, |
| 4256, |
| 4266 |
| ], |
| "to_pin": "DOB10", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4247, |
| 4256, |
| 4266 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4247, |
| 4256, |
| 4266 |
| ], |
| "to_pin": "DOB11", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4247, |
| 4256, |
| 4266 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4247, |
| 4256, |
| 4266 |
| ], |
| "to_pin": "DOB12", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4247, |
| 4256, |
| 4266 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4247, |
| 4256, |
| 4266 |
| ], |
| "to_pin": "DOB13", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4247, |
| 4256, |
| 4266 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4247, |
| 4256, |
| 4266 |
| ], |
| "to_pin": "DOB14", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4247, |
| 4256, |
| 4266 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4247, |
| 4256, |
| 4266 |
| ], |
| "to_pin": "DOB15", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4247, |
| 4256, |
| 4266 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4247, |
| 4256, |
| 4266 |
| ], |
| "to_pin": "DOB16", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4247, |
| 4256, |
| 4266 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4247, |
| 4256, |
| 4266 |
| ], |
| "to_pin": "DOB17", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4247, |
| 4256, |
| 4266 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4247, |
| 4256, |
| 4266 |
| ], |
| "to_pin": "DOB2", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4247, |
| 4256, |
| 4266 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4247, |
| 4256, |
| 4266 |
| ], |
| "to_pin": "DOB3", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4247, |
| 4256, |
| 4266 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4247, |
| 4256, |
| 4266 |
| ], |
| "to_pin": "DOB4", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4247, |
| 4256, |
| 4266 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4247, |
| 4256, |
| 4266 |
| ], |
| "to_pin": "DOB5", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4247, |
| 4256, |
| 4266 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4247, |
| 4256, |
| 4266 |
| ], |
| "to_pin": "DOB6", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4247, |
| 4256, |
| 4266 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4247, |
| 4256, |
| 4266 |
| ], |
| "to_pin": "DOB7", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4247, |
| 4256, |
| 4266 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4247, |
| 4256, |
| 4266 |
| ], |
| "to_pin": "DOB8", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 4247, |
| 4256, |
| 4266 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 4247, |
| 4256, |
| 4266 |
| ], |
| "to_pin": "DOB9", |
| "type": "IOPath" |
| } |
| ], |
| "IOLOGIC:MODE=IDDRX1F": [ |
| { |
| "clock": [ |
| "negedge", |
| "CLK" |
| ], |
| "type": "Width", |
| "width": [ |
| 2000, |
| 2000, |
| 2000 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "hold": [ |
| 197, |
| 197, |
| 197 |
| ], |
| "pin": "DI", |
| "setup": [ |
| 305, |
| 305, |
| 305 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "type": "Width", |
| "width": [ |
| 2000, |
| 2000, |
| 2000 |
| ] |
| }, |
| { |
| "falling": [ |
| 281, |
| 281, |
| 281 |
| ], |
| "from_pin": "CLK", |
| "rising": [ |
| 281, |
| 281, |
| 281 |
| ], |
| "to_pin": "RXDATA0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 281, |
| 281, |
| 281 |
| ], |
| "from_pin": "CLK", |
| "rising": [ |
| 281, |
| 281, |
| 281 |
| ], |
| "to_pin": "RXDATA1", |
| "type": "IOPath" |
| } |
| ], |
| "IOLOGIC:MODE=IDDRX2F": [ |
| { |
| "clock": [ |
| "negedge", |
| "ECLK" |
| ], |
| "type": "Width", |
| "width": [ |
| 1250, |
| 1250, |
| 1250 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": [ |
| "posedge", |
| "ECLK" |
| ], |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "ECLK" |
| ], |
| "hold": [ |
| 98, |
| 98, |
| 98 |
| ], |
| "pin": "DI", |
| "setup": [ |
| 284, |
| 284, |
| 284 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "ECLK" |
| ], |
| "type": "Width", |
| "width": [ |
| 1250, |
| 1250, |
| 1250 |
| ] |
| }, |
| { |
| "falling": [ |
| 353, |
| 353, |
| 353 |
| ], |
| "from_pin": "CLK", |
| "rising": [ |
| 353, |
| 353, |
| 353 |
| ], |
| "to_pin": "RXDATA0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 353, |
| 353, |
| 353 |
| ], |
| "from_pin": "CLK", |
| "rising": [ |
| 353, |
| 353, |
| 353 |
| ], |
| "to_pin": "RXDATA1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 353, |
| 353, |
| 353 |
| ], |
| "from_pin": "CLK", |
| "rising": [ |
| 353, |
| 353, |
| 353 |
| ], |
| "to_pin": "RXDATA2", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 353, |
| 353, |
| 353 |
| ], |
| "from_pin": "CLK", |
| "rising": [ |
| 353, |
| 353, |
| 353 |
| ], |
| "to_pin": "RXDATA3", |
| "type": "IOPath" |
| } |
| ], |
| "IOLOGIC:MODE=IREG": [ |
| { |
| "clock": [ |
| "negedge", |
| "CLK" |
| ], |
| "type": "Width", |
| "width": [ |
| 1351, |
| 1351, |
| 1351 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "LSR", |
| "setup": [ |
| 81, |
| 81, |
| 81 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "hold": [ |
| 258, |
| 258, |
| 258 |
| ], |
| "pin": "DI", |
| "setup": [ |
| 317, |
| 317, |
| 317 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "hold": [ |
| 62, |
| 62, |
| 62 |
| ], |
| "pin": "CE", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "type": "Width", |
| "width": [ |
| 1351, |
| 1351, |
| 1351 |
| ] |
| }, |
| { |
| "falling": [ |
| 364, |
| 364, |
| 364 |
| ], |
| "from_pin": "CLK", |
| "rising": [ |
| 364, |
| 364, |
| 364 |
| ], |
| "to_pin": "INFF", |
| "type": "IOPath" |
| } |
| ], |
| "IOLOGIC:MODE=ODDRX1F": [ |
| { |
| "clock": [ |
| "negedge", |
| "CLK" |
| ], |
| "type": "Width", |
| "width": [ |
| 2000, |
| 2000, |
| 2000 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "type": "Width", |
| "width": [ |
| 2000, |
| 2000, |
| 2000 |
| ] |
| }, |
| { |
| "falling": [ |
| 739, |
| 741, |
| 743 |
| ], |
| "from_pin": "CLK", |
| "rising": [ |
| 739, |
| 741, |
| 743 |
| ], |
| "to_pin": "IOLDO", |
| "type": "IOPath" |
| } |
| ], |
| "IOLOGIC:MODE=ODDRX2F": [ |
| { |
| "clock": [ |
| "negedge", |
| "ECLK" |
| ], |
| "type": "Width", |
| "width": [ |
| 1250, |
| 1250, |
| 1250 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "TXDATA0", |
| "setup": [ |
| 92, |
| 92, |
| 92 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "TXDATA1", |
| "setup": [ |
| 92, |
| 92, |
| 92 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "TXDATA2", |
| "setup": [ |
| 92, |
| 92, |
| 92 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "TXDATA3", |
| "setup": [ |
| 92, |
| 92, |
| 92 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "ECLK" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": [ |
| "posedge", |
| "CLK" |
| ], |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "ECLK" |
| ], |
| "type": "Width", |
| "width": [ |
| 1250, |
| 1250, |
| 1250 |
| ] |
| }, |
| { |
| "falling": [ |
| 973, |
| 975, |
| 977 |
| ], |
| "from_pin": "ECLK", |
| "rising": [ |
| 973, |
| 975, |
| 977 |
| ], |
| "to_pin": "IOLDO", |
| "type": "IOPath" |
| } |
| ], |
| "IOLOGIC:MODE=OREG": [ |
| { |
| "clock": [ |
| "negedge", |
| "CLK" |
| ], |
| "type": "Width", |
| "width": [ |
| 1351, |
| 1351, |
| 1351 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "LSR", |
| "setup": [ |
| 92, |
| 92, |
| 92 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "TXDATA0", |
| "setup": [ |
| 113, |
| 113, |
| 113 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "hold": [ |
| 59, |
| 59, |
| 59 |
| ], |
| "pin": "CE", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "type": "Width", |
| "width": [ |
| 1351, |
| 1351, |
| 1351 |
| ] |
| }, |
| { |
| "falling": [ |
| 1018, |
| 1018, |
| 1018 |
| ], |
| "from_pin": "CLK", |
| "rising": [ |
| 1018, |
| 1018, |
| 1018 |
| ], |
| "to_pin": "IOLDO", |
| "type": "IOPath" |
| } |
| ], |
| "IOLOGIC:MODE=TSREG": [ |
| { |
| "clock": [ |
| "negedge", |
| "CLK" |
| ], |
| "type": "Width", |
| "width": [ |
| 1351, |
| 1351, |
| 1351 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "LSR", |
| "setup": [ |
| 92, |
| 92, |
| 92 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "TSDATA0", |
| "setup": [ |
| 155, |
| 155, |
| 155 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "hold": [ |
| 59, |
| 59, |
| 59 |
| ], |
| "pin": "CE", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "type": "Width", |
| "width": [ |
| 1351, |
| 1351, |
| 1351 |
| ] |
| }, |
| { |
| "falling": [ |
| 763, |
| 763, |
| 763 |
| ], |
| "from_pin": "CLK", |
| "rising": [ |
| 763, |
| 763, |
| 763 |
| ], |
| "to_pin": "IOLTO", |
| "type": "IOPath" |
| } |
| ], |
| "MULT18X18D:REGS=ALL": [ |
| { |
| "clock": [ |
| "posedge", |
| "CLK0" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 21 |
| ], |
| "pin": "CE0", |
| "setup": [ |
| 147, |
| 178, |
| 210 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK0" |
| ], |
| "hold": [ |
| 0, |
| 5, |
| 32 |
| ], |
| "pin": "A", |
| "setup": [ |
| 21, |
| 31, |
| 42 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK0" |
| ], |
| "hold": [ |
| 0, |
| 5, |
| 32 |
| ], |
| "pin": "B", |
| "setup": [ |
| 21, |
| 31, |
| 42 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK0" |
| ], |
| "hold": [ |
| 126, |
| 136, |
| 147 |
| ], |
| "pin": "SIGNEDA", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK0" |
| ], |
| "hold": [ |
| 126, |
| 136, |
| 147 |
| ], |
| "pin": "SIGNEDB", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK0" |
| ], |
| "hold": [ |
| 42, |
| 52, |
| 63 |
| ], |
| "pin": "RST0", |
| "setup": [ |
| 84, |
| 100, |
| 116 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "falling": [ |
| 483, |
| 530, |
| 578 |
| ], |
| "from_pin": "CLK0", |
| "rising": [ |
| 483, |
| 530, |
| 578 |
| ], |
| "to_pin": "P", |
| "type": "IOPath" |
| } |
| ], |
| "MULT18X18D:REGS=INPUT": [ |
| { |
| "clock": [ |
| "posedge", |
| "CLK0" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 21 |
| ], |
| "pin": "CE0", |
| "setup": [ |
| 147, |
| 178, |
| 210 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK0" |
| ], |
| "hold": [ |
| 0, |
| 5, |
| 32 |
| ], |
| "pin": "A", |
| "setup": [ |
| 21, |
| 31, |
| 42 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK0" |
| ], |
| "hold": [ |
| 0, |
| 5, |
| 32 |
| ], |
| "pin": "B", |
| "setup": [ |
| 21, |
| 31, |
| 42 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK0" |
| ], |
| "hold": [ |
| 126, |
| 136, |
| 147 |
| ], |
| "pin": "SIGNEDA", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK0" |
| ], |
| "hold": [ |
| 126, |
| 136, |
| 147 |
| ], |
| "pin": "SIGNEDB", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK0" |
| ], |
| "hold": [ |
| 42, |
| 52, |
| 63 |
| ], |
| "pin": "RST0", |
| "setup": [ |
| 84, |
| 100, |
| 116 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "falling": [ |
| 2310, |
| 2677, |
| 3045 |
| ], |
| "from_pin": "CLK0", |
| "rising": [ |
| 2310, |
| 2677, |
| 3045 |
| ], |
| "to_pin": "P", |
| "type": "IOPath" |
| } |
| ], |
| "MULT18X18D:REGS=NONE": [ |
| { |
| "falling": [ |
| 2205, |
| 2562, |
| 2919 |
| ], |
| "from_pin": "SIGNEDA", |
| "rising": [ |
| 2205, |
| 2562, |
| 2919 |
| ], |
| "to_pin": "P", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 2205, |
| 2562, |
| 2919 |
| ], |
| "from_pin": "SIGNEDB", |
| "rising": [ |
| 2205, |
| 2562, |
| 2919 |
| ], |
| "to_pin": "P", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 2331, |
| 2698, |
| 3066 |
| ], |
| "from_pin": "A", |
| "rising": [ |
| 2331, |
| 2698, |
| 3066 |
| ], |
| "to_pin": "P", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 2331, |
| 2698, |
| 3066 |
| ], |
| "from_pin": "B", |
| "rising": [ |
| 2331, |
| 2698, |
| 3066 |
| ], |
| "to_pin": "P", |
| "type": "IOPath" |
| } |
| ], |
| "MULT18X18D:REGS=OUTPUT": [ |
| { |
| "clock": [ |
| "posedge", |
| "CLK0" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "A", |
| "setup": [ |
| 2363, |
| 2499, |
| 2635 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK0" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "B", |
| "setup": [ |
| 2363, |
| 2499, |
| 2635 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK0" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "SIGNEDA", |
| "setup": [ |
| 2236, |
| 2362, |
| 2489 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK0" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "SIGNEDB", |
| "setup": [ |
| 2236, |
| 2362, |
| 2489 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK0" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 21 |
| ], |
| "pin": "CE0", |
| "setup": [ |
| 147, |
| 178, |
| 210 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK0" |
| ], |
| "hold": [ |
| 42, |
| 52, |
| 63 |
| ], |
| "pin": "RST0", |
| "setup": [ |
| 84, |
| 100, |
| 116 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "falling": [ |
| 483, |
| 530, |
| 578 |
| ], |
| "from_pin": "CLK0", |
| "rising": [ |
| 483, |
| 530, |
| 578 |
| ], |
| "to_pin": "P", |
| "type": "IOPath" |
| } |
| ], |
| "MULT18X18D:REGS=PIPELINE": [ |
| { |
| "clock": [ |
| "posedge", |
| "CLK0" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "A", |
| "setup": [ |
| 1838, |
| 1911, |
| 1985 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK0" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "B", |
| "setup": [ |
| 1838, |
| 1911, |
| 1985 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK0" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "SIGNEDA", |
| "setup": [ |
| 1712, |
| 1775, |
| 1838 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK0" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "SIGNEDB", |
| "setup": [ |
| 1712, |
| 1775, |
| 1838 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK0" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 21 |
| ], |
| "pin": "CE0", |
| "setup": [ |
| 147, |
| 178, |
| 210 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK0" |
| ], |
| "hold": [ |
| 42, |
| 52, |
| 63 |
| ], |
| "pin": "RST0", |
| "setup": [ |
| 84, |
| 100, |
| 116 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "falling": [ |
| 1082, |
| 1097, |
| 1113 |
| ], |
| "from_pin": "CLK0", |
| "rising": [ |
| 1082, |
| 1097, |
| 1113 |
| ], |
| "to_pin": "P", |
| "type": "IOPath" |
| } |
| ], |
| "PIO:IOTYPE=LVCMOS12": [ |
| { |
| "clock": [ |
| "negedge", |
| "PAD" |
| ], |
| "type": "Width", |
| "width": [ |
| 2500, |
| 2500, |
| 2500 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "PAD" |
| ], |
| "type": "Width", |
| "width": [ |
| 2500, |
| 2500, |
| 2500 |
| ] |
| }, |
| { |
| "falling": [ |
| 1347, |
| 1513, |
| 1679 |
| ], |
| "from_pin": "PADDO", |
| "rising": [ |
| 1347, |
| 1513, |
| 1679 |
| ], |
| "to_pin": "PAD", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 1554, |
| 1800, |
| 2047 |
| ], |
| "from_pin": "PADDT", |
| "rising": [ |
| 1554, |
| 1800, |
| 2047 |
| ], |
| "to_pin": "PAD", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 594, |
| 610, |
| 626 |
| ], |
| "from_pin": "PAD", |
| "rising": [ |
| 594, |
| 610, |
| 626 |
| ], |
| "to_pin": "PADDI", |
| "type": "IOPath" |
| } |
| ], |
| "PIO:IOTYPE=LVCMOS15": [ |
| { |
| "clock": [ |
| "negedge", |
| "PAD" |
| ], |
| "type": "Width", |
| "width": [ |
| 2500, |
| 2500, |
| 2500 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "PAD" |
| ], |
| "type": "Width", |
| "width": [ |
| 2500, |
| 2500, |
| 2500 |
| ] |
| }, |
| { |
| "falling": [ |
| 1396, |
| 1553, |
| 1711 |
| ], |
| "from_pin": "PADDO", |
| "rising": [ |
| 1396, |
| 1553, |
| 1711 |
| ], |
| "to_pin": "PAD", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 1464, |
| 1474, |
| 1484 |
| ], |
| "from_pin": "PAD", |
| "rising": [ |
| 1464, |
| 1474, |
| 1484 |
| ], |
| "to_pin": "PADDI", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 1553, |
| 1734, |
| 1915 |
| ], |
| "from_pin": "PADDT", |
| "rising": [ |
| 1553, |
| 1734, |
| 1915 |
| ], |
| "to_pin": "PAD", |
| "type": "IOPath" |
| } |
| ], |
| "PIO:IOTYPE=LVCMOS18": [ |
| { |
| "clock": [ |
| "negedge", |
| "PAD" |
| ], |
| "type": "Width", |
| "width": [ |
| 2500, |
| 2500, |
| 2500 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "PAD" |
| ], |
| "type": "Width", |
| "width": [ |
| 2500, |
| 2500, |
| 2500 |
| ] |
| }, |
| { |
| "falling": [ |
| 1145, |
| 1191, |
| 1237 |
| ], |
| "from_pin": "PAD", |
| "rising": [ |
| 1145, |
| 1191, |
| 1237 |
| ], |
| "to_pin": "PADDI", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 1441, |
| 1587, |
| 1734 |
| ], |
| "from_pin": "PADDO", |
| "rising": [ |
| 1441, |
| 1587, |
| 1734 |
| ], |
| "to_pin": "PAD", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 1750, |
| 1888, |
| 2027 |
| ], |
| "from_pin": "PADDT", |
| "rising": [ |
| 1750, |
| 1888, |
| 2027 |
| ], |
| "to_pin": "PAD", |
| "type": "IOPath" |
| } |
| ], |
| "PIO:IOTYPE=LVCMOS25": [ |
| { |
| "clock": [ |
| "negedge", |
| "PAD" |
| ], |
| "type": "Width", |
| "width": [ |
| 2500, |
| 2500, |
| 2500 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "PAD" |
| ], |
| "type": "Width", |
| "width": [ |
| 2500, |
| 2500, |
| 2500 |
| ] |
| }, |
| { |
| "falling": [ |
| 1736, |
| 1751, |
| 1766 |
| ], |
| "from_pin": "PADDO", |
| "rising": [ |
| 1736, |
| 1751, |
| 1766 |
| ], |
| "to_pin": "PAD", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 1747, |
| 1843, |
| 1940 |
| ], |
| "from_pin": "PADDT", |
| "rising": [ |
| 1747, |
| 1843, |
| 1940 |
| ], |
| "to_pin": "PAD", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 826, |
| 851, |
| 876 |
| ], |
| "from_pin": "PAD", |
| "rising": [ |
| 826, |
| 851, |
| 876 |
| ], |
| "to_pin": "PADDI", |
| "type": "IOPath" |
| } |
| ], |
| "PIO:IOTYPE=LVCMOS33": [ |
| { |
| "clock": [ |
| "negedge", |
| "PAD" |
| ], |
| "type": "Width", |
| "width": [ |
| 2500, |
| 2500, |
| 2500 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "PAD" |
| ], |
| "type": "Width", |
| "width": [ |
| 2500, |
| 2500, |
| 2500 |
| ] |
| }, |
| { |
| "falling": [ |
| 1819, |
| 2006, |
| 2193 |
| ], |
| "from_pin": "PADDO", |
| "rising": [ |
| 1819, |
| 2006, |
| 2193 |
| ], |
| "to_pin": "PAD", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 2113, |
| 2327, |
| 2542 |
| ], |
| "from_pin": "PADDT", |
| "rising": [ |
| 2113, |
| 2327, |
| 2542 |
| ], |
| "to_pin": "PAD", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 921, |
| 945, |
| 970 |
| ], |
| "from_pin": "PAD", |
| "rising": [ |
| 921, |
| 945, |
| 970 |
| ], |
| "to_pin": "PADDI", |
| "type": "IOPath" |
| } |
| ], |
| "PIO:IOTYPE=LVDS": [ |
| { |
| "clock": [ |
| "negedge", |
| "PAD" |
| ], |
| "type": "Width", |
| "width": [ |
| 1250, |
| 1250, |
| 1250 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "PAD" |
| ], |
| "type": "Width", |
| "width": [ |
| 1250, |
| 1250, |
| 1250 |
| ] |
| }, |
| { |
| "falling": [ |
| 437, |
| 437, |
| 437 |
| ], |
| "from_pin": "PAD", |
| "rising": [ |
| 437, |
| 437, |
| 437 |
| ], |
| "to_pin": "PADDI", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 957, |
| 958, |
| 959 |
| ], |
| "from_pin": "PADDO", |
| "rising": [ |
| 957, |
| 958, |
| 959 |
| ], |
| "to_pin": "PAD", |
| "type": "IOPath" |
| } |
| ], |
| "PIO:IOTYPE=SSTL15_I": [ |
| { |
| "clock": [ |
| "negedge", |
| "PAD" |
| ], |
| "type": "Width", |
| "width": [ |
| 1250, |
| 1250, |
| 1250 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "PAD" |
| ], |
| "type": "Width", |
| "width": [ |
| 1250, |
| 1250, |
| 1250 |
| ] |
| }, |
| { |
| "falling": [ |
| 1758, |
| 1862, |
| 1966 |
| ], |
| "from_pin": "PADDO", |
| "rising": [ |
| 1758, |
| 1862, |
| 1966 |
| ], |
| "to_pin": "PAD", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 1821, |
| 2419, |
| 3017 |
| ], |
| "from_pin": "PADDT", |
| "rising": [ |
| 1821, |
| 2419, |
| 3017 |
| ], |
| "to_pin": "PAD", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 403, |
| 413, |
| 424 |
| ], |
| "from_pin": "PAD", |
| "rising": [ |
| 403, |
| 413, |
| 424 |
| ], |
| "to_pin": "PADDI", |
| "type": "IOPath" |
| } |
| ], |
| "PIO:IOTYPE=SSTL15_II": [ |
| { |
| "clock": [ |
| "negedge", |
| "PAD" |
| ], |
| "type": "Width", |
| "width": [ |
| 1250, |
| 1250, |
| 1250 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "PAD" |
| ], |
| "type": "Width", |
| "width": [ |
| 1250, |
| 1250, |
| 1250 |
| ] |
| }, |
| { |
| "falling": [ |
| 1661, |
| 2432, |
| 3203 |
| ], |
| "from_pin": "PADDT", |
| "rising": [ |
| 1661, |
| 2432, |
| 3203 |
| ], |
| "to_pin": "PAD", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 1678, |
| 1752, |
| 1827 |
| ], |
| "from_pin": "PADDO", |
| "rising": [ |
| 1678, |
| 1752, |
| 1827 |
| ], |
| "to_pin": "PAD", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 403, |
| 413, |
| 424 |
| ], |
| "from_pin": "PAD", |
| "rising": [ |
| 403, |
| 413, |
| 424 |
| ], |
| "to_pin": "PADDI", |
| "type": "IOPath" |
| } |
| ], |
| "PIO:IOTYPE=SSTL18_I": [ |
| { |
| "clock": [ |
| "negedge", |
| "PAD" |
| ], |
| "type": "Width", |
| "width": [ |
| 1250, |
| 1250, |
| 1250 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "PAD" |
| ], |
| "type": "Width", |
| "width": [ |
| 1250, |
| 1250, |
| 1250 |
| ] |
| }, |
| { |
| "falling": [ |
| 1818, |
| 1913, |
| 2008 |
| ], |
| "from_pin": "PADDO", |
| "rising": [ |
| 1818, |
| 1913, |
| 2008 |
| ], |
| "to_pin": "PAD", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 1954, |
| 2379, |
| 2805 |
| ], |
| "from_pin": "PADDT", |
| "rising": [ |
| 1954, |
| 2379, |
| 2805 |
| ], |
| "to_pin": "PAD", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 399, |
| 411, |
| 423 |
| ], |
| "from_pin": "PAD", |
| "rising": [ |
| 399, |
| 411, |
| 423 |
| ], |
| "to_pin": "PADDI", |
| "type": "IOPath" |
| } |
| ], |
| "PIO:IOTYPE=SSTL18_II": [ |
| { |
| "clock": [ |
| "negedge", |
| "PAD" |
| ], |
| "type": "Width", |
| "width": [ |
| 1250, |
| 1250, |
| 1250 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "PAD" |
| ], |
| "type": "Width", |
| "width": [ |
| 1250, |
| 1250, |
| 1250 |
| ] |
| }, |
| { |
| "falling": [ |
| 1519, |
| 2431, |
| 3344 |
| ], |
| "from_pin": "PADDT", |
| "rising": [ |
| 1519, |
| 2431, |
| 3344 |
| ], |
| "to_pin": "PAD", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 1584, |
| 1648, |
| 1712 |
| ], |
| "from_pin": "PADDO", |
| "rising": [ |
| 1584, |
| 1648, |
| 1712 |
| ], |
| "to_pin": "PAD", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 399, |
| 411, |
| 423 |
| ], |
| "from_pin": "PAD", |
| "rising": [ |
| 399, |
| 411, |
| 423 |
| ], |
| "to_pin": "PADDI", |
| "type": "IOPath" |
| } |
| ], |
| "SCCU2C": [ |
| { |
| "clock": [ |
| "negedge", |
| "CLK" |
| ], |
| "type": "Width", |
| "width": [ |
| 1134, |
| 1134, |
| 1134 |
| ] |
| }, |
| { |
| "clock": [ |
| "negedge", |
| "LSR" |
| ], |
| "type": "Width", |
| "width": [ |
| 567, |
| 567, |
| 567 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "LSR", |
| "setup": [ |
| 187, |
| 236, |
| 286 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "LSR", |
| "setup": [ |
| 187, |
| 237, |
| 287 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "hold": [ |
| 113, |
| 114, |
| 116 |
| ], |
| "pin": "CE", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "hold": [ |
| 213, |
| 222, |
| 232 |
| ], |
| "pin": "DI0", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "hold": [ |
| 213, |
| 222, |
| 232 |
| ], |
| "pin": "DI1", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "hold": [ |
| 214, |
| 223, |
| 232 |
| ], |
| "pin": "DI0", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "type": "Width", |
| "width": [ |
| 1134, |
| 1134, |
| 1134 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "LSR" |
| ], |
| "type": "Width", |
| "width": [ |
| 567, |
| 567, |
| 567 |
| ] |
| }, |
| { |
| "falling": [ |
| 144, |
| 249, |
| 355 |
| ], |
| "from_pin": "A0", |
| "rising": [ |
| 144, |
| 249, |
| 355 |
| ], |
| "to_pin": "FCO", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 144, |
| 249, |
| 355 |
| ], |
| "from_pin": "A1", |
| "rising": [ |
| 144, |
| 249, |
| 355 |
| ], |
| "to_pin": "FCO", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 144, |
| 249, |
| 355 |
| ], |
| "from_pin": "B0", |
| "rising": [ |
| 144, |
| 249, |
| 355 |
| ], |
| "to_pin": "FCO", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 144, |
| 249, |
| 355 |
| ], |
| "from_pin": "B1", |
| "rising": [ |
| 144, |
| 249, |
| 355 |
| ], |
| "to_pin": "FCO", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 144, |
| 249, |
| 355 |
| ], |
| "from_pin": "C0", |
| "rising": [ |
| 144, |
| 249, |
| 355 |
| ], |
| "to_pin": "FCO", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 144, |
| 249, |
| 355 |
| ], |
| "from_pin": "C1", |
| "rising": [ |
| 144, |
| 249, |
| 355 |
| ], |
| "to_pin": "FCO", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 144, |
| 249, |
| 355 |
| ], |
| "from_pin": "D0", |
| "rising": [ |
| 144, |
| 249, |
| 355 |
| ], |
| "to_pin": "FCO", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 144, |
| 249, |
| 355 |
| ], |
| "from_pin": "D1", |
| "rising": [ |
| 144, |
| 249, |
| 355 |
| ], |
| "to_pin": "FCO", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 153, |
| 166, |
| 180 |
| ], |
| "from_pin": "A0", |
| "rising": [ |
| 153, |
| 166, |
| 180 |
| ], |
| "to_pin": "F0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 153, |
| 166, |
| 180 |
| ], |
| "from_pin": "A1", |
| "rising": [ |
| 153, |
| 166, |
| 180 |
| ], |
| "to_pin": "F1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 153, |
| 166, |
| 180 |
| ], |
| "from_pin": "B0", |
| "rising": [ |
| 153, |
| 166, |
| 180 |
| ], |
| "to_pin": "F0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 153, |
| 166, |
| 180 |
| ], |
| "from_pin": "B1", |
| "rising": [ |
| 153, |
| 166, |
| 180 |
| ], |
| "to_pin": "F1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 153, |
| 166, |
| 180 |
| ], |
| "from_pin": "C0", |
| "rising": [ |
| 153, |
| 166, |
| 180 |
| ], |
| "to_pin": "F0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 153, |
| 166, |
| 180 |
| ], |
| "from_pin": "C1", |
| "rising": [ |
| 153, |
| 166, |
| 180 |
| ], |
| "to_pin": "F1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 153, |
| 166, |
| 180 |
| ], |
| "from_pin": "D0", |
| "rising": [ |
| 153, |
| 166, |
| 180 |
| ], |
| "to_pin": "F0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 153, |
| 166, |
| 180 |
| ], |
| "from_pin": "D1", |
| "rising": [ |
| 153, |
| 166, |
| 180 |
| ], |
| "to_pin": "F1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 179, |
| 253, |
| 328 |
| ], |
| "from_pin": "FCI", |
| "rising": [ |
| 179, |
| 253, |
| 328 |
| ], |
| "to_pin": "F0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 257, |
| 303, |
| 349 |
| ], |
| "from_pin": "FCI", |
| "rising": [ |
| 257, |
| 303, |
| 349 |
| ], |
| "to_pin": "F1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 328, |
| 360, |
| 393 |
| ], |
| "from_pin": "CLK", |
| "rising": [ |
| 328, |
| 360, |
| 393 |
| ], |
| "to_pin": "Q1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 329, |
| 362, |
| 395 |
| ], |
| "from_pin": "CLK", |
| "rising": [ |
| 329, |
| 362, |
| 395 |
| ], |
| "to_pin": "Q0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 449, |
| 474, |
| 500 |
| ], |
| "from_pin": "A0", |
| "rising": [ |
| 449, |
| 474, |
| 500 |
| ], |
| "to_pin": "F1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 449, |
| 474, |
| 500 |
| ], |
| "from_pin": "B0", |
| "rising": [ |
| 449, |
| 474, |
| 500 |
| ], |
| "to_pin": "F1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 449, |
| 474, |
| 500 |
| ], |
| "from_pin": "C0", |
| "rising": [ |
| 449, |
| 474, |
| 500 |
| ], |
| "to_pin": "F1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 449, |
| 474, |
| 500 |
| ], |
| "from_pin": "D0", |
| "rising": [ |
| 449, |
| 474, |
| 500 |
| ], |
| "to_pin": "F1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 50, |
| 53, |
| 56 |
| ], |
| "from_pin": "FCI", |
| "rising": [ |
| 50, |
| 53, |
| 56 |
| ], |
| "to_pin": "FCO", |
| "type": "IOPath" |
| } |
| ], |
| "SDPRAME": [ |
| { |
| "clock": [ |
| "negedge", |
| "CLK" |
| ], |
| "type": "Width", |
| "width": [ |
| 1134, |
| 1134, |
| 1134 |
| ] |
| }, |
| { |
| "clock": [ |
| "negedge", |
| "WCK" |
| ], |
| "type": "Width", |
| "width": [ |
| 567, |
| 567, |
| 567 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "hold": [ |
| 213, |
| 222, |
| 232 |
| ], |
| "pin": "DI0", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "hold": [ |
| 213, |
| 222, |
| 232 |
| ], |
| "pin": "DI1", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "type": "Width", |
| "width": [ |
| 1134, |
| 1134, |
| 1134 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "WCK" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "WRE", |
| "setup": [ |
| 183, |
| 224, |
| 266 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "WCK" |
| ], |
| "hold": [ |
| 169, |
| 196, |
| 224 |
| ], |
| "pin": "WD0", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "WCK" |
| ], |
| "hold": [ |
| 172, |
| 197, |
| 223 |
| ], |
| "pin": "WD1", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "WCK" |
| ], |
| "hold": [ |
| 216, |
| 241, |
| 267 |
| ], |
| "pin": "WAD2", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "WCK" |
| ], |
| "hold": [ |
| 224, |
| 248, |
| 272 |
| ], |
| "pin": "WAD0", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "WCK" |
| ], |
| "hold": [ |
| 229, |
| 252, |
| 275 |
| ], |
| "pin": "WAD3", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "WCK" |
| ], |
| "hold": [ |
| 232, |
| 255, |
| 278 |
| ], |
| "pin": "WAD1", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "WCK" |
| ], |
| "type": "Width", |
| "width": [ |
| 567, |
| 567, |
| 567 |
| ] |
| }, |
| { |
| "falling": [ |
| 153, |
| 166, |
| 180 |
| ], |
| "from_pin": "RAD0", |
| "rising": [ |
| 153, |
| 166, |
| 180 |
| ], |
| "to_pin": "F0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 153, |
| 166, |
| 180 |
| ], |
| "from_pin": "RAD0", |
| "rising": [ |
| 153, |
| 166, |
| 180 |
| ], |
| "to_pin": "F1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 153, |
| 166, |
| 180 |
| ], |
| "from_pin": "RAD1", |
| "rising": [ |
| 153, |
| 166, |
| 180 |
| ], |
| "to_pin": "F0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 153, |
| 166, |
| 180 |
| ], |
| "from_pin": "RAD1", |
| "rising": [ |
| 153, |
| 166, |
| 180 |
| ], |
| "to_pin": "F1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 153, |
| 166, |
| 180 |
| ], |
| "from_pin": "RAD2", |
| "rising": [ |
| 153, |
| 166, |
| 180 |
| ], |
| "to_pin": "F0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 153, |
| 166, |
| 180 |
| ], |
| "from_pin": "RAD2", |
| "rising": [ |
| 153, |
| 166, |
| 180 |
| ], |
| "to_pin": "F1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 153, |
| 166, |
| 180 |
| ], |
| "from_pin": "RAD3", |
| "rising": [ |
| 153, |
| 166, |
| 180 |
| ], |
| "to_pin": "F0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 153, |
| 166, |
| 180 |
| ], |
| "from_pin": "RAD3", |
| "rising": [ |
| 153, |
| 166, |
| 180 |
| ], |
| "to_pin": "F1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 328, |
| 360, |
| 393 |
| ], |
| "from_pin": "CLK", |
| "rising": [ |
| 328, |
| 360, |
| 393 |
| ], |
| "to_pin": "Q1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 329, |
| 362, |
| 395 |
| ], |
| "from_pin": "CLK", |
| "rising": [ |
| 329, |
| 362, |
| 395 |
| ], |
| "to_pin": "Q0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 706, |
| 710, |
| 714 |
| ], |
| "from_pin": "WCK", |
| "rising": [ |
| 706, |
| 710, |
| 714 |
| ], |
| "to_pin": "F0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 708, |
| 712, |
| 717 |
| ], |
| "from_pin": "WCK", |
| "rising": [ |
| 708, |
| 712, |
| 717 |
| ], |
| "to_pin": "F1", |
| "type": "IOPath" |
| } |
| ], |
| "SLOGICB": [ |
| { |
| "clock": [ |
| "negedge", |
| "CLK" |
| ], |
| "type": "Width", |
| "width": [ |
| 1134, |
| 1134, |
| 1134 |
| ] |
| }, |
| { |
| "clock": [ |
| "negedge", |
| "LSR" |
| ], |
| "type": "Width", |
| "width": [ |
| 567, |
| 567, |
| 567 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "LSR", |
| "setup": [ |
| 187, |
| 237, |
| 287 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "hold": [ |
| 113, |
| 114, |
| 116 |
| ], |
| "pin": "CE", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "hold": [ |
| 196, |
| 213, |
| 231 |
| ], |
| "pin": "M0", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "hold": [ |
| 196, |
| 214, |
| 232 |
| ], |
| "pin": "M1", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "hold": [ |
| 213, |
| 222, |
| 232 |
| ], |
| "pin": "DI0", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "hold": [ |
| 213, |
| 222, |
| 232 |
| ], |
| "pin": "DI1", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "hold": [ |
| 214, |
| 223, |
| 232 |
| ], |
| "pin": "DI0", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "type": "Width", |
| "width": [ |
| 1134, |
| 1134, |
| 1134 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "LSR" |
| ], |
| "type": "Width", |
| "width": [ |
| 567, |
| 567, |
| 567 |
| ] |
| }, |
| { |
| "falling": [ |
| 142, |
| 160, |
| 179 |
| ], |
| "from_pin": "FXA", |
| "rising": [ |
| 142, |
| 160, |
| 179 |
| ], |
| "to_pin": "OFX1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 142, |
| 161, |
| 180 |
| ], |
| "from_pin": "FXB", |
| "rising": [ |
| 142, |
| 161, |
| 180 |
| ], |
| "to_pin": "OFX1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 145, |
| 167, |
| 190 |
| ], |
| "from_pin": "M1", |
| "rising": [ |
| 145, |
| 167, |
| 190 |
| ], |
| "to_pin": "OFX1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 145, |
| 169, |
| 193 |
| ], |
| "from_pin": "M0", |
| "rising": [ |
| 145, |
| 169, |
| 193 |
| ], |
| "to_pin": "OFX0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 153, |
| 166, |
| 180 |
| ], |
| "from_pin": "A0", |
| "rising": [ |
| 153, |
| 166, |
| 180 |
| ], |
| "to_pin": "F0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 153, |
| 166, |
| 180 |
| ], |
| "from_pin": "A1", |
| "rising": [ |
| 153, |
| 166, |
| 180 |
| ], |
| "to_pin": "F1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 153, |
| 166, |
| 180 |
| ], |
| "from_pin": "B0", |
| "rising": [ |
| 153, |
| 166, |
| 180 |
| ], |
| "to_pin": "F0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 153, |
| 166, |
| 180 |
| ], |
| "from_pin": "B1", |
| "rising": [ |
| 153, |
| 166, |
| 180 |
| ], |
| "to_pin": "F1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 153, |
| 166, |
| 180 |
| ], |
| "from_pin": "C0", |
| "rising": [ |
| 153, |
| 166, |
| 180 |
| ], |
| "to_pin": "F0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 153, |
| 166, |
| 180 |
| ], |
| "from_pin": "C1", |
| "rising": [ |
| 153, |
| 166, |
| 180 |
| ], |
| "to_pin": "F1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 153, |
| 166, |
| 180 |
| ], |
| "from_pin": "D0", |
| "rising": [ |
| 153, |
| 166, |
| 180 |
| ], |
| "to_pin": "F0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 153, |
| 166, |
| 180 |
| ], |
| "from_pin": "D1", |
| "rising": [ |
| 153, |
| 166, |
| 180 |
| ], |
| "to_pin": "F1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 200, |
| 253, |
| 306 |
| ], |
| "from_pin": "A0", |
| "rising": [ |
| 200, |
| 253, |
| 306 |
| ], |
| "to_pin": "OFX0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 200, |
| 253, |
| 306 |
| ], |
| "from_pin": "A1", |
| "rising": [ |
| 200, |
| 253, |
| 306 |
| ], |
| "to_pin": "OFX0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 200, |
| 253, |
| 306 |
| ], |
| "from_pin": "B0", |
| "rising": [ |
| 200, |
| 253, |
| 306 |
| ], |
| "to_pin": "OFX0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 200, |
| 253, |
| 306 |
| ], |
| "from_pin": "B1", |
| "rising": [ |
| 200, |
| 253, |
| 306 |
| ], |
| "to_pin": "OFX0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 200, |
| 253, |
| 306 |
| ], |
| "from_pin": "C0", |
| "rising": [ |
| 200, |
| 253, |
| 306 |
| ], |
| "to_pin": "OFX0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 200, |
| 253, |
| 306 |
| ], |
| "from_pin": "C1", |
| "rising": [ |
| 200, |
| 253, |
| 306 |
| ], |
| "to_pin": "OFX0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 200, |
| 253, |
| 306 |
| ], |
| "from_pin": "D0", |
| "rising": [ |
| 200, |
| 253, |
| 306 |
| ], |
| "to_pin": "OFX0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 200, |
| 253, |
| 306 |
| ], |
| "from_pin": "D1", |
| "rising": [ |
| 200, |
| 253, |
| 306 |
| ], |
| "to_pin": "OFX0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 328, |
| 360, |
| 393 |
| ], |
| "from_pin": "CLK", |
| "rising": [ |
| 328, |
| 360, |
| 393 |
| ], |
| "to_pin": "Q1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 329, |
| 362, |
| 395 |
| ], |
| "from_pin": "CLK", |
| "rising": [ |
| 329, |
| 362, |
| 395 |
| ], |
| "to_pin": "Q0", |
| "type": "IOPath" |
| } |
| ], |
| "SRAMWB": [ |
| { |
| "falling": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "from_pin": "A0", |
| "rising": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "to_pin": "WADO3", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "from_pin": "A1", |
| "rising": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "to_pin": "WDO1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "from_pin": "B0", |
| "rising": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "to_pin": "WADO1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "from_pin": "B1", |
| "rising": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "to_pin": "WDO3", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "from_pin": "C0", |
| "rising": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "to_pin": "WADO2", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "from_pin": "C1", |
| "rising": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "to_pin": "WDO0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "from_pin": "D0", |
| "rising": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "to_pin": "WADO0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "from_pin": "D1", |
| "rising": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "to_pin": "WDO2", |
| "type": "IOPath" |
| } |
| ] |
| } |