Update to prjtrellis 31495430626060ea99f0c8a3cfa383f9482803be

Signed-off-by: David Shah <davey1576@gmail.com>

ECP5/tiledata/PLL0_LL/bits.db

diff --git a/ECP5/tiledata/PLL0_LL/bits.db b/ECP5/tiledata/PLL0_LL/bits.db
index a26fc62..3d10d67 100644
--- a/ECP5/tiledata/PLL0_LL/bits.db
+++ b/ECP5/tiledata/PLL0_LL/bits.db
@@ -170,9 +170,10 @@
 .config MFG_LF_RESGRND 0
 F67B0
 
-.config PLL_LOCK_MODE 00
+.config PLL_LOCK_MODE 000
 F32B0
 F33B0
+F34B0
 
 .config_enum FEEDBK_PATH USERCLOCK
 CLKOP -

ECP5/tiledata/PLL0_LR/bits.db

diff --git a/ECP5/tiledata/PLL0_LR/bits.db b/ECP5/tiledata/PLL0_LR/bits.db
index eaa4a82..575d3dc 100644
--- a/ECP5/tiledata/PLL0_LR/bits.db
+++ b/ECP5/tiledata/PLL0_LR/bits.db
@@ -170,9 +170,10 @@
 .config MFG_LF_RESGRND 0
 F67B0
 
-.config PLL_LOCK_MODE 00
+.config PLL_LOCK_MODE 000
 F32B0
 F33B0
+F34B0
 
 .config_enum FEEDBK_PATH USERCLOCK
 CLKOP -

ECP5/tiledata/PLL0_UL/bits.db

diff --git a/ECP5/tiledata/PLL0_UL/bits.db b/ECP5/tiledata/PLL0_UL/bits.db
index 0b6333d..07f3ffa 100644
--- a/ECP5/tiledata/PLL0_UL/bits.db
+++ b/ECP5/tiledata/PLL0_UL/bits.db
@@ -164,9 +164,10 @@
 .config MFG_LF_RESGRND 0
 F7B6
 
-.config PLL_LOCK_MODE 00
+.config PLL_LOCK_MODE 000
 F2B3
 F3B3
+F4B3
 
 .config_enum FEEDBK_PATH USERCLOCK
 CLKOP -

ECP5/tiledata/PLL0_UR/bits.db

diff --git a/ECP5/tiledata/PLL0_UR/bits.db b/ECP5/tiledata/PLL0_UR/bits.db
index 1829cd1..62757b0 100644
--- a/ECP5/tiledata/PLL0_UR/bits.db
+++ b/ECP5/tiledata/PLL0_UR/bits.db
@@ -176,9 +176,10 @@
 .config MFG_LF_RESGRND 0
 F2B6
 
-.config PLL_LOCK_MODE 00
+.config PLL_LOCK_MODE 000
 F7B3
 F6B3
+F5B3
 
 .config_enum FEEDBK_PATH USERCLOCK
 CLKOP -