Update from prjtrellis e0fff2fc31bb24cf5aaffb1d591aedc6f1f20c06 Signed-off-by: David Shah <davey1576@gmail.com>
diff --git a/ECP5/tiledata/PLC2/bits.db b/ECP5/tiledata/PLC2/bits.db index 9b18c76..a769e11 100644 --- a/ECP5/tiledata/PLC2/bits.db +++ b/ECP5/tiledata/PLC2/bits.db
@@ -1573,6 +1573,50 @@ LSR1 F98B10 LSR0 F99B10 +.mux N1_V01N0001 +Q1 F98B0 F99B1 +N3_V06S0003 F97B1 F99B1 +Q5 F99B0 F99B1 +F0 F97B0 F101B1 +F4 F98B1 F101B1 +Q7 F97B0 F105B0 +G_HPBX0200 F98B0 F100B0 +F3 F98B1 F105B0 +Q2 F99B0 F100B0 +Q6 F97B0 F100B0 +G_HPBX0600 F98B0 F105B0 +F6 F97B1 F105B0 +F2 F98B1 F100B0 +Q3 F99B0 F105B0 +Q4 F99B0 F101B1 +F5 F97B1 F100B0 +Q0 F98B0 F101B1 +F7 F97B1 F101B1 +F1 F97B0 F99B1 +S3_V06N0003 F98B1 F99B1 + +.mux N1_V01N0101 +F6 F88B1 F91B1 +Q1 F87B0 F89B0 +G_HPBX0300 F87B0 F90B0 +G_HPBX0700 F87B0 F91B1 +F0 F86B1 F87B1 +Q3 F88B0 F91B1 +Q2 F88B0 F90B0 +Q4 F87B1 F88B0 +F5 F88B1 F90B0 +F2 F89B1 F90B0 +Q0 F87B0 F87B1 +N3_V06S0203 F88B1 F89B0 +F7 F87B1 F88B1 +F4 F87B1 F89B1 +Q5 F88B0 F89B0 +Q6 F86B1 F90B0 +F1 F86B1 F89B0 +F3 F89B1 F91B1 +Q7 F86B1 F91B1 +S3_V06N0203 F89B0 F89B1 + .mux N1_V02N0001 Q2 F12B8 F14B8 S1_V02N0501 F11B8 F12B9 @@ -2607,6 +2651,30 @@ ASYNC F104B11 LSR_OVER_CE !F104B11 +.config_enum SLICEA.A0MUX A0 +1 F2B3 F4B2 +A0 + +.config_enum SLICEA.A1MUX A1 +1 F5B3 F7B3 +A1 + +.config_enum SLICEA.B0MUX B0 +1 F2B7 F4B6 +B0 + +.config_enum SLICEA.B1MUX B1 +1 F5B7 F7B7 +B1 + +.config_enum SLICEA.C0MUX C0 +1 F2B5 F4B4 +C0 + +.config_enum SLICEA.C1MUX C1 +1 F5B5 F7B5 +C1 + .config_enum SLICEA.CCU2.INJECT1_0 YES NO F8B10 YES !F8B10 @@ -2621,10 +2689,26 @@ CE INV F5B10 +.config_enum SLICEA.D0MUX D0 +1 F2B9 F4B8 +D0 + +.config_enum SLICEA.D1MUX D1 +1 F5B9 F7B9 +D1 + .config_enum SLICEA.GSR ENABLED DISABLED F4B10 ENABLED !F4B10 +.config_enum SLICEA.M0MUX M0 +1 F2B1 F4B0 +M0 + +.config_enum SLICEA.M1MUX M1 +1 F8B1 F10B0 +M1 + .config_enum SLICEA.MODE LOGIC CCU2 F9B10 F9B11 DPRAM F50B11 @@ -2646,6 +2730,36 @@ 0 F7B11 1 !F7B11 +.config_enum SLICEA.WREMUX WRE +0 F29B1 F32B1 F55B11 +1 F29B1 F32B1 +INV F55B11 +WRE + +.config_enum SLICEB.A0MUX A0 +1 F21B3 F23B3 +A0 + +.config_enum SLICEB.A1MUX A1 +1 F24B2 F26B3 +A1 + +.config_enum SLICEB.B0MUX B0 +1 F21B7 F23B7 +B0 + +.config_enum SLICEB.B1MUX B1 +1 F24B6 F26B7 +B1 + +.config_enum SLICEB.C0MUX C0 +1 F21B5 F23B5 +C0 + +.config_enum SLICEB.C1MUX C1 +1 F24B4 F26B5 +C1 + .config_enum SLICEB.CCU2.INJECT1_0 YES NO F43B10 YES !F43B10 @@ -2660,10 +2774,26 @@ CE INV F46B10 +.config_enum SLICEB.D0MUX D0 +1 F21B9 F23B9 +D0 + +.config_enum SLICEB.D1MUX D1 +1 F24B8 F26B9 +D1 + .config_enum SLICEB.GSR ENABLED DISABLED F47B10 ENABLED !F47B10 +.config_enum SLICEB.M0MUX M0 +1 F3B0 F5B1 +M0 + +.config_enum SLICEB.M1MUX M1 +1 F22B1 F24B0 +M1 + .config_enum SLICEB.MODE LOGIC CCU2 F42B10 F42B11 DPRAM F50B11 @@ -2685,6 +2815,30 @@ 0 F44B11 1 !F44B11 +.config_enum SLICEC.A0MUX A0 +1 F31B3 F33B2 +A0 + +.config_enum SLICEC.A1MUX A1 +1 F34B3 F36B3 +A1 + +.config_enum SLICEC.B0MUX B0 +1 F31B7 F33B6 +B0 + +.config_enum SLICEC.B1MUX B1 +1 F34B7 F36B7 +B1 + +.config_enum SLICEC.C0MUX C0 +1 F31B5 F33B4 +C0 + +.config_enum SLICEC.C1MUX C1 +1 F34B5 F36B5 +C1 + .config_enum SLICEC.CCU2.INJECT1_0 YES NO F62B10 YES !F62B10 @@ -2699,10 +2853,26 @@ CE INV F59B10 +.config_enum SLICEC.D0MUX D0 +1 F31B9 F33B8 +D0 + +.config_enum SLICEC.D1MUX D1 +1 F34B9 F36B9 +D1 + .config_enum SLICEC.GSR ENABLED DISABLED F58B10 ENABLED !F58B10 +.config_enum SLICEC.M0MUX M0 +1 F16B1 F18B0 +M0 + +.config_enum SLICEC.M1MUX M1 +1 F9B0 F11B1 +M1 + .config_enum SLICEC.MODE LOGIC CCU2 F63B10 F63B11 LOGIC @@ -2724,6 +2894,30 @@ 0 F61B11 1 !F61B11 +.config_enum SLICED.A0MUX A0 +1 F50B3 F52B3 +A0 + +.config_enum SLICED.A1MUX A1 +1 F53B2 F55B3 +A1 + +.config_enum SLICED.B0MUX B0 +1 F50B7 F52B7 +B0 + +.config_enum SLICED.B1MUX B1 +1 F53B6 F55B7 +B1 + +.config_enum SLICED.C0MUX C0 +1 F50B5 F52B5 +C0 + +.config_enum SLICED.C1MUX C1 +1 F53B4 F55B5 +C1 + .config_enum SLICED.CCU2.INJECT1_0 YES NO F97B10 YES !F97B10 @@ -2738,10 +2932,26 @@ CE INV F100B10 +.config_enum SLICED.D0MUX D0 +1 F50B9 F52B9 +D0 + +.config_enum SLICED.D1MUX D1 +1 F53B8 F55B9 +D1 + .config_enum SLICED.GSR ENABLED DISABLED F101B10 ENABLED !F101B10 +.config_enum SLICED.M0MUX M0 +1 F17B0 F19B1 +M0 + +.config_enum SLICED.M1MUX M1 +1 F23B0 F25B1 +M1 + .config_enum SLICED.MODE LOGIC CCU2 F96B10 F96B11 LOGIC