Update to prjtrellis 6d2d00db04d298ee228ec4cf37223f332d9f767d Signed-off-by: David Shah <dave@ds0.me>
diff --git a/ECP5/timing/speed_6/cells.json b/ECP5/timing/speed_6/cells.json index 3f88701..a253f86 100644 --- a/ECP5/timing/speed_6/cells.json +++ b/ECP5/timing/speed_6/cells.json
@@ -13957,6 +13957,568 @@ "type": "IOPath" } ], + "MULT18X18D:REGS=ALL": [ + { + "clock": [ + "posedge", + "CLK0" + ], + "hold": [ + 0, + 0, + 21 + ], + "pin": "A", + "setup": [ + 53, + 68, + 84 + ], + "type": "SetupHold" + }, + { + "clock": [ + "posedge", + "CLK0" + ], + "hold": [ + 0, + 0, + 21 + ], + "pin": "B", + "setup": [ + 53, + 68, + 84 + ], + "type": "SetupHold" + }, + { + "clock": [ + "posedge", + "CLK0" + ], + "hold": [ + 0, + 0, + 21 + ], + "pin": "CE0", + "setup": [ + 147, + 199, + 252 + ], + "type": "SetupHold" + }, + { + "clock": [ + "posedge", + "CLK0" + ], + "hold": [ + 137, + 152, + 168 + ], + "pin": "SIGNEDA", + "setup": [ + 0, + 0, + 0 + ], + "type": "SetupHold" + }, + { + "clock": [ + "posedge", + "CLK0" + ], + "hold": [ + 137, + 152, + 168 + ], + "pin": "SIGNEDB", + "setup": [ + 0, + 0, + 0 + ], + "type": "SetupHold" + }, + { + "clock": [ + "posedge", + "CLK0" + ], + "hold": [ + 63, + 73, + 84 + ], + "pin": "RST0", + "setup": [ + 63, + 79, + 95 + ], + "type": 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diff --git a/ECP5/timing/speed_7/cells.json b/ECP5/timing/speed_7/cells.json index 8e53614..b9c105b 100644 --- a/ECP5/timing/speed_7/cells.json +++ b/ECP5/timing/speed_7/cells.json
@@ -13957,6 +13957,568 @@ "type": "IOPath" } ], + "MULT18X18D:REGS=ALL": [ + { + "clock": [ + "posedge", + "CLK0" + ], + "hold": [ + 0, + 0, + 21 + ], + "pin": "CE0", + "setup": [ + 147, + 189, + 231 + ], + "type": "SetupHold" + }, + { + "clock": [ + "posedge", + "CLK0" + ], + "hold": [ + 0, + 0, + 26 + ], + "pin": "A", + "setup": [ + 37, + 50, + 63 + ], + "type": "SetupHold" + }, + { + "clock": [ + "posedge", + "CLK0" + ], + "hold": [ + 0, + 0, + 26 + ], + "pin": "B", + "setup": [ + 37, + 50, + 63 + ], + "type": "SetupHold" + }, + { + "clock": [ + "posedge", + "CLK0" + ], + "hold": [ + 131, + 144, + 158 + ], + "pin": "SIGNEDA", + "setup": [ + 0, + 0, + 0 + ], + "type": "SetupHold" + }, + { + "clock": [ + "posedge", + "CLK0" + ], + "hold": [ + 131, + 144, + 158 + ], + "pin": "SIGNEDB", + "setup": [ + 0, + 0, + 0 + ], + "type": "SetupHold" + }, + { + "clock": [ + "posedge", + "CLK0" + ], + "hold": [ + 53, + 63, + 74 + ], + "pin": "RST0", + "setup": [ + 74, + 89, + 105 + ], + "type": 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diff --git a/ECP5/timing/speed_8/cells.json b/ECP5/timing/speed_8/cells.json index 438383a..0c1a1a6 100644 --- a/ECP5/timing/speed_8/cells.json +++ b/ECP5/timing/speed_8/cells.json
@@ -13957,6 +13957,568 @@ "type": "IOPath" } ], + "MULT18X18D:REGS=ALL": [ + { + "clock": [ + "posedge", + "CLK0" + ], + "hold": [ + 0, + 0, + 21 + ], + "pin": "CE0", + "setup": [ + 147, + 178, + 210 + ], + "type": "SetupHold" + }, + { + "clock": [ + "posedge", + "CLK0" + ], + "hold": [ + 0, + 5, + 32 + ], + "pin": "A", + "setup": [ + 21, + 31, + 42 + ], + "type": "SetupHold" + }, + { + "clock": [ + "posedge", + "CLK0" + ], + "hold": [ + 0, + 5, + 32 + ], + "pin": "B", + "setup": [ + 21, + 31, + 42 + ], + "type": "SetupHold" + }, + { + "clock": [ + "posedge", + "CLK0" + ], + "hold": [ + 126, + 136, + 147 + ], + "pin": "SIGNEDA", + "setup": [ + 0, + 0, + 0 + ], + "type": "SetupHold" + }, + { + "clock": [ + "posedge", + "CLK0" + ], + "hold": [ + 126, + 136, + 147 + ], + "pin": "SIGNEDB", + "setup": [ + 0, + 0, + 0 + ], + "type": "SetupHold" + }, + { + "clock": [ + "posedge", + "CLK0" + ], + "hold": [ + 42, + 52, + 63 + ], + "pin": "RST0", + "setup": [ + 84, + 100, + 116 + ], + "type": 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diff --git a/ECP5/timing/speed_8_5G/cells.json b/ECP5/timing/speed_8_5G/cells.json index 98efe0b..a6df9a0 100644 --- a/ECP5/timing/speed_8_5G/cells.json +++ b/ECP5/timing/speed_8_5G/cells.json
@@ -13957,6 +13957,568 @@ "type": "IOPath" } ], + "MULT18X18D:REGS=ALL": [ + { + "clock": [ + "posedge", + "CLK0" + ], + "hold": [ + 0, + 0, + 17 + ], + "pin": "CE0", + "setup": [ + 121, + 147, + 173 + ], + "type": "SetupHold" + }, + { + "clock": [ + "posedge", + "CLK0" + ], + "hold": [ + 0, + 4, + 26 + ], + "pin": "A", + "setup": [ + 17, + 25, + 34 + ], + "type": "SetupHold" + }, + { + "clock": [ + "posedge", + "CLK0" + ], + "hold": [ + 0, + 4, + 26 + ], + "pin": "B", + "setup": [ + 17, + 25, + 34 + ], + "type": "SetupHold" + }, + { + "clock": [ + "posedge", + "CLK0" + ], + "hold": [ + 104, + 112, + 121 + ], + "pin": "SIGNEDA", + "setup": [ + 0, + 0, + 0 + ], + "type": "SetupHold" + }, + { + "clock": [ + "posedge", + "CLK0" + ], + "hold": [ + 104, + 112, + 121 + ], + "pin": "SIGNEDB", + "setup": [ + 0, + 0, + 0 + ], + "type": "SetupHold" + }, + { + "clock": [ + "posedge", + "CLK0" + ], + "hold": [ + 34, + 43, + 52 + ], + "pin": "RST0", + "setup": [ + 69, + 82, + 96 + ], + "type": "SetupHold" + }, + { + "falling": [ + 399, + 438, + 478 + ], + "from_pin": "CLK0", + "rising": [ + 399, + 438, + 478 + ], + "to_pin": "P", + "type": "IOPath" + } + ], + "MULT18X18D:REGS=INPUT": [ + { + "clock": [ + "posedge", + "CLK0" + ], + "hold": [ + 0, + 0, + 17 + ], + "pin": "CE0", + "setup": [ + 121, + 147, + 173 + ], + "type": "SetupHold" + }, + { + "clock": [ + "posedge", + "CLK0" + ], + "hold": [ + 0, + 4, + 26 + ], + "pin": "A", + "setup": [ + 17, + 25, + 34 + ], + "type": "SetupHold" + }, + { + "clock": [ + "posedge", + "CLK0" + ], + "hold": [ + 0, + 4, + 26 + ], + "pin": "B", + "setup": [ + 17, + 25, + 34 + ], + "type": "SetupHold" + }, + { + "clock": [ + "posedge", + "CLK0" + ], + "hold": [ + 104, + 112, + 121 + ], + "pin": "SIGNEDA", + "setup": [ + 0, + 0, + 0 + ], + "type": "SetupHold" + }, + { + "clock": [ + "posedge", + "CLK0" + ], + "hold": [ + 104, + 112, + 121 + ], + "pin": "SIGNEDB", + "setup": [ + 0, + 0, + 0 + ], + "type": "SetupHold" + }, + { + "clock": [ + "posedge", + "CLK0" + ], + "hold": [ + 34, + 43, + 52 + ], + "pin": "RST0", + "setup": [ + 69, + 82, + 96 + ], + "type": "SetupHold" + }, + { + "falling": [ + 1912, + 2216, + 2521 + ], + "from_pin": "CLK0", + "rising": [ + 1912, + 2216, + 2521 + ], + "to_pin": "P", + "type": "IOPath" + } + ], + "MULT18X18D:REGS=NONE": [ + { + "falling": [ + 1825, + 2120, + 2416 + ], + "from_pin": "SIGNEDA", + "rising": [ + 1825, + 2120, + 2416 + ], + "to_pin": "P", + "type": "IOPath" + }, + { + "falling": [ + 1825, + 2120, + 2416 + ], + "from_pin": "SIGNEDB", + "rising": [ + 1825, + 2120, + 2416 + ], + "to_pin": "P", + "type": "IOPath" + }, + { + "falling": [ + 1930, + 2234, + 2538 + ], + "from_pin": "A", + "rising": [ + 1930, + 2234, + 2538 + ], + "to_pin": "P", + "type": "IOPath" + }, + { + "falling": [ + 1930, + 2234, + 2538 + ], + "from_pin": "B", + "rising": [ + 1930, + 2234, + 2538 + ], + "to_pin": "P", + "type": "IOPath" + } + ], + "MULT18X18D:REGS=OUTPUT": [ + { + "clock": [ + "posedge", + "CLK0" + ], + "hold": [ + 0, + 0, + 0 + ], + "pin": "A", + "setup": [ + 1956, + 2068, + 2181 + ], + "type": "SetupHold" + }, + { + "clock": [ + "posedge", + "CLK0" + ], + "hold": [ + 0, + 0, + 0 + ], + "pin": "B", + "setup": [ + 1956, + 2068, + 2181 + ], + "type": "SetupHold" + }, + { + "clock": [ + "posedge", + "CLK0" + ], + "hold": [ + 0, + 0, + 0 + ], + "pin": "SIGNEDA", + "setup": [ + 1851, + 1955, + 2060 + ], + "type": "SetupHold" + }, + { + "clock": [ + "posedge", + "CLK0" + ], + "hold": [ + 0, + 0, + 0 + ], + "pin": "SIGNEDB", + "setup": [ + 1851, + 1955, + 2060 + ], + "type": "SetupHold" + }, + { + "clock": [ + "posedge", + "CLK0" + ], + "hold": [ + 0, + 0, + 17 + ], + "pin": "CE0", + "setup": [ + 121, + 147, + 173 + ], + "type": "SetupHold" + }, + { + "clock": [ + "posedge", + "CLK0" + ], + "hold": [ + 34, + 43, + 52 + ], + "pin": "RST0", + "setup": [ + 69, + 82, + 96 + ], + "type": "SetupHold" + }, + { + "falling": [ + 399, + 438, + 478 + ], + "from_pin": "CLK0", + "rising": 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"setup": [ + 69, + 82, + 96 + ], + "type": "SetupHold" + }, + { + "falling": [ + 895, + 908, + 921 + ], + "from_pin": "CLK0", + "rising": [ + 895, + 908, + 921 + ], + "to_pin": "P", + "type": "IOPath" + } + ], "PIO:IOTYPE=LVCMOS12": [ { "clock": [