Update to prjtrellis f7056c217f1a1b2626fba53ef4c0dd2560529687 Signed-off-by: David Shah <dave@ds0.me>
diff --git a/ECP5/tiledata/EFB0_PICB0/bits.db b/ECP5/tiledata/EFB0_PICB0/bits.db index 6d0f769..2d41310 100644 --- a/ECP5/tiledata/EFB0_PICB0/bits.db +++ b/ECP5/tiledata/EFB0_PICB0/bits.db
@@ -5,11 +5,99 @@ # Non-Routing Configuration +.config IOLOGICA.DELAY.DEL_VALUE 0000000 +F10B0 +F9B0 +F8B0 +F7B0 +F6B0 +F5B0 +F4B0 + .config_enum GSR.GSRMODE NONE ACTIVE_HIGH F88B1 ACTIVE_LOW F88B1 F90B1 NONE - +.config_enum IOLOGICA.CEIMUX CEMUX +1 F64B0 +CEMUX - + +.config_enum IOLOGICA.CEMUX INV +CE F3B0 +INV - + +.config_enum IOLOGICA.CEOMUX CEMUX +1 F41B0 +CEMUX - + +.config_enum IOLOGICA.CLKIMUX 0 +0 - +CLK F19B0 +INV F19B0 F20B0 + +.config_enum IOLOGICA.CLKOMUX 0 +0 - +CLK F42B0 +INV F42B0 F43B0 + +.config_enum IOLOGICA.DELAY.OUTDEL DISABLED +DISABLED - +ENABLED F44B0 + +.config_enum IOLOGICA.DELAY.WAIT_FOR_EDGE DISABLED +DISABLED - +ENABLED F39B0 + +.config_enum IOLOGICA.FF.INREGMODE FF +FF - +LATCH F31B0 + +.config_enum IOLOGICA.FF.REGSET RESET +RESET - +SET F17B0 + +.config_enum IOLOGICA.GSR ENABLED +DISABLED F12B0 +ENABLED - + +.config_enum IOLOGICA.LSRIMUX 0 +0 - +LSRMUX F22B0 + +.config_enum IOLOGICA.LSRMUX INV +INV - +LSR F32B0 + +.config_enum IOLOGICA.LSROMUX 0 +0 - +LSRMUX F45B0 + +.config_enum IOLOGICA.MODE IREG_OREG +IDDRX1_ODDRX1 F26B0 F41B0 F64B0 +IREG_OREG - +NONE - + +.config_enum IOLOGICA.OUTREG.OUTREGMODE FF +FF - +LATCH F68B0 + +.config_enum IOLOGICA.OUTREG.REGSET RESET +RESET - +SET F40B0 + +.config_enum IOLOGICA.SRMODE ASYNC +ASYNC - +LSR_OVER_CE F2B0 + +.config_enum IOLOGICA.TSREG.OUTREGMODE FF +FF - +LATCH F67B0 + +.config_enum IOLOGICA.TSREG.REGSET RESET +RESET - +SET F56B0 + .config_enum JTAG.ER1 DISABLED DISABLED - ENABLED F72B1 @@ -167,6 +255,14 @@ OUTPUT_LVCMOS33 F5B1 F7B1 F12B1 F13B1 F14B1 F54B0 F55B0 OUTPUT_LVTTL33 F5B1 F7B1 F12B1 F13B1 F14B1 F54B0 F55B0 +.config_enum PIOA.DATAMUX_ODDR PADDO +IOLDO F50B0 +PADDO - + +.config_enum PIOA.DATAMUX_OREG PADDO +IOLDO F51B0 +PADDO - + .config_enum PIOA.DRIVE 12 !F12B1 !F13B1 !F14B1 F15B1 !F16B1 16 F12B1 F13B1 F14B1 F15B1 !F16B1 @@ -190,6 +286,10 @@ FAST F22B1 SLOW !F22B1 +.config_enum PIOA.TRIMUX_TSREG PADDT +IOLTO F59B0 +PADDT - + .config_enum SYSCONFIG.BACKGROUND_RECONFIG OFF OFF - ON F76B1 F86B1 F92B1
diff --git a/ECP5/tiledata/EFB1_PICB1/bits.db b/ECP5/tiledata/EFB1_PICB1/bits.db index d75b931..d9b05fb 100644 --- a/ECP5/tiledata/EFB1_PICB1/bits.db +++ b/ECP5/tiledata/EFB1_PICB1/bits.db
@@ -14,10 +14,98 @@ F60B1 F62B1 +.config IOLOGICB.DELAY.DEL_VALUE 0000000 +F10B0 +F9B0 +F8B0 +F7B0 +F6B0 +F5B0 +F4B0 + .config_enum CCLK.MODE NONE NONE !F40B1 USRMCLK F40B1 +.config_enum IOLOGICB.CEIMUX CEMUX +1 F64B0 +CEMUX - + +.config_enum IOLOGICB.CEMUX INV +CE F3B0 +INV - + +.config_enum IOLOGICB.CEOMUX CEMUX +1 F41B0 +CEMUX - + +.config_enum IOLOGICB.CLKIMUX 0 +0 - +CLK F19B0 +INV F19B0 F20B0 + +.config_enum IOLOGICB.CLKOMUX 0 +0 - +CLK F42B0 +INV F42B0 F43B0 + +.config_enum IOLOGICB.DELAY.OUTDEL DISABLED +DISABLED - +ENABLED F44B0 + +.config_enum IOLOGICB.DELAY.WAIT_FOR_EDGE DISABLED +DISABLED - +ENABLED F39B0 + +.config_enum IOLOGICB.FF.INREGMODE FF +FF - +LATCH F31B0 + +.config_enum IOLOGICB.FF.REGSET RESET +RESET - +SET F17B0 + +.config_enum IOLOGICB.GSR ENABLED +DISABLED F12B0 +ENABLED - + +.config_enum IOLOGICB.LSRIMUX 0 +0 - +LSRMUX F22B0 + +.config_enum IOLOGICB.LSRMUX INV +INV - +LSR F32B0 + +.config_enum IOLOGICB.LSROMUX 0 +0 - +LSRMUX F45B0 + +.config_enum IOLOGICB.MODE IREG_OREG +IDDRX1_ODDRX1 F26B0 F41B0 F64B0 +IREG_OREG - +NONE - + +.config_enum IOLOGICB.OUTREG.OUTREGMODE FF +FF - +LATCH F68B0 + +.config_enum IOLOGICB.OUTREG.REGSET RESET +RESET - +SET F40B0 + +.config_enum IOLOGICB.SRMODE ASYNC +ASYNC - +LSR_OVER_CE F2B0 + +.config_enum IOLOGICB.TSREG.OUTREGMODE FF +FF - +LATCH F67B0 + +.config_enum IOLOGICB.TSREG.REGSET RESET +RESET - +SET F56B0 + .config_enum OSC.DIV 127 10 F34B1 !F36B1 F38B1 F40B1 100 F34B1 F36B1 !F38B1 !F40B1 @@ -171,6 +259,14 @@ OUTPUT_LVCMOS33 F5B1 F7B1 F12B1 F13B1 F14B1 F54B0 F55B0 OUTPUT_LVTTL33 F5B1 F7B1 F12B1 F13B1 F14B1 F54B0 F55B0 +.config_enum PIOB.DATAMUX_ODDR PADDO +IOLDO F50B0 +PADDO - + +.config_enum PIOB.DATAMUX_OREG PADDO +IOLDO F51B0 +PADDO - + .config_enum PIOB.DRIVE 12 !F12B1 !F13B1 !F14B1 F15B1 !F16B1 16 F12B1 F13B1 F14B1 F15B1 !F16B1 @@ -194,6 +290,10 @@ FAST F22B1 SLOW !F22B1 +.config_enum PIOB.TRIMUX_TSREG PADDT +IOLTO F59B0 +PADDT - + .config_enum SYSCONFIG.MASTER_SPI_PORT DISABLE DISABLE - ENABLE F64B1
diff --git a/ECP5/tiledata/EFB2_PICB0/bits.db b/ECP5/tiledata/EFB2_PICB0/bits.db index aad8eb3..dd0a0e7 100644 --- a/ECP5/tiledata/EFB2_PICB0/bits.db +++ b/ECP5/tiledata/EFB2_PICB0/bits.db
@@ -5,6 +5,94 @@ # Non-Routing Configuration +.config IOLOGICA.DELAY.DEL_VALUE 0000000 +F10B0 +F9B0 +F8B0 +F7B0 +F6B0 +F5B0 +F4B0 + +.config_enum IOLOGICA.CEIMUX CEMUX +1 F64B0 +CEMUX - + +.config_enum IOLOGICA.CEMUX INV +CE F3B0 +INV - + +.config_enum IOLOGICA.CEOMUX CEMUX +1 F41B0 +CEMUX - + +.config_enum IOLOGICA.CLKIMUX 0 +0 - +CLK F19B0 +INV F19B0 F20B0 + +.config_enum IOLOGICA.CLKOMUX 0 +0 - +CLK F42B0 +INV F42B0 F43B0 + +.config_enum IOLOGICA.DELAY.OUTDEL DISABLED +DISABLED - +ENABLED F44B0 + +.config_enum IOLOGICA.DELAY.WAIT_FOR_EDGE DISABLED +DISABLED - +ENABLED F39B0 + +.config_enum IOLOGICA.FF.INREGMODE FF +FF - +LATCH F31B0 + +.config_enum IOLOGICA.FF.REGSET RESET +RESET - +SET F17B0 + +.config_enum IOLOGICA.GSR ENABLED +DISABLED F12B0 +ENABLED - + +.config_enum IOLOGICA.LSRIMUX 0 +0 - +LSRMUX F22B0 + +.config_enum IOLOGICA.LSRMUX INV +INV - +LSR F32B0 + +.config_enum IOLOGICA.LSROMUX 0 +0 - +LSRMUX F45B0 + +.config_enum IOLOGICA.MODE IREG_OREG +IDDRX1_ODDRX1 F26B0 F41B0 F64B0 +IREG_OREG - +NONE - + +.config_enum IOLOGICA.OUTREG.OUTREGMODE FF +FF - +LATCH F68B0 + +.config_enum IOLOGICA.OUTREG.REGSET RESET +RESET - +SET F40B0 + +.config_enum IOLOGICA.SRMODE ASYNC +ASYNC - +LSR_OVER_CE F2B0 + +.config_enum IOLOGICA.TSREG.OUTREGMODE FF +FF - +LATCH F67B0 + +.config_enum IOLOGICA.TSREG.REGSET RESET +RESET - +SET F56B0 + .config_enum PIOA.BASE_TYPE NONE BIDIR_LVCMOS12 F0B1 F2B1 F7B1 F54B0 F55B0 BIDIR_LVCMOS15 F5B1 F23B1 F54B0 F55B0 @@ -26,6 +114,14 @@ OUTPUT_LVCMOS33 F5B1 F7B1 F12B1 F13B1 F14B1 F54B0 F55B0 OUTPUT_LVTTL33 F5B1 F7B1 F12B1 F13B1 F14B1 F54B0 F55B0 +.config_enum PIOA.DATAMUX_ODDR PADDO +IOLDO F50B0 +PADDO - + +.config_enum PIOA.DATAMUX_OREG PADDO +IOLDO F51B0 +PADDO - + .config_enum PIOA.DRIVE 12 !F12B1 !F13B1 !F14B1 F15B1 !F16B1 16 F12B1 F13B1 F14B1 F15B1 !F16B1 @@ -49,6 +145,10 @@ FAST F22B1 SLOW !F22B1 +.config_enum PIOA.TRIMUX_TSREG PADDT +IOLTO F59B0 +PADDT - + .config_enum SED.CHECKALWAYS DISABLED DISABLED - ENABLED F68B1
diff --git a/ECP5/tiledata/EFB3_PICB1/bits.db b/ECP5/tiledata/EFB3_PICB1/bits.db index 9e560bd..6d1a4ad 100644 --- a/ECP5/tiledata/EFB3_PICB1/bits.db +++ b/ECP5/tiledata/EFB3_PICB1/bits.db
@@ -4,10 +4,98 @@ # Non-Routing Configuration +.config IOLOGICB.DELAY.DEL_VALUE 0000000 +F10B0 +F9B0 +F8B0 +F7B0 +F6B0 +F5B0 +F4B0 + .config_enum CCLK.MODE NONE NONE !F40B1 USRMCLK F40B1 +.config_enum IOLOGICB.CEIMUX CEMUX +1 F64B0 +CEMUX - + +.config_enum IOLOGICB.CEMUX INV +CE F3B0 +INV - + +.config_enum IOLOGICB.CEOMUX CEMUX +1 F41B0 +CEMUX - + +.config_enum IOLOGICB.CLKIMUX 0 +0 - +CLK F19B0 +INV F19B0 F20B0 + +.config_enum IOLOGICB.CLKOMUX 0 +0 - +CLK F42B0 +INV F42B0 F43B0 + +.config_enum IOLOGICB.DELAY.OUTDEL DISABLED +DISABLED - +ENABLED F44B0 + +.config_enum IOLOGICB.DELAY.WAIT_FOR_EDGE DISABLED +DISABLED - +ENABLED F39B0 + +.config_enum IOLOGICB.FF.INREGMODE FF +FF - +LATCH F31B0 + +.config_enum IOLOGICB.FF.REGSET RESET +RESET - +SET F17B0 + +.config_enum IOLOGICB.GSR ENABLED +DISABLED F12B0 +ENABLED - + +.config_enum IOLOGICB.LSRIMUX 0 +0 - +LSRMUX F22B0 + +.config_enum IOLOGICB.LSRMUX INV +INV - +LSR F32B0 + +.config_enum IOLOGICB.LSROMUX 0 +0 - +LSRMUX F45B0 + +.config_enum IOLOGICB.MODE IREG_OREG +IDDRX1_ODDRX1 F26B0 F41B0 F64B0 +IREG_OREG - +NONE - + +.config_enum IOLOGICB.OUTREG.OUTREGMODE FF +FF - +LATCH F68B0 + +.config_enum IOLOGICB.OUTREG.REGSET RESET +RESET - +SET F40B0 + +.config_enum IOLOGICB.SRMODE ASYNC +ASYNC - +LSR_OVER_CE F2B0 + +.config_enum IOLOGICB.TSREG.OUTREGMODE FF +FF - +LATCH F67B0 + +.config_enum IOLOGICB.TSREG.REGSET RESET +RESET - +SET F56B0 + .config_enum PIOB.BASE_TYPE NONE BIDIR_LVCMOS12 F0B1 F2B1 F7B1 F54B0 F55B0 BIDIR_LVCMOS15 F5B1 F23B1 F54B0 F55B0 @@ -29,6 +117,14 @@ OUTPUT_LVCMOS33 F5B1 F7B1 F12B1 F13B1 F14B1 F54B0 F55B0 OUTPUT_LVTTL33 F5B1 F7B1 F12B1 F13B1 F14B1 F54B0 F55B0 +.config_enum PIOB.DATAMUX_ODDR PADDO +IOLDO F50B0 +PADDO - + +.config_enum PIOB.DATAMUX_OREG PADDO +IOLDO F51B0 +PADDO - + .config_enum PIOB.DRIVE 12 !F12B1 !F13B1 !F14B1 F15B1 !F16B1 16 F12B1 F13B1 F14B1 F15B1 !F16B1 @@ -52,5 +148,9 @@ FAST F22B1 SLOW !F22B1 +.config_enum PIOB.TRIMUX_TSREG PADDT +IOLTO F59B0 +PADDT - + # Fixed Connections
diff --git a/ECP5/tiledata/PICB0/bits.db b/ECP5/tiledata/PICB0/bits.db index 7c4718b..aa98dc1 100644 --- a/ECP5/tiledata/PICB0/bits.db +++ b/ECP5/tiledata/PICB0/bits.db
@@ -5,6 +5,94 @@ # Non-Routing Configuration +.config IOLOGICA.DELAY.DEL_VALUE 0000000 +F10B0 +F9B0 +F8B0 +F7B0 +F6B0 +F5B0 +F4B0 + +.config_enum IOLOGICA.CEIMUX CEMUX +1 F64B0 +CEMUX - + +.config_enum IOLOGICA.CEMUX INV +CE F3B0 +INV - + +.config_enum IOLOGICA.CEOMUX CEMUX +1 F41B0 +CEMUX - + +.config_enum IOLOGICA.CLKIMUX 0 +0 - +CLK F19B0 +INV F19B0 F20B0 + +.config_enum IOLOGICA.CLKOMUX 0 +0 - +CLK F42B0 +INV F42B0 F43B0 + +.config_enum IOLOGICA.DELAY.OUTDEL DISABLED +DISABLED - +ENABLED F44B0 + +.config_enum IOLOGICA.DELAY.WAIT_FOR_EDGE DISABLED +DISABLED - +ENABLED F39B0 + +.config_enum IOLOGICA.FF.INREGMODE FF +FF - +LATCH F31B0 + +.config_enum IOLOGICA.FF.REGSET RESET +RESET - +SET F17B0 + +.config_enum IOLOGICA.GSR ENABLED +DISABLED F12B0 +ENABLED - + +.config_enum IOLOGICA.LSRIMUX 0 +0 - +LSRMUX F22B0 + +.config_enum IOLOGICA.LSRMUX INV +INV - +LSR F32B0 + +.config_enum IOLOGICA.LSROMUX 0 +0 - +LSRMUX F45B0 + +.config_enum IOLOGICA.MODE IREG_OREG +IDDRX1_ODDRX1 F26B0 F41B0 F64B0 +IREG_OREG - +NONE - + +.config_enum IOLOGICA.OUTREG.OUTREGMODE FF +FF - +LATCH F68B0 + +.config_enum IOLOGICA.OUTREG.REGSET RESET +RESET - +SET F40B0 + +.config_enum IOLOGICA.SRMODE ASYNC +ASYNC - +LSR_OVER_CE F2B0 + +.config_enum IOLOGICA.TSREG.OUTREGMODE FF +FF - +LATCH F67B0 + +.config_enum IOLOGICA.TSREG.REGSET RESET +RESET - +SET F56B0 + .config_enum PIOA.BASE_TYPE NONE BIDIR_LVCMOS12 F0B1 F2B1 F7B1 F54B0 F55B0 BIDIR_LVCMOS15 F5B1 F23B1 F54B0 F55B0 @@ -26,6 +114,14 @@ OUTPUT_LVCMOS33 F5B1 F7B1 F12B1 F13B1 F14B1 F54B0 F55B0 OUTPUT_LVTTL33 F5B1 F7B1 F12B1 F13B1 F14B1 F54B0 F55B0 +.config_enum PIOA.DATAMUX_ODDR PADDO +IOLDO F50B0 +PADDO - + +.config_enum PIOA.DATAMUX_OREG PADDO +IOLDO F51B0 +PADDO - + .config_enum PIOA.DRIVE 12 !F12B1 !F13B1 !F14B1 F15B1 !F16B1 16 F12B1 F13B1 F14B1 F15B1 !F16B1 @@ -49,6 +145,10 @@ FAST F22B1 SLOW !F22B1 +.config_enum PIOA.TRIMUX_TSREG PADDT +IOLTO F59B0 +PADDT - + # Fixed Connections .fixed_conn DIA_SIOLOGIC JDIA
diff --git a/ECP5/tiledata/PICB1/bits.db b/ECP5/tiledata/PICB1/bits.db index d5e3425..a1d4701 100644 --- a/ECP5/tiledata/PICB1/bits.db +++ b/ECP5/tiledata/PICB1/bits.db
@@ -4,6 +4,94 @@ # Non-Routing Configuration +.config IOLOGICB.DELAY.DEL_VALUE 0000000 +F10B0 +F9B0 +F8B0 +F7B0 +F6B0 +F5B0 +F4B0 + +.config_enum IOLOGICB.CEIMUX CEMUX +1 F64B0 +CEMUX - + +.config_enum IOLOGICB.CEMUX INV +CE F3B0 +INV - + +.config_enum IOLOGICB.CEOMUX CEMUX +1 F41B0 +CEMUX - + +.config_enum IOLOGICB.CLKIMUX 0 +0 - +CLK F19B0 +INV F19B0 F20B0 + +.config_enum IOLOGICB.CLKOMUX 0 +0 - +CLK F42B0 +INV F42B0 F43B0 + +.config_enum IOLOGICB.DELAY.OUTDEL DISABLED +DISABLED - +ENABLED F44B0 + +.config_enum IOLOGICB.DELAY.WAIT_FOR_EDGE DISABLED +DISABLED - +ENABLED F39B0 + +.config_enum IOLOGICB.FF.INREGMODE FF +FF - +LATCH F31B0 + +.config_enum IOLOGICB.FF.REGSET RESET +RESET - +SET F17B0 + +.config_enum IOLOGICB.GSR ENABLED +DISABLED F12B0 +ENABLED - + +.config_enum IOLOGICB.LSRIMUX 0 +0 - +LSRMUX F22B0 + +.config_enum IOLOGICB.LSRMUX INV +INV - +LSR F32B0 + +.config_enum IOLOGICB.LSROMUX 0 +0 - +LSRMUX F45B0 + +.config_enum IOLOGICB.MODE IREG_OREG +IDDRX1_ODDRX1 F26B0 F41B0 F64B0 +IREG_OREG - +NONE - + +.config_enum IOLOGICB.OUTREG.OUTREGMODE FF +FF - +LATCH F68B0 + +.config_enum IOLOGICB.OUTREG.REGSET RESET +RESET - +SET F40B0 + +.config_enum IOLOGICB.SRMODE ASYNC +ASYNC - +LSR_OVER_CE F2B0 + +.config_enum IOLOGICB.TSREG.OUTREGMODE FF +FF - +LATCH F67B0 + +.config_enum IOLOGICB.TSREG.REGSET RESET +RESET - +SET F56B0 + .config_enum PIOB.BASE_TYPE NONE BIDIR_LVCMOS12 F0B1 F2B1 F7B1 F54B0 F55B0 BIDIR_LVCMOS15 F5B1 F23B1 F54B0 F55B0 @@ -25,6 +113,14 @@ OUTPUT_LVCMOS33 F5B1 F7B1 F12B1 F13B1 F14B1 F54B0 F55B0 OUTPUT_LVTTL33 F5B1 F7B1 F12B1 F13B1 F14B1 F54B0 F55B0 +.config_enum PIOB.DATAMUX_ODDR PADDO +IOLDO F50B0 +PADDO - + +.config_enum PIOB.DATAMUX_OREG PADDO +IOLDO F51B0 +PADDO - + .config_enum PIOB.DRIVE 12 !F12B1 !F13B1 !F14B1 F15B1 !F16B1 16 F12B1 F13B1 F14B1 F15B1 !F16B1 @@ -48,5 +144,9 @@ FAST F22B1 SLOW !F22B1 +.config_enum PIOB.TRIMUX_TSREG PADDT +IOLTO F59B0 +PADDT - + # Fixed Connections