Update to prjtrellis 021da0f94f17678aa84a3a6eb629211f8923939a

Signed-off-by: David Shah <dave@ds0.me>

ECP5/tiledata/DCU0/bits.db

diff --git a/ECP5/tiledata/DCU0/bits.db b/ECP5/tiledata/DCU0/bits.db
index d4cf9b8..07b2c5e 100644
--- a/ECP5/tiledata/DCU0/bits.db
+++ b/ECP5/tiledata/DCU0/bits.db
@@ -162,6 +162,8 @@
 
 .fixed_conn CH1_RX_REFCLK_DCU CH1_RX_REFCLK
 
+.fixed_conn D_REFCLKI JTXREFCLK
+
 .fixed_conn D_REFCLKI_DCU D_REFCLKI
 
 .fixed_conn E27_JD_SYNC_ND_DCU JD_SYNC_PULSE2ND_DCU
@@ -172,6 +174,10 @@
 
 .fixed_conn E27_JD_TXPLL_LOL_FROM_ND_DCU JD_TXPLL_LOL_TO_ND_DCU
 
+.fixed_conn E27_JREFCLKFROMND JTXREFCLK
+
+.fixed_conn EXTREFCLK JREFCLKO_EXTREF
+
 .fixed_conn G_JPCSARXCLK0 JCH0_FF_RX_PCLK_DCU
 
 .fixed_conn G_JPCSARXCLK1 JCH1_FF_RX_PCLK_DCU
@@ -180,6 +186,8 @@
 
 .fixed_conn G_JPCSATXCLK1 JCH1_FF_TX_PCLK_DCU
 
+.fixed_conn JCH0RXREFCLKCIB N1E4_JCLK0
+
 .fixed_conn JCH0_FFC_CDR_EN_BITSLIP_DCU N1E1_JA1
 
 .fixed_conn JCH0_FFC_DIV11_MODE_RX_DCU N1E1_JC0
@@ -288,6 +296,8 @@
 
 .fixed_conn JCH0_SCISEL_DCU N1E2_JA7
 
+.fixed_conn JCH1RXREFCLKCIB N1E6_JCLK1
+
 .fixed_conn JCH1_FFC_CDR_EN_BITSLIP_DCU N1E5_JA3
 
 .fixed_conn JCH1_FFC_DIV11_MODE_RX_DCU N1E6_JD0
@@ -498,6 +508,12 @@
 
 .fixed_conn JOUTPUT_OP1_APIO JCH1_HDOUTP_DCU
 
+.fixed_conn JTXREFCLK EXTREFCLK
+
+.fixed_conn JTXREFCLK KEEPWIRE
+
+.fixed_conn JTXREFCLKCIB N1E11_JCLK0
+
 .fixed_conn N1E10_JF0 JCH1_FF_RX_D_16_DCU
 
 .fixed_conn N1E10_JF1 JCH1_FF_RX_D_17_DCU
@@ -734,3 +750,15 @@
 
 .fixed_conn N1_JQ4 JCH0_FFS_SKP_DELETED_DCU
 
+.fixed_conn REFCLKN_EXTREF INPUT_REFN_APIO
+
+.fixed_conn REFCLKP_EXTREF INPUT_REFP_APIO
+
+.fixed_conn RXREFCLK0 EXTREFCLK
+
+.fixed_conn RXREFCLK0 KEEPWIRE
+
+.fixed_conn RXREFCLK1 EXTREFCLK
+
+.fixed_conn RXREFCLK1 KEEPWIRE
+

ECP5/tiledata/DCU1/bits.db

diff --git a/ECP5/tiledata/DCU1/bits.db b/ECP5/tiledata/DCU1/bits.db
index 78f2cff..b6cd19e 100644
--- a/ECP5/tiledata/DCU1/bits.db
+++ b/ECP5/tiledata/DCU1/bits.db
@@ -1,4 +1,7 @@
 # Routing Mux Bits
+.mux W1_CH0_RX_REFCLK
+W1_JCH0RXREFCLKCIB F78B1
+
 
 # Non-Routing Configuration
 .config DCU.CH0_LDR_CORE2TX_SEL 0

ECP5/tiledata/DCU5/bits.db

diff --git a/ECP5/tiledata/DCU5/bits.db b/ECP5/tiledata/DCU5/bits.db
index fbe61d7..46bf635 100644
--- a/ECP5/tiledata/DCU5/bits.db
+++ b/ECP5/tiledata/DCU5/bits.db
@@ -1,4 +1,7 @@
 # Routing Mux Bits
+.mux W5_CH1_RX_REFCLK
+W5_JCH1RXREFCLKCIB F12B1
+
 
 # Non-Routing Configuration
 .config DCU.CH1_DCOATDCFG 00

ECP5/tiledata/DCU7/bits.db

diff --git a/ECP5/tiledata/DCU7/bits.db b/ECP5/tiledata/DCU7/bits.db
index cda4abe..137e7ae 100644
--- a/ECP5/tiledata/DCU7/bits.db
+++ b/ECP5/tiledata/DCU7/bits.db
@@ -1,4 +1,16 @@
 # Routing Mux Bits
+.mux N1W9_JSERDESREFCLK0
+W7_JREFCLKO_EXTREF F59B1
+
+.mux W7_CH0_RX_REFCLK
+W7_RXREFCLK0 F58B1
+
+.mux W7_CH1_RX_REFCLK
+W7_RXREFCLK1 F58B1
+
+.mux W7_D_REFCLKI
+W7_JTXREFCLKCIB F63B1
+
 
 # Non-Routing Configuration
 .config DCU.D_BITCLK_FROM_ND_EN 0
@@ -52,5 +64,11 @@
 F83B1
 F84B1
 
+.config EXTREF.REFCK_DCBIAS_EN 0
+F62B1
+
+.config EXTREF.REFCK_RTERM 0
+F61B1
+
 
 # Fixed Connections

ECP5/tiledata/DCU8/bits.db

diff --git a/ECP5/tiledata/DCU8/bits.db b/ECP5/tiledata/DCU8/bits.db
index b084fc2..a7efdd2 100644
--- a/ECP5/tiledata/DCU8/bits.db
+++ b/ECP5/tiledata/DCU8/bits.db
@@ -105,5 +105,8 @@
 .config DCU.D_TXPLL_PWDNB 0
 F5B1
 
+.config EXTREF.REFCK_PWDNB 0
+F4B1
+
 
 # Fixed Connections