Update to prjtrellis 10a8b6b134d6e38aa99d4132a59bcedb476aeff3
Signed-off-by: David Shah <davey1576@gmail.com>
diff --git a/ECP5/tiledata/MIB2_DSP0/bits.db b/ECP5/tiledata/MIB2_DSP0/bits.db
index d13466e..aded8a6 100644
--- a/ECP5/tiledata/MIB2_DSP0/bits.db
+++ b/ECP5/tiledata/MIB2_DSP0/bits.db
@@ -1,5 +1,12 @@
# Routing Mux Bits
# Non-Routing Configuration
+.config_enum MULT18_0.REG_PIPELINE_CLK CLK3
+CLK0 -
+CLK1 -
+CLK2 -
+CLK3 -
+NONE F27B1 F28B1 F79B1 F83B1
+
# Fixed Connections
diff --git a/ECP5/tiledata/MIB2_DSP1/bits.db b/ECP5/tiledata/MIB2_DSP1/bits.db
index d13466e..a626b48 100644
--- a/ECP5/tiledata/MIB2_DSP1/bits.db
+++ b/ECP5/tiledata/MIB2_DSP1/bits.db
@@ -1,5 +1,59 @@
# Routing Mux Bits
# Non-Routing Configuration
+.config_enum MULT18_0.MODE NONE
+MULT18X18D F72B0 F90B0 F101B0
+NONE -
+
+.config_enum MULT18_0.REG_INPUTA_CLK CLK3
+CLK0 F76B1 F77B1 F88B1 F89B1
+CLK1 F77B1 F89B1
+CLK2 F76B1 F88B1
+CLK3 -
+NONE -
+
+.config_enum MULT18_0.REG_INPUTA_RST RST3
+RST0 F28B1 F31B1 F64B1 F65B1
+RST1 F28B1 F64B1
+RST2 F31B1 F65B1
+RST3 -
+
+.config_enum MULT18_0.REG_INPUTB_CLK CLK3
+CLK0 F84B1 F85B1 F90B1 F91B1
+CLK1 F85B1 F91B1
+CLK2 F84B1 F90B1
+CLK3 -
+NONE -
+
+.config_enum MULT18_0.REG_INPUTB_RST RST3
+RST0 F56B1 F57B1 F78B1 F79B1
+RST1 F57B1 F79B1
+RST2 F56B1 F78B1
+RST3 -
+
+.config_enum MULT18_0.REG_INPUTC_CLK NONE
+CLK0 F92B1 F93B1 F96B1 F97B1
+CLK1 F93B1 F96B1 F97B1
+CLK2 F92B1 F96B1 F97B1
+CLK3 F96B1 F97B1
+NONE -
+
+.config_enum MULT18_0.REG_PIPELINE_CLK CLK3
+CLK0 F104B1 F105B1
+CLK1 F105B1
+CLK2 F104B1
+CLK3 -
+NONE -
+
+.config_enum MULT18_0.REG_PIPELINE_RST RST3
+RST0 F94B1 F95B1
+RST1 F95B1
+RST2 F94B1
+RST3 -
+
+.config_enum MULT18_0.RESETMODE SYNC
+ASYNC F40B1 F50B1 F61B1 F70B1 F82B1 F102B1
+SYNC -
+
# Fixed Connections
diff --git a/ECP5/tiledata/MIB2_DSP2/bits.db b/ECP5/tiledata/MIB2_DSP2/bits.db
index d13466e..71a527c 100644
--- a/ECP5/tiledata/MIB2_DSP2/bits.db
+++ b/ECP5/tiledata/MIB2_DSP2/bits.db
@@ -1,5 +1,65 @@
# Routing Mux Bits
# Non-Routing Configuration
+.config_enum MULT18_0.MODE NONE
+MULT18X18D F1B0 F14B0 F82B0 F83B0 F86B0
+NONE -
+
+.config_enum MULT18_0.REG_INPUTA_CLK CLK3
+CLK0 F16B1 F17B1
+CLK1 F17B1
+CLK2 F16B1
+CLK3 -
+NONE -
+
+.config_enum MULT18_0.REG_INPUTA_RST RST3
+RST0 F46B1 F47B1
+RST1 F47B1
+RST2 F46B1
+RST3 -
+
+.config_enum MULT18_0.REG_INPUTB_CLK CLK3
+CLK0 F20B1 F21B1
+CLK1 F21B1
+CLK2 F20B1
+CLK3 -
+NONE -
+
+.config_enum MULT18_0.REG_INPUTB_RST RST3
+RST0 F56B1 F57B1
+RST1 F57B1
+RST2 F56B1
+RST3 -
+
+.config_enum MULT18_0.REG_OUTPUT_CLK CLK3
+CLK0 F8B1 F9B1 F11B1 F12B1
+CLK1 F9B1 F11B1
+CLK2 F8B1 F12B1
+CLK3 -
+NONE -
+
+.config_enum MULT18_0.REG_OUTPUT_RST RST3
+RST0 F24B1 F25B1 F36B1 F37B1
+RST1 F25B1 F37B1
+RST2 F24B1 F36B1
+RST3 -
+
+.config_enum MULT18_0.REG_PIPELINE_CLK CLK3
+CLK0 F6B1 F7B1 F22B1 F23B1 F30B1 F31B1
+CLK1 F7B1 F23B1 F31B1
+CLK2 F6B1 F22B1 F30B1
+CLK3 -
+NONE -
+
+.config_enum MULT18_0.REG_PIPELINE_RST RST3
+RST0 F0B1 F1B1 F60B1 F61B1 F70B1 F71B1
+RST1 F1B1 F61B1 F71B1
+RST2 F0B1 F60B1 F70B1
+RST3 -
+
+.config_enum MULT18_0.RESETMODE SYNC
+ASYNC F4B1 F18B1 F28B1 F40B1 F50B1 F54B1 F64B1 F89B1 F96B1
+SYNC -
+
# Fixed Connections
diff --git a/ECP5/tiledata/MIB2_DSP3/bits.db b/ECP5/tiledata/MIB2_DSP3/bits.db
index 04ed85e..7dedeb7 100644
--- a/ECP5/tiledata/MIB2_DSP3/bits.db
+++ b/ECP5/tiledata/MIB2_DSP3/bits.db
@@ -406,5 +406,9 @@
# Non-Routing Configuration
+.config_enum MULT18_0.MODE NONE
+MULT18X18D F30B0 F34B1
+NONE -
+
# Fixed Connections
diff --git a/ECP5/tiledata/MIB2_DSP4/bits.db b/ECP5/tiledata/MIB2_DSP4/bits.db
index d13466e..6a85771 100644
--- a/ECP5/tiledata/MIB2_DSP4/bits.db
+++ b/ECP5/tiledata/MIB2_DSP4/bits.db
@@ -1,5 +1,37 @@
# Routing Mux Bits
# Non-Routing Configuration
+.config_enum MULT18_0.REG_INPUTA_CE CE3
+CE0 F2B1 F3B1 F17B1 F18B1 F42B1 F43B1
+CE1 F3B1 F17B1 F43B1
+CE2 F2B1 F18B1 F42B1
+CE3 -
+
+.config_enum MULT18_0.REG_INPUTB_CE CE3
+CE0 F6B1 F7B1 F34B1 F35B1 F40B1 F41B1
+CE1 F7B1 F35B1 F41B1
+CE2 F6B1 F34B1 F40B1
+CE3 -
+
+.config_enum MULT18_0.REG_INPUTC_CLK NONE
+CLK0 F12B1 F13B1
+CLK1 F12B1 F13B1
+CLK2 F12B1 F13B1
+CLK3 F12B1 F13B1
+NONE -
+
+.config_enum MULT18_0.REG_OUTPUT_CLK NONE
+CLK0 F10B1 F11B1 F38B1 F39B1
+CLK1 F10B1 F11B1 F38B1 F39B1
+CLK2 F10B1 F11B1 F38B1 F39B1
+CLK3 F10B1 F11B1 F38B1 F39B1
+NONE -
+
+.config_enum MULT18_0.REG_PIPELINE_CE CE3
+CE0 F8B1 F9B1 F26B1 F27B1 F30B1 F31B1 F36B1 F37B1
+CE1 F9B1 F27B1 F31B1 F37B1
+CE2 F8B1 F26B1 F30B1 F36B1
+CE3 -
+
# Fixed Connections
diff --git a/ECP5/tiledata/MIB_DSP0/bits.db b/ECP5/tiledata/MIB_DSP0/bits.db
index 6a51ccd..da3b2e9 100644
--- a/ECP5/tiledata/MIB_DSP0/bits.db
+++ b/ECP5/tiledata/MIB_DSP0/bits.db
@@ -73,6 +73,26 @@
# Non-Routing Configuration
+.config_enum MULT18_0.REG_INPUTA_CLK CLK3
+CLK0 -
+CLK1 -
+CLK2 -
+CLK3 -
+NONE F61B0 F67B0
+
+.config_enum MULT18_0.REG_INPUTB_CLK CLK3
+CLK0 -
+CLK1 -
+CLK2 -
+CLK3 -
+NONE F64B0 F68B0
+
+.config_enum MULT18_0.SOURCEB_MODE
+B_C_DYNAMIC F39B0
+B_SHIFT F40B0
+C_SHIFT F38B0 F40B0
+HIGHSPEED F38B0 F39B0
+
# Fixed Connections
.fixed_conn E1_JF0 JP8_MULT18
diff --git a/ECP5/tiledata/MIB_DSP1/bits.db b/ECP5/tiledata/MIB_DSP1/bits.db
index 14d1476..b567b2a 100644
--- a/ECP5/tiledata/MIB_DSP1/bits.db
+++ b/ECP5/tiledata/MIB_DSP1/bits.db
@@ -1,6 +1,10 @@
# Routing Mux Bits
# Non-Routing Configuration
+.config_enum MULT18_0.GSR ENABLED
+DISABLED F61B0
+ENABLED -
+
# Fixed Connections
.fixed_conn E1_JMB0_ALU24 JP0_MULT9
diff --git a/ECP5/tiledata/MIB_DSP2/bits.db b/ECP5/tiledata/MIB_DSP2/bits.db
index 4564d26..8045794 100644
--- a/ECP5/tiledata/MIB_DSP2/bits.db
+++ b/ECP5/tiledata/MIB_DSP2/bits.db
@@ -289,6 +289,47 @@
# Non-Routing Configuration
+.config_enum MULT18_0.CLK0_DIV ENABLED
+DISABLED F65B0
+ENABLED -
+
+.config_enum MULT18_0.CLK1_DIV ENABLED
+DISABLED F66B0
+ENABLED -
+
+.config_enum MULT18_0.CLK2_DIV ENABLED
+DISABLED F67B0
+ENABLED -
+
+.config_enum MULT18_0.CLK3_DIV ENABLED
+DISABLED F68B0
+ENABLED -
+
+.config_enum MULT18_0.GSR ENABLED
+DISABLED F60B0
+ENABLED -
+
+.config_enum MULT18_0.REG_INPUTA_CLK CLK3
+CLK0 -
+CLK1 -
+CLK2 -
+CLK3 -
+NONE F55B0
+
+.config_enum MULT18_0.REG_INPUTB_CLK CLK3
+CLK0 -
+CLK1 -
+CLK2 -
+CLK3 -
+NONE F34B0
+
+.config_enum MULT18_0.REG_INPUTC_CLK CLK3
+CLK0 -
+CLK1 -
+CLK2 -
+CLK3 -
+NONE F58B0
+
# Fixed Connections
.fixed_conn E1_JC0_ALU54 JDSPC0
