| # Routing Mux Bits |
| .mux N2_ECLKC |
| BNK_ECLK1 F5B1 |
| |
| .mux N2_ECLKD |
| BNK_ECLK1 F3B6 |
| |
| .mux N2_JDIC |
| N2_INDDC_IOLOGIC F1B1 |
| |
| .mux N2_JDID |
| N2_INDDD_IOLOGIC F9B7 |
| |
| |
| # Non-Routing Configuration |
| .config_enum IOLOGICC.CLKIMUX CLK |
| CLK - |
| INV F2B1 |
| |
| .config_enum IOLOGICC.CLKOMUX CLK |
| CLK - |
| INV F9B3 |
| |
| .config_enum IOLOGICC.GSR ENABLED |
| DISABLED F7B1 |
| ENABLED - |
| |
| .config_enum IOLOGICC.LSRIMUX 0 |
| 0 - |
| LSRMUX F0B1 |
| |
| .config_enum IOLOGICC.LSRMUX INV |
| INV - |
| LSR F5B2 |
| |
| .config_enum IOLOGICC.LSROMUX 0 |
| 0 - |
| LSRMUX F7B3 |
| |
| .config_enum IOLOGICC.MODE NONE |
| IDDRX1_ODDRX1 F0B2 F0B4 F1B2 F3B1 F7B2 F9B5 |
| IDDRXN F0B2 F0B4 F1B2 F3B1 F9B5 |
| IREG_OREG F0B2 F0B4 F3B1 |
| MIDDRX_MODDRX F0B2 F0B4 F1B2 F3B1 F6B3 F9B5 |
| NONE - |
| ODDRXN F0B2 F0B4 F1B2 F2B3 F3B1 F3B3 F9B5 |
| |
| .config_enum IOLOGICD.CLKIMUX CLK |
| CLK - |
| INV F0B6 |
| |
| .config_enum IOLOGICD.CLKOMUX CLK |
| CLK - |
| INV F7B8 |
| |
| .config_enum IOLOGICD.GSR ENABLED |
| DISABLED F5B6 |
| ENABLED - |
| |
| .config_enum IOLOGICD.LSRIMUX 0 |
| 0 - |
| LSRMUX F8B7 |
| |
| .config_enum IOLOGICD.LSRMUX INV |
| INV - |
| LSR F3B7 |
| |
| .config_enum IOLOGICD.LSROMUX 0 |
| 0 - |
| LSRMUX F5B8 |
| |
| .config_enum IOLOGICD.MODE NONE |
| IDDRX1_ODDRX1 F1B6 F5B7 F6B10 F7B10 F8B8 F9B8 |
| IDDRXN F1B6 F6B10 F7B10 F8B8 F9B8 |
| IREG_OREG F1B6 F7B10 F8B8 |
| MIDDRX_MODDRX F1B6 F4B6 F6B10 F7B10 F8B8 F9B8 |
| NONE - |
| ODDRXN F0B8 F1B6 F6B10 F7B10 F8B8 F9B8 F9B9 |
| |
| .config_enum PIOC.BASE_TYPE INPUT_LVCMOS18D |
| BIDIR_BLVDS25E F4B9 F5B9 F6B6 F7B4 F8B1 F8B4 |
| BIDIR_HSUL12 F7B4 F8B4 |
| BIDIR_HSUL12D F4B9 F5B9 F6B6 F7B4 F8B1 F8B4 |
| BIDIR_LVCMOS12 F7B4 F8B4 |
| BIDIR_LVCMOS15 F7B4 F8B4 |
| BIDIR_LVCMOS18 F7B4 F8B4 |
| BIDIR_LVCMOS25 F7B4 F8B4 |
| BIDIR_LVCMOS25D F4B9 F5B9 F6B6 F7B4 F8B1 F8B4 |
| BIDIR_LVCMOS33 F7B4 F8B4 |
| BIDIR_LVCMOS33D F4B9 F5B9 F6B6 F7B4 F8B1 F8B4 |
| BIDIR_LVTTL33 F7B4 F8B4 |
| BIDIR_MLVDS25E F4B9 F5B9 F6B6 F7B4 F8B1 F8B4 |
| BIDIR_SSTL135D_I F4B9 F5B9 F6B6 F7B4 F8B1 F8B4 |
| BIDIR_SSTL135D_II F4B9 F5B9 F6B6 F7B4 F8B1 F8B4 |
| BIDIR_SSTL135_I F7B4 F8B4 |
| BIDIR_SSTL135_II F7B4 F8B4 |
| BIDIR_SSTL15D_I F4B9 F5B9 F6B6 F7B4 F8B1 F8B4 |
| BIDIR_SSTL15D_II F4B9 F5B9 F6B6 F7B4 F8B1 F8B4 |
| BIDIR_SSTL15_I F7B4 F8B4 |
| BIDIR_SSTL15_II F7B4 F8B4 |
| BIDIR_SSTL18D_I F4B9 F5B9 F6B6 F7B4 F8B1 F8B4 |
| BIDIR_SSTL18D_II F4B9 F5B9 F6B6 F7B4 F8B1 F8B4 |
| BIDIR_SSTL18_I F7B4 F8B4 |
| BIDIR_SSTL18_II F7B4 F8B4 |
| INPUT_BLVDS25 - |
| INPUT_HSUL12 - |
| INPUT_HSUL12D - |
| INPUT_LVCMOS12 - |
| INPUT_LVCMOS15 - |
| INPUT_LVCMOS18 - |
| INPUT_LVCMOS18D - |
| INPUT_LVCMOS25 - |
| INPUT_LVCMOS25D - |
| INPUT_LVCMOS33 - |
| INPUT_LVCMOS33D - |
| INPUT_LVDS - |
| INPUT_LVPECL33 - |
| INPUT_LVTTL33 - |
| INPUT_MLVDS25 - |
| INPUT_SLVS - |
| INPUT_SSTL135D_I - |
| INPUT_SSTL135D_II - |
| INPUT_SSTL135_I - |
| INPUT_SSTL135_II - |
| INPUT_SSTL15D_I - |
| INPUT_SSTL15D_II - |
| INPUT_SSTL15_I - |
| INPUT_SSTL15_II - |
| INPUT_SSTL18D_I - |
| INPUT_SSTL18D_II - |
| INPUT_SSTL18_I - |
| INPUT_SSTL18_II - |
| INPUT_SUBLVDS - |
| NONE - |
| OUTPUT_BLVDS25E F4B9 F5B9 F6B6 F7B4 F8B1 F8B4 |
| OUTPUT_HSUL12 F7B4 F8B4 |
| OUTPUT_HSUL12D F4B9 F5B9 F6B6 F7B4 F8B1 F8B4 |
| OUTPUT_LVCMOS12 F7B4 F8B4 |
| OUTPUT_LVCMOS15 F7B4 F8B4 |
| OUTPUT_LVCMOS18 F7B4 F8B4 |
| OUTPUT_LVCMOS25 F7B4 F8B4 |
| OUTPUT_LVCMOS25D F4B9 F5B9 F6B6 F7B4 F8B1 F8B4 |
| OUTPUT_LVCMOS33 F7B4 F8B4 |
| OUTPUT_LVCMOS33D F4B9 F5B9 F6B6 F7B4 F8B1 F8B4 |
| OUTPUT_LVDS25E F4B9 F5B9 F6B6 F7B4 F8B1 F8B4 |
| OUTPUT_LVPECL33E F4B9 F5B9 F6B6 F7B4 F8B1 F8B4 |
| OUTPUT_LVTTL33 F7B4 F8B4 |
| OUTPUT_MLVDS25E F4B9 F5B9 F6B6 F7B4 F8B1 F8B4 |
| OUTPUT_SSTL135D_I F4B9 F5B9 F6B6 F7B4 F8B1 F8B4 |
| OUTPUT_SSTL135D_II F4B9 F5B9 F6B6 F7B4 F8B1 F8B4 |
| OUTPUT_SSTL135_I F7B4 F8B4 |
| OUTPUT_SSTL135_II F7B4 F8B4 |
| OUTPUT_SSTL15D_I F4B9 F5B9 F6B6 F7B4 F8B1 F8B4 |
| OUTPUT_SSTL15D_II F4B9 F5B9 F6B6 F7B4 F8B1 F8B4 |
| OUTPUT_SSTL15_I F7B4 F8B4 |
| OUTPUT_SSTL15_II F7B4 F8B4 |
| OUTPUT_SSTL18D_I F4B9 F5B9 F6B6 F7B4 F8B1 F8B4 |
| OUTPUT_SSTL18D_II F4B9 F5B9 F6B6 F7B4 F8B1 F8B4 |
| OUTPUT_SSTL18_I F7B4 F8B4 |
| OUTPUT_SSTL18_II F7B4 F8B4 |
| |
| .config_enum PIOD.BASE_TYPE INPUT_HSUL12 |
| BIDIR_HSUL12 F4B9 F5B9 |
| BIDIR_LVCMOS12 F4B9 F5B9 |
| BIDIR_LVCMOS15 F4B9 F5B9 |
| BIDIR_LVCMOS18 F4B9 F5B9 |
| BIDIR_LVCMOS25 F4B9 F5B9 |
| BIDIR_LVCMOS33 F4B9 F5B9 |
| BIDIR_LVTTL33 F4B9 F5B9 |
| BIDIR_SSTL135_I F4B9 F5B9 |
| BIDIR_SSTL135_II F4B9 F5B9 |
| BIDIR_SSTL15_I F4B9 F5B9 |
| BIDIR_SSTL15_II F4B9 F5B9 |
| BIDIR_SSTL18_I F4B9 F5B9 |
| BIDIR_SSTL18_II F4B9 F5B9 |
| INPUT_HSUL12 - |
| INPUT_LVCMOS12 - |
| INPUT_LVCMOS15 - |
| INPUT_LVCMOS18 - |
| INPUT_LVCMOS25 - |
| INPUT_LVCMOS33 - |
| INPUT_LVTTL33 - |
| INPUT_SSTL135_I - |
| INPUT_SSTL135_II - |
| INPUT_SSTL15_I - |
| INPUT_SSTL15_II - |
| INPUT_SSTL18_I - |
| INPUT_SSTL18_II - |
| NONE - |
| OUTPUT_HSUL12 F4B9 F5B9 |
| OUTPUT_LVCMOS12 F4B9 F5B9 |
| OUTPUT_LVCMOS15 F4B9 F5B9 |
| OUTPUT_LVCMOS18 F4B9 F5B9 |
| OUTPUT_LVCMOS25 F4B9 F5B9 |
| OUTPUT_LVCMOS33 F4B9 F5B9 |
| OUTPUT_LVTTL33 F4B9 F5B9 |
| OUTPUT_SSTL135_I F4B9 F5B9 |
| OUTPUT_SSTL135_II F4B9 F5B9 |
| OUTPUT_SSTL15_I F4B9 F5B9 |
| OUTPUT_SSTL15_II F4B9 F5B9 |
| OUTPUT_SSTL18_I F4B9 F5B9 |
| OUTPUT_SSTL18_II F4B9 F5B9 |
| |
| |
| # Fixed Connections |
