| { |
| "DP16KD:REGMODE_A=NOREG,REGMODE_B=NOREG": [ |
| { |
| "clock": [ |
| "negedge", |
| "CLKA" |
| ], |
| "type": "Width", |
| "width": [ |
| 2359, |
| 2359, |
| 2359 |
| ] |
| }, |
| { |
| "clock": [ |
| "negedge", |
| "CLKB" |
| ], |
| "type": "Width", |
| "width": [ |
| 2359, |
| 2359, |
| 2359 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "OCEA", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "RSTA", |
| "setup": [ |
| 579, |
| 579, |
| 579 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA0", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA1", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA10", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA11", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA12", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA13", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA2", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA3", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA4", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA5", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA6", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA7", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA8", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA9", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 102, |
| 102, |
| 102 |
| ], |
| "pin": "WEA", |
| "setup": [ |
| 139, |
| 139, |
| 139 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "pin": "CSA0", |
| "setup": [ |
| 20, |
| 20, |
| 20 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "pin": "CSA1", |
| "setup": [ |
| 20, |
| 20, |
| 20 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "pin": "CSA2", |
| "setup": [ |
| 20, |
| 20, |
| 20 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA0", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA1", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA10", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA11", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA12", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA13", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA14", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA15", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA16", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA17", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA2", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA3", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA4", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA5", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA6", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA7", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA8", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA9", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 47, |
| 47, |
| 47 |
| ], |
| "pin": "CEA", |
| "setup": [ |
| 211, |
| 211, |
| 211 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "type": "Width", |
| "width": [ |
| 2359, |
| 2359, |
| 2359 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "OCEB", |
| "setup": [ |
| 253, |
| 253, |
| 253 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "RSTB", |
| "setup": [ |
| 585, |
| 585, |
| 585 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB0", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB1", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB10", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB11", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB12", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB13", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB2", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB3", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB4", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB5", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB6", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB7", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB8", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB9", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB0", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB1", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB10", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB11", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB12", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB13", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB14", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB15", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB16", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB17", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB2", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB3", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB4", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB5", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB6", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB7", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB8", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB9", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 392, |
| 392, |
| 392 |
| ], |
| "pin": "WEB", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 404, |
| 404, |
| 404 |
| ], |
| "pin": "CSB0", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 404, |
| 404, |
| 404 |
| ], |
| "pin": "CSB1", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 404, |
| 404, |
| 404 |
| ], |
| "pin": "CSB2", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 60, |
| 60, |
| 60 |
| ], |
| "pin": "CEB", |
| "setup": [ |
| 340, |
| 340, |
| 340 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "type": "Width", |
| "width": [ |
| 2359, |
| 2359, |
| 2359 |
| ] |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA10", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA11", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA12", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA13", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA14", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA15", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA16", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA17", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA2", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA3", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA4", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA5", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA6", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA7", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA8", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA9", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "to_pin": "DOB0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "to_pin": "DOB1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "to_pin": "DOB10", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "to_pin": "DOB11", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "to_pin": "DOB12", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "to_pin": "DOB13", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "to_pin": "DOB14", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "to_pin": "DOB15", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "to_pin": "DOB16", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "to_pin": "DOB17", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "to_pin": "DOB2", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "to_pin": "DOB3", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "to_pin": "DOB4", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "to_pin": "DOB5", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "to_pin": "DOB6", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "to_pin": "DOB7", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "to_pin": "DOB8", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "to_pin": "DOB9", |
| "type": "IOPath" |
| } |
| ], |
| "DP16KD:REGMODE_A=NOREG,REGMODE_B=OUTREG": [ |
| { |
| "clock": [ |
| "negedge", |
| "CLKA" |
| ], |
| "type": "Width", |
| "width": [ |
| 2359, |
| 2359, |
| 2359 |
| ] |
| }, |
| { |
| "clock": [ |
| "negedge", |
| "CLKB" |
| ], |
| "type": "Width", |
| "width": [ |
| 2359, |
| 2359, |
| 2359 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "OCEA", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "RSTA", |
| "setup": [ |
| 579, |
| 579, |
| 579 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA0", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA1", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA10", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA11", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA12", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA13", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA2", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA3", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA4", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA5", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA6", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA7", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA8", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA9", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 102, |
| 102, |
| 102 |
| ], |
| "pin": "WEA", |
| "setup": [ |
| 139, |
| 139, |
| 139 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "pin": "CSA0", |
| "setup": [ |
| 20, |
| 20, |
| 20 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "pin": "CSA1", |
| "setup": [ |
| 20, |
| 20, |
| 20 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "pin": "CSA2", |
| "setup": [ |
| 20, |
| 20, |
| 20 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA0", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA1", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA10", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA11", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA12", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA13", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA14", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA15", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA16", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA17", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA2", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA3", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA4", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA5", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA6", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA7", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA8", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA9", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 47, |
| 47, |
| 47 |
| ], |
| "pin": "CEA", |
| "setup": [ |
| 211, |
| 211, |
| 211 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "type": "Width", |
| "width": [ |
| 2359, |
| 2359, |
| 2359 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "OCEB", |
| "setup": [ |
| 253, |
| 253, |
| 253 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "RSTB", |
| "setup": [ |
| 583, |
| 583, |
| 583 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB0", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB1", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB10", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB11", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB12", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB13", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB2", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB3", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB4", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB5", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB6", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB7", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB8", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB9", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB0", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB1", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB10", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB11", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB12", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB13", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB14", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB15", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB16", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB17", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB2", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB3", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB4", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB5", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB6", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB7", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB8", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB9", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 392, |
| 392, |
| 392 |
| ], |
| "pin": "WEB", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 404, |
| 404, |
| 404 |
| ], |
| "pin": "CSB0", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 404, |
| 404, |
| 404 |
| ], |
| "pin": "CSB1", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 404, |
| 404, |
| 404 |
| ], |
| "pin": "CSB2", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 60, |
| 60, |
| 60 |
| ], |
| "pin": "CEB", |
| "setup": [ |
| 340, |
| 340, |
| 340 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "type": "Width", |
| "width": [ |
| 2359, |
| 2359, |
| 2359 |
| ] |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA10", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA11", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA12", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA13", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA14", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA15", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA16", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA17", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA2", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA3", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA4", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA5", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA6", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA7", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA8", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA9", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 882, |
| 919, |
| 956 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 882, |
| 919, |
| 956 |
| ], |
| "to_pin": "DOB0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 882, |
| 919, |
| 956 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 882, |
| 919, |
| 956 |
| ], |
| "to_pin": "DOB1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 882, |
| 919, |
| 956 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 882, |
| 919, |
| 956 |
| ], |
| "to_pin": "DOB10", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 882, |
| 919, |
| 956 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 882, |
| 919, |
| 956 |
| ], |
| "to_pin": "DOB11", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 882, |
| 919, |
| 956 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 882, |
| 919, |
| 956 |
| ], |
| "to_pin": "DOB12", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 882, |
| 919, |
| 956 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 882, |
| 919, |
| 956 |
| ], |
| "to_pin": "DOB13", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 882, |
| 919, |
| 956 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 882, |
| 919, |
| 956 |
| ], |
| "to_pin": "DOB14", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 882, |
| 919, |
| 956 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 882, |
| 919, |
| 956 |
| ], |
| "to_pin": "DOB15", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 882, |
| 919, |
| 956 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 882, |
| 919, |
| 956 |
| ], |
| "to_pin": "DOB16", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 882, |
| 919, |
| 956 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 882, |
| 919, |
| 956 |
| ], |
| "to_pin": "DOB17", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 882, |
| 919, |
| 956 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 882, |
| 919, |
| 956 |
| ], |
| "to_pin": "DOB2", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 882, |
| 919, |
| 956 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 882, |
| 919, |
| 956 |
| ], |
| "to_pin": "DOB3", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 882, |
| 919, |
| 956 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 882, |
| 919, |
| 956 |
| ], |
| "to_pin": "DOB4", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 882, |
| 919, |
| 956 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 882, |
| 919, |
| 956 |
| ], |
| "to_pin": "DOB5", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 882, |
| 919, |
| 956 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 882, |
| 919, |
| 956 |
| ], |
| "to_pin": "DOB6", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 882, |
| 919, |
| 956 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 882, |
| 919, |
| 956 |
| ], |
| "to_pin": "DOB7", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 882, |
| 919, |
| 956 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 882, |
| 919, |
| 956 |
| ], |
| "to_pin": "DOB8", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 882, |
| 919, |
| 956 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 882, |
| 919, |
| 956 |
| ], |
| "to_pin": "DOB9", |
| "type": "IOPath" |
| } |
| ], |
| "DP16KD:REGMODE_A=OUTREG,REGMODE_B=NOREG": [ |
| { |
| "clock": [ |
| "negedge", |
| "CLKA" |
| ], |
| "type": "Width", |
| "width": [ |
| 2359, |
| 2359, |
| 2359 |
| ] |
| }, |
| { |
| "clock": [ |
| "negedge", |
| "CLKB" |
| ], |
| "type": "Width", |
| "width": [ |
| 2359, |
| 2359, |
| 2359 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "OCEA", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "RSTA", |
| "setup": [ |
| 576, |
| 576, |
| 576 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA0", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA1", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA10", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA11", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA12", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA13", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA2", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA3", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA4", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA5", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA6", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA7", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA8", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA9", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 102, |
| 102, |
| 102 |
| ], |
| "pin": "WEA", |
| "setup": [ |
| 139, |
| 139, |
| 139 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "pin": "CSA0", |
| "setup": [ |
| 20, |
| 20, |
| 20 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "pin": "CSA1", |
| "setup": [ |
| 20, |
| 20, |
| 20 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "pin": "CSA2", |
| "setup": [ |
| 20, |
| 20, |
| 20 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA0", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA1", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA10", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA11", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA12", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA13", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA14", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA15", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA16", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA17", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA2", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA3", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA4", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA5", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA6", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA7", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA8", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA9", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 47, |
| 47, |
| 47 |
| ], |
| "pin": "CEA", |
| "setup": [ |
| 211, |
| 211, |
| 211 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "type": "Width", |
| "width": [ |
| 2359, |
| 2359, |
| 2359 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "OCEB", |
| "setup": [ |
| 253, |
| 253, |
| 253 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "RSTB", |
| "setup": [ |
| 585, |
| 585, |
| 585 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB0", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB1", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB10", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB11", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB12", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB13", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB2", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB3", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB4", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB5", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB6", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB7", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB8", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB9", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB0", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB1", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB10", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB11", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB12", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB13", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB14", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB15", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB16", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB17", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB2", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB3", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB4", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB5", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB6", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB7", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB8", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB9", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 392, |
| 392, |
| 392 |
| ], |
| "pin": "WEB", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 404, |
| 404, |
| 404 |
| ], |
| "pin": "CSB0", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 404, |
| 404, |
| 404 |
| ], |
| "pin": "CSB1", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 404, |
| 404, |
| 404 |
| ], |
| "pin": "CSB2", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 60, |
| 60, |
| 60 |
| ], |
| "pin": "CEB", |
| "setup": [ |
| 340, |
| 340, |
| 340 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "type": "Width", |
| "width": [ |
| 2359, |
| 2359, |
| 2359 |
| ] |
| }, |
| { |
| "falling": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "to_pin": "DOB0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "to_pin": "DOB1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "to_pin": "DOB10", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "to_pin": "DOB11", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "to_pin": "DOB12", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "to_pin": "DOB13", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "to_pin": "DOB14", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "to_pin": "DOB15", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "to_pin": "DOB16", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "to_pin": "DOB17", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "to_pin": "DOB2", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "to_pin": "DOB3", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "to_pin": "DOB4", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "to_pin": "DOB5", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "to_pin": "DOB6", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "to_pin": "DOB7", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "to_pin": "DOB8", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "to_pin": "DOB9", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 903, |
| 938, |
| 973 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 903, |
| 938, |
| 973 |
| ], |
| "to_pin": "DOA0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 903, |
| 938, |
| 973 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 903, |
| 938, |
| 973 |
| ], |
| "to_pin": "DOA1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 903, |
| 938, |
| 973 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 903, |
| 938, |
| 973 |
| ], |
| "to_pin": "DOA10", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 903, |
| 938, |
| 973 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 903, |
| 938, |
| 973 |
| ], |
| "to_pin": "DOA11", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 903, |
| 938, |
| 973 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 903, |
| 938, |
| 973 |
| ], |
| "to_pin": "DOA12", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 903, |
| 938, |
| 973 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 903, |
| 938, |
| 973 |
| ], |
| "to_pin": "DOA13", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 903, |
| 938, |
| 973 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 903, |
| 938, |
| 973 |
| ], |
| "to_pin": "DOA14", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 903, |
| 938, |
| 973 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 903, |
| 938, |
| 973 |
| ], |
| "to_pin": "DOA15", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 903, |
| 938, |
| 973 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 903, |
| 938, |
| 973 |
| ], |
| "to_pin": "DOA16", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 903, |
| 938, |
| 973 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 903, |
| 938, |
| 973 |
| ], |
| "to_pin": "DOA17", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 903, |
| 938, |
| 973 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 903, |
| 938, |
| 973 |
| ], |
| "to_pin": "DOA2", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 903, |
| 938, |
| 973 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 903, |
| 938, |
| 973 |
| ], |
| "to_pin": "DOA3", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 903, |
| 938, |
| 973 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 903, |
| 938, |
| 973 |
| ], |
| "to_pin": "DOA4", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 903, |
| 938, |
| 973 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 903, |
| 938, |
| 973 |
| ], |
| "to_pin": "DOA5", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 903, |
| 938, |
| 973 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 903, |
| 938, |
| 973 |
| ], |
| "to_pin": "DOA6", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 903, |
| 938, |
| 973 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 903, |
| 938, |
| 973 |
| ], |
| "to_pin": "DOA7", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 903, |
| 938, |
| 973 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 903, |
| 938, |
| 973 |
| ], |
| "to_pin": "DOA8", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 903, |
| 938, |
| 973 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 903, |
| 938, |
| 973 |
| ], |
| "to_pin": "DOA9", |
| "type": "IOPath" |
| } |
| ], |
| "DP16KD:REGMODE_A=OUTREG,REGMODE_B=OUTREG": [ |
| { |
| "clock": [ |
| "negedge", |
| "CLKA" |
| ], |
| "type": "Width", |
| "width": [ |
| 2359, |
| 2359, |
| 2359 |
| ] |
| }, |
| { |
| "clock": [ |
| "negedge", |
| "CLKB" |
| ], |
| "type": "Width", |
| "width": [ |
| 2359, |
| 2359, |
| 2359 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "OCEA", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "RSTA", |
| "setup": [ |
| 576, |
| 576, |
| 576 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA0", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA1", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA10", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA11", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA12", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA13", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA2", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA3", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA4", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA5", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA6", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA7", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA8", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA9", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 102, |
| 102, |
| 102 |
| ], |
| "pin": "WEA", |
| "setup": [ |
| 139, |
| 139, |
| 139 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "pin": "CSA0", |
| "setup": [ |
| 20, |
| 20, |
| 20 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "pin": "CSA1", |
| "setup": [ |
| 20, |
| 20, |
| 20 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "pin": "CSA2", |
| "setup": [ |
| 20, |
| 20, |
| 20 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA0", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA1", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA10", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA11", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA12", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA13", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA14", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA15", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA16", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA17", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA2", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA3", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA4", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA5", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA6", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA7", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA8", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA9", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 47, |
| 47, |
| 47 |
| ], |
| "pin": "CEA", |
| "setup": [ |
| 211, |
| 211, |
| 211 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "type": "Width", |
| "width": [ |
| 2359, |
| 2359, |
| 2359 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "OCEB", |
| "setup": [ |
| 253, |
| 253, |
| 253 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "RSTB", |
| "setup": [ |
| 583, |
| 583, |
| 583 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB0", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB1", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB10", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB11", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB12", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB13", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB2", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB3", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB4", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB5", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB6", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB7", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB8", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB9", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB0", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB1", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB10", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB11", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB12", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB13", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB14", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB15", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB16", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB17", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB2", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB3", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB4", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB5", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB6", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB7", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB8", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB9", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 392, |
| 392, |
| 392 |
| ], |
| "pin": "WEB", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 404, |
| 404, |
| 404 |
| ], |
| "pin": "CSB0", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 404, |
| 404, |
| 404 |
| ], |
| "pin": "CSB1", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 404, |
| 404, |
| 404 |
| ], |
| "pin": "CSB2", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 60, |
| 60, |
| 60 |
| ], |
| "pin": "CEB", |
| "setup": [ |
| 340, |
| 340, |
| 340 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "type": "Width", |
| "width": [ |
| 2359, |
| 2359, |
| 2359 |
| ] |
| }, |
| { |
| "falling": [ |
| 882, |
| 919, |
| 956 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 882, |
| 919, |
| 956 |
| ], |
| "to_pin": "DOB0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 882, |
| 919, |
| 956 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 882, |
| 919, |
| 956 |
| ], |
| "to_pin": "DOB1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 882, |
| 919, |
| 956 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 882, |
| 919, |
| 956 |
| ], |
| "to_pin": "DOB10", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 882, |
| 919, |
| 956 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 882, |
| 919, |
| 956 |
| ], |
| "to_pin": "DOB11", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 882, |
| 919, |
| 956 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 882, |
| 919, |
| 956 |
| ], |
| "to_pin": "DOB12", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 882, |
| 919, |
| 956 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 882, |
| 919, |
| 956 |
| ], |
| "to_pin": "DOB13", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 882, |
| 919, |
| 956 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 882, |
| 919, |
| 956 |
| ], |
| "to_pin": "DOB14", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 882, |
| 919, |
| 956 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 882, |
| 919, |
| 956 |
| ], |
| "to_pin": "DOB15", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 882, |
| 919, |
| 956 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 882, |
| 919, |
| 956 |
| ], |
| "to_pin": "DOB16", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 882, |
| 919, |
| 956 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 882, |
| 919, |
| 956 |
| ], |
| "to_pin": "DOB17", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 882, |
| 919, |
| 956 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 882, |
| 919, |
| 956 |
| ], |
| "to_pin": "DOB2", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 882, |
| 919, |
| 956 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 882, |
| 919, |
| 956 |
| ], |
| "to_pin": "DOB3", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 882, |
| 919, |
| 956 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 882, |
| 919, |
| 956 |
| ], |
| "to_pin": "DOB4", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 882, |
| 919, |
| 956 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 882, |
| 919, |
| 956 |
| ], |
| "to_pin": "DOB5", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 882, |
| 919, |
| 956 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 882, |
| 919, |
| 956 |
| ], |
| "to_pin": "DOB6", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 882, |
| 919, |
| 956 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 882, |
| 919, |
| 956 |
| ], |
| "to_pin": "DOB7", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 882, |
| 919, |
| 956 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 882, |
| 919, |
| 956 |
| ], |
| "to_pin": "DOB8", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 882, |
| 919, |
| 956 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 882, |
| 919, |
| 956 |
| ], |
| "to_pin": "DOB9", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 903, |
| 938, |
| 973 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 903, |
| 938, |
| 973 |
| ], |
| "to_pin": "DOA0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 903, |
| 938, |
| 973 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 903, |
| 938, |
| 973 |
| ], |
| "to_pin": "DOA1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 903, |
| 938, |
| 973 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 903, |
| 938, |
| 973 |
| ], |
| "to_pin": "DOA10", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 903, |
| 938, |
| 973 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 903, |
| 938, |
| 973 |
| ], |
| "to_pin": "DOA11", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 903, |
| 938, |
| 973 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 903, |
| 938, |
| 973 |
| ], |
| "to_pin": "DOA12", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 903, |
| 938, |
| 973 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 903, |
| 938, |
| 973 |
| ], |
| "to_pin": "DOA13", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 903, |
| 938, |
| 973 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 903, |
| 938, |
| 973 |
| ], |
| "to_pin": "DOA14", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 903, |
| 938, |
| 973 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 903, |
| 938, |
| 973 |
| ], |
| "to_pin": "DOA15", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 903, |
| 938, |
| 973 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 903, |
| 938, |
| 973 |
| ], |
| "to_pin": "DOA16", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 903, |
| 938, |
| 973 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 903, |
| 938, |
| 973 |
| ], |
| "to_pin": "DOA17", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 903, |
| 938, |
| 973 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 903, |
| 938, |
| 973 |
| ], |
| "to_pin": "DOA2", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 903, |
| 938, |
| 973 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 903, |
| 938, |
| 973 |
| ], |
| "to_pin": "DOA3", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 903, |
| 938, |
| 973 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 903, |
| 938, |
| 973 |
| ], |
| "to_pin": "DOA4", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 903, |
| 938, |
| 973 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 903, |
| 938, |
| 973 |
| ], |
| "to_pin": "DOA5", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 903, |
| 938, |
| 973 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 903, |
| 938, |
| 973 |
| ], |
| "to_pin": "DOA6", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 903, |
| 938, |
| 973 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 903, |
| 938, |
| 973 |
| ], |
| "to_pin": "DOA7", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 903, |
| 938, |
| 973 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 903, |
| 938, |
| 973 |
| ], |
| "to_pin": "DOA8", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 903, |
| 938, |
| 973 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 903, |
| 938, |
| 973 |
| ], |
| "to_pin": "DOA9", |
| "type": "IOPath" |
| } |
| ], |
| "DP16KD:WRITEMODE_A=NORMAL,WRITEMODE_B=NORMAL": [ |
| { |
| "clock": [ |
| "negedge", |
| "CLKA" |
| ], |
| "type": "Width", |
| "width": [ |
| 2359, |
| 2359, |
| 2359 |
| ] |
| }, |
| { |
| "clock": [ |
| "negedge", |
| "CLKB" |
| ], |
| "type": "Width", |
| "width": [ |
| 2359, |
| 2359, |
| 2359 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "OCEA", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "RSTA", |
| "setup": [ |
| 579, |
| 579, |
| 579 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA0", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA1", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA10", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA11", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA12", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA13", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA2", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA3", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA4", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA5", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA6", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA7", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA8", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA9", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 102, |
| 102, |
| 102 |
| ], |
| "pin": "WEA", |
| "setup": [ |
| 139, |
| 139, |
| 139 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "pin": "CSA0", |
| "setup": [ |
| 20, |
| 20, |
| 20 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "pin": "CSA1", |
| "setup": [ |
| 20, |
| 20, |
| 20 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "pin": "CSA2", |
| "setup": [ |
| 20, |
| 20, |
| 20 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA0", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA1", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA10", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA11", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA12", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA13", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA14", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA15", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA16", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA17", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA2", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA3", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA4", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA5", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA6", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA7", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA8", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA9", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 47, |
| 47, |
| 47 |
| ], |
| "pin": "CEA", |
| "setup": [ |
| 211, |
| 211, |
| 211 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "type": "Width", |
| "width": [ |
| 2359, |
| 2359, |
| 2359 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "OCEB", |
| "setup": [ |
| 253, |
| 253, |
| 253 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "RSTB", |
| "setup": [ |
| 585, |
| 585, |
| 585 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB0", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB1", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB10", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB11", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB12", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB13", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB2", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB3", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB4", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB5", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB6", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB7", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB8", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB9", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB0", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB1", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB10", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB11", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB12", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB13", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB14", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB15", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB16", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB17", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB2", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB3", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB4", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB5", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB6", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB7", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB8", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB9", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 392, |
| 392, |
| 392 |
| ], |
| "pin": "WEB", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 404, |
| 404, |
| 404 |
| ], |
| "pin": "CSB0", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 404, |
| 404, |
| 404 |
| ], |
| "pin": "CSB1", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 404, |
| 404, |
| 404 |
| ], |
| "pin": "CSB2", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 60, |
| 60, |
| 60 |
| ], |
| "pin": "CEB", |
| "setup": [ |
| 340, |
| 340, |
| 340 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "type": "Width", |
| "width": [ |
| 2359, |
| 2359, |
| 2359 |
| ] |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA10", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA11", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA12", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA13", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA14", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA15", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA16", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA17", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA2", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA3", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA4", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA5", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA6", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA7", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA8", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA9", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "to_pin": "DOB0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "to_pin": "DOB1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "to_pin": "DOB10", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "to_pin": "DOB11", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "to_pin": "DOB12", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "to_pin": "DOB13", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "to_pin": "DOB14", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "to_pin": "DOB15", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "to_pin": "DOB16", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "to_pin": "DOB17", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "to_pin": "DOB2", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "to_pin": "DOB3", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "to_pin": "DOB4", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "to_pin": "DOB5", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "to_pin": "DOB6", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "to_pin": "DOB7", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "to_pin": "DOB8", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5795, |
| 5812, |
| 5830 |
| ], |
| "to_pin": "DOB9", |
| "type": "IOPath" |
| } |
| ], |
| "DP16KD:WRITEMODE_A=NORMAL,WRITEMODE_B=READBEFOREWRITE": [ |
| { |
| "clock": [ |
| "negedge", |
| "CLKA" |
| ], |
| "type": "Width", |
| "width": [ |
| 2359, |
| 2359, |
| 2359 |
| ] |
| }, |
| { |
| "clock": [ |
| "negedge", |
| "CLKB" |
| ], |
| "type": "Width", |
| "width": [ |
| 3235, |
| 3235, |
| 3235 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "OCEA", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "RSTA", |
| "setup": [ |
| 579, |
| 579, |
| 579 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA0", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA1", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA10", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA11", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA12", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA13", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA2", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA3", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA4", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA5", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA6", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA7", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA8", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA9", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 102, |
| 102, |
| 102 |
| ], |
| "pin": "WEA", |
| "setup": [ |
| 139, |
| 139, |
| 139 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "pin": "CSA0", |
| "setup": [ |
| 20, |
| 20, |
| 20 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "pin": "CSA1", |
| "setup": [ |
| 20, |
| 20, |
| 20 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "pin": "CSA2", |
| "setup": [ |
| 20, |
| 20, |
| 20 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA0", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA1", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA10", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA11", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA12", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA13", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA14", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA15", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA16", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA17", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA2", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA3", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA4", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA5", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA6", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA7", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA8", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA9", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 47, |
| 47, |
| 47 |
| ], |
| "pin": "CEA", |
| "setup": [ |
| 211, |
| 211, |
| 211 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "type": "Width", |
| "width": [ |
| 2359, |
| 2359, |
| 2359 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "OCEB", |
| "setup": [ |
| 253, |
| 253, |
| 253 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "RSTB", |
| "setup": [ |
| 585, |
| 585, |
| 585 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB0", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB1", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB10", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB11", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB12", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB13", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB2", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB3", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB4", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB5", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB6", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB7", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB8", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB9", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB0", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB1", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB10", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB11", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB12", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB13", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB14", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB15", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB16", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB17", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB2", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB3", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB4", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB5", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB6", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB7", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB8", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB9", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 392, |
| 392, |
| 392 |
| ], |
| "pin": "WEB", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 404, |
| 404, |
| 404 |
| ], |
| "pin": "CSB0", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 404, |
| 404, |
| 404 |
| ], |
| "pin": "CSB1", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 404, |
| 404, |
| 404 |
| ], |
| "pin": "CSB2", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 60, |
| 60, |
| 60 |
| ], |
| "pin": "CEB", |
| "setup": [ |
| 340, |
| 340, |
| 340 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "type": "Width", |
| "width": [ |
| 3235, |
| 3235, |
| 3235 |
| ] |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA10", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA11", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA12", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA13", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA14", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA15", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA16", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA17", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA2", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA3", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA4", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA5", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA6", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA7", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA8", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA9", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5714, |
| 5715, |
| 5716 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5714, |
| 5715, |
| 5716 |
| ], |
| "to_pin": "DOB0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5714, |
| 5715, |
| 5716 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5714, |
| 5715, |
| 5716 |
| ], |
| "to_pin": "DOB1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5714, |
| 5715, |
| 5716 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5714, |
| 5715, |
| 5716 |
| ], |
| "to_pin": "DOB10", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5714, |
| 5715, |
| 5716 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5714, |
| 5715, |
| 5716 |
| ], |
| "to_pin": "DOB11", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5714, |
| 5715, |
| 5716 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5714, |
| 5715, |
| 5716 |
| ], |
| "to_pin": "DOB12", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5714, |
| 5715, |
| 5716 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5714, |
| 5715, |
| 5716 |
| ], |
| "to_pin": "DOB13", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5714, |
| 5715, |
| 5716 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5714, |
| 5715, |
| 5716 |
| ], |
| "to_pin": "DOB14", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5714, |
| 5715, |
| 5716 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5714, |
| 5715, |
| 5716 |
| ], |
| "to_pin": "DOB15", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5714, |
| 5715, |
| 5716 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5714, |
| 5715, |
| 5716 |
| ], |
| "to_pin": "DOB16", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5714, |
| 5715, |
| 5716 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5714, |
| 5715, |
| 5716 |
| ], |
| "to_pin": "DOB17", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5714, |
| 5715, |
| 5716 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5714, |
| 5715, |
| 5716 |
| ], |
| "to_pin": "DOB2", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5714, |
| 5715, |
| 5716 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5714, |
| 5715, |
| 5716 |
| ], |
| "to_pin": "DOB3", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5714, |
| 5715, |
| 5716 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5714, |
| 5715, |
| 5716 |
| ], |
| "to_pin": "DOB4", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5714, |
| 5715, |
| 5716 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5714, |
| 5715, |
| 5716 |
| ], |
| "to_pin": "DOB5", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5714, |
| 5715, |
| 5716 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5714, |
| 5715, |
| 5716 |
| ], |
| "to_pin": "DOB6", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5714, |
| 5715, |
| 5716 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5714, |
| 5715, |
| 5716 |
| ], |
| "to_pin": "DOB7", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5714, |
| 5715, |
| 5716 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5714, |
| 5715, |
| 5716 |
| ], |
| "to_pin": "DOB8", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5714, |
| 5715, |
| 5716 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5714, |
| 5715, |
| 5716 |
| ], |
| "to_pin": "DOB9", |
| "type": "IOPath" |
| } |
| ], |
| "DP16KD:WRITEMODE_A=NORMAL,WRITEMODE_B=WRITETHROUGH": [ |
| { |
| "clock": [ |
| "negedge", |
| "CLKA" |
| ], |
| "type": "Width", |
| "width": [ |
| 2359, |
| 2359, |
| 2359 |
| ] |
| }, |
| { |
| "clock": [ |
| "negedge", |
| "CLKB" |
| ], |
| "type": "Width", |
| "width": [ |
| 2341, |
| 2341, |
| 2341 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "OCEA", |
| "setup": [ |
| 226, |
| 226, |
| 226 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "RSTA", |
| "setup": [ |
| 579, |
| 579, |
| 579 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA0", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA1", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA10", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA11", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA12", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA13", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA2", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA3", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA4", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA5", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA6", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA7", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA8", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 1, |
| 1, |
| 1 |
| ], |
| "pin": "ADA9", |
| "setup": [ |
| 251, |
| 251, |
| 251 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 102, |
| 102, |
| 102 |
| ], |
| "pin": "WEA", |
| "setup": [ |
| 139, |
| 139, |
| 139 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "pin": "CSA0", |
| "setup": [ |
| 20, |
| 20, |
| 20 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "pin": "CSA1", |
| "setup": [ |
| 20, |
| 20, |
| 20 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 202, |
| 202, |
| 202 |
| ], |
| "pin": "CSA2", |
| "setup": [ |
| 20, |
| 20, |
| 20 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA0", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA1", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA10", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA11", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA12", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA13", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA14", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA15", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA16", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA17", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA2", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA3", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA4", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA5", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA6", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA7", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA8", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 25, |
| 25, |
| 25 |
| ], |
| "pin": "DIA9", |
| "setup": [ |
| 218, |
| 218, |
| 218 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "hold": [ |
| 47, |
| 47, |
| 47 |
| ], |
| "pin": "CEA", |
| "setup": [ |
| 211, |
| 211, |
| 211 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKA" |
| ], |
| "type": "Width", |
| "width": [ |
| 2359, |
| 2359, |
| 2359 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "OCEB", |
| "setup": [ |
| 253, |
| 253, |
| 253 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "RSTB", |
| "setup": [ |
| 585, |
| 585, |
| 585 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB0", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB1", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB10", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB11", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB12", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB13", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB2", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB3", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB4", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB5", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB6", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB7", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB8", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 101, |
| 101, |
| 101 |
| ], |
| "pin": "ADB9", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB0", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB1", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB10", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB11", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB12", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB13", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB14", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB15", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB16", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB17", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB2", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB3", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB4", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB5", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB6", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB7", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB8", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 259, |
| 259, |
| 259 |
| ], |
| "pin": "DIB9", |
| "setup": [ |
| 134, |
| 134, |
| 134 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 392, |
| 392, |
| 392 |
| ], |
| "pin": "WEB", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 404, |
| 404, |
| 404 |
| ], |
| "pin": "CSB0", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 404, |
| 404, |
| 404 |
| ], |
| "pin": "CSB1", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 404, |
| 404, |
| 404 |
| ], |
| "pin": "CSB2", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "hold": [ |
| 60, |
| 60, |
| 60 |
| ], |
| "pin": "CEB", |
| "setup": [ |
| 340, |
| 340, |
| 340 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLKB" |
| ], |
| "type": "Width", |
| "width": [ |
| 2341, |
| 2341, |
| 2341 |
| ] |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA10", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA11", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA12", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA13", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA14", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA15", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA16", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA17", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA2", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA3", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA4", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA5", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA6", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA7", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA8", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "from_pin": "CLKA", |
| "rising": [ |
| 5535, |
| 5572, |
| 5609 |
| ], |
| "to_pin": "DOA9", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5720, |
| 5722, |
| 5724 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5720, |
| 5722, |
| 5724 |
| ], |
| "to_pin": "DOB0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5720, |
| 5722, |
| 5724 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5720, |
| 5722, |
| 5724 |
| ], |
| "to_pin": "DOB1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5720, |
| 5722, |
| 5724 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5720, |
| 5722, |
| 5724 |
| ], |
| "to_pin": "DOB10", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5720, |
| 5722, |
| 5724 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5720, |
| 5722, |
| 5724 |
| ], |
| "to_pin": "DOB11", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5720, |
| 5722, |
| 5724 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5720, |
| 5722, |
| 5724 |
| ], |
| "to_pin": "DOB12", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5720, |
| 5722, |
| 5724 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5720, |
| 5722, |
| 5724 |
| ], |
| "to_pin": "DOB13", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5720, |
| 5722, |
| 5724 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5720, |
| 5722, |
| 5724 |
| ], |
| "to_pin": "DOB14", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5720, |
| 5722, |
| 5724 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5720, |
| 5722, |
| 5724 |
| ], |
| "to_pin": "DOB15", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5720, |
| 5722, |
| 5724 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5720, |
| 5722, |
| 5724 |
| ], |
| "to_pin": "DOB16", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5720, |
| 5722, |
| 5724 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5720, |
| 5722, |
| 5724 |
| ], |
| "to_pin": "DOB17", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5720, |
| 5722, |
| 5724 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5720, |
| 5722, |
| 5724 |
| ], |
| "to_pin": "DOB2", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5720, |
| 5722, |
| 5724 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5720, |
| 5722, |
| 5724 |
| ], |
| "to_pin": "DOB3", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5720, |
| 5722, |
| 5724 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5720, |
| 5722, |
| 5724 |
| ], |
| "to_pin": "DOB4", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5720, |
| 5722, |
| 5724 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5720, |
| 5722, |
| 5724 |
| ], |
| "to_pin": "DOB5", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5720, |
| 5722, |
| 5724 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5720, |
| 5722, |
| 5724 |
| ], |
| "to_pin": "DOB6", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5720, |
| 5722, |
| 5724 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5720, |
| 5722, |
| 5724 |
| ], |
| "to_pin": "DOB7", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5720, |
| 5722, |
| 5724 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5720, |
| 5722, |
| 5724 |
| ], |
| "to_pin": "DOB8", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 5720, |
| 5722, |
| 5724 |
| ], |
| "from_pin": "CLKB", |
| "rising": [ |
| 5720, |
| 5722, |
| 5724 |
| ], |
| "to_pin": "DOB9", |
| "type": "IOPath" |
| } |
| ], |
| "IOLOGIC:MODE=IDDRX1F": [ |
| { |
| "clock": [ |
| "negedge", |
| "CLK" |
| ], |
| "type": "Width", |
| "width": [ |
| 2000, |
| 2000, |
| 2000 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "hold": [ |
| 235, |
| 235, |
| 235 |
| ], |
| "pin": "DI", |
| "setup": [ |
| 401, |
| 401, |
| 401 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "type": "Width", |
| "width": [ |
| 2000, |
| 2000, |
| 2000 |
| ] |
| }, |
| { |
| "falling": [ |
| 356, |
| 356, |
| 356 |
| ], |
| "from_pin": "CLK", |
| "rising": [ |
| 356, |
| 356, |
| 356 |
| ], |
| "to_pin": "RXDATA0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 356, |
| 356, |
| 356 |
| ], |
| "from_pin": "CLK", |
| "rising": [ |
| 356, |
| 356, |
| 356 |
| ], |
| "to_pin": "RXDATA1", |
| "type": "IOPath" |
| } |
| ], |
| "IOLOGIC:MODE=IDDRX2F": [ |
| { |
| "clock": [ |
| "negedge", |
| "ECLK" |
| ], |
| "type": "Width", |
| "width": [ |
| 1799, |
| 1799, |
| 1799 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": [ |
| "posedge", |
| "ECLK" |
| ], |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "ECLK" |
| ], |
| "hold": [ |
| 12, |
| 12, |
| 12 |
| ], |
| "pin": "DI", |
| "setup": [ |
| 445, |
| 445, |
| 445 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "ECLK" |
| ], |
| "type": "Width", |
| "width": [ |
| 1799, |
| 1799, |
| 1799 |
| ] |
| }, |
| { |
| "falling": [ |
| 453, |
| 453, |
| 453 |
| ], |
| "from_pin": "CLK", |
| "rising": [ |
| 453, |
| 453, |
| 453 |
| ], |
| "to_pin": "RXDATA0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 453, |
| 453, |
| 453 |
| ], |
| "from_pin": "CLK", |
| "rising": [ |
| 453, |
| 453, |
| 453 |
| ], |
| "to_pin": "RXDATA1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 453, |
| 453, |
| 453 |
| ], |
| "from_pin": "CLK", |
| "rising": [ |
| 453, |
| 453, |
| 453 |
| ], |
| "to_pin": "RXDATA2", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 453, |
| 453, |
| 453 |
| ], |
| "from_pin": "CLK", |
| "rising": [ |
| 453, |
| 453, |
| 453 |
| ], |
| "to_pin": "RXDATA3", |
| "type": "IOPath" |
| } |
| ], |
| "IOLOGIC:MODE=IREG": [ |
| { |
| "clock": [ |
| "negedge", |
| "CLK" |
| ], |
| "type": "Width", |
| "width": [ |
| 1945, |
| 1945, |
| 1945 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "LSR", |
| "setup": [ |
| 128, |
| 128, |
| 128 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "hold": [ |
| 311, |
| 311, |
| 311 |
| ], |
| "pin": "DI", |
| "setup": [ |
| 439, |
| 439, |
| 439 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "hold": [ |
| 77, |
| 77, |
| 77 |
| ], |
| "pin": "CE", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "type": "Width", |
| "width": [ |
| 1945, |
| 1945, |
| 1945 |
| ] |
| }, |
| { |
| "falling": [ |
| 474, |
| 474, |
| 474 |
| ], |
| "from_pin": "CLK", |
| "rising": [ |
| 474, |
| 474, |
| 474 |
| ], |
| "to_pin": "INFF", |
| "type": "IOPath" |
| } |
| ], |
| "IOLOGIC:MODE=ODDRX1F": [ |
| { |
| "clock": [ |
| "negedge", |
| "CLK" |
| ], |
| "type": "Width", |
| "width": [ |
| 2000, |
| 2000, |
| 2000 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "type": "Width", |
| "width": [ |
| 2000, |
| 2000, |
| 2000 |
| ] |
| }, |
| { |
| "falling": [ |
| 983, |
| 985, |
| 987 |
| ], |
| "from_pin": "CLK", |
| "rising": [ |
| 983, |
| 985, |
| 987 |
| ], |
| "to_pin": "IOLDO", |
| "type": "IOPath" |
| } |
| ], |
| "IOLOGIC:MODE=ODDRX2F": [ |
| { |
| "clock": [ |
| "negedge", |
| "ECLK" |
| ], |
| "type": "Width", |
| "width": [ |
| 1600, |
| 1600, |
| 1600 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "TXDATA0", |
| "setup": [ |
| 113, |
| 113, |
| 113 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "TXDATA1", |
| "setup": [ |
| 113, |
| 113, |
| 113 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "TXDATA2", |
| "setup": [ |
| 113, |
| 113, |
| 113 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "TXDATA3", |
| "setup": [ |
| 113, |
| 113, |
| 113 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "ECLK" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": [ |
| "posedge", |
| "CLK" |
| ], |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "ECLK" |
| ], |
| "type": "Width", |
| "width": [ |
| 1600, |
| 1600, |
| 1600 |
| ] |
| }, |
| { |
| "falling": [ |
| 1287, |
| 1295, |
| 1303 |
| ], |
| "from_pin": "ECLK", |
| "rising": [ |
| 1287, |
| 1295, |
| 1303 |
| ], |
| "to_pin": "IOLDO", |
| "type": "IOPath" |
| } |
| ], |
| "IOLOGIC:MODE=OREG": [ |
| { |
| "clock": [ |
| "negedge", |
| "CLK" |
| ], |
| "type": "Width", |
| "width": [ |
| 1945, |
| 1945, |
| 1945 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "LSR", |
| "setup": [ |
| 141, |
| 141, |
| 141 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "TXDATA0", |
| "setup": [ |
| 148, |
| 148, |
| 148 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "hold": [ |
| 74, |
| 74, |
| 74 |
| ], |
| "pin": "CE", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "type": "Width", |
| "width": [ |
| 1945, |
| 1945, |
| 1945 |
| ] |
| }, |
| { |
| "falling": [ |
| 1200, |
| 1200, |
| 1200 |
| ], |
| "from_pin": "CLK", |
| "rising": [ |
| 1200, |
| 1200, |
| 1200 |
| ], |
| "to_pin": "IOLDO", |
| "type": "IOPath" |
| } |
| ], |
| "IOLOGIC:MODE=TSREG": [ |
| { |
| "clock": [ |
| "negedge", |
| "CLK" |
| ], |
| "type": "Width", |
| "width": [ |
| 1945, |
| 1945, |
| 1945 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "LSR", |
| "setup": [ |
| 141, |
| 141, |
| 141 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "TSDATA0", |
| "setup": [ |
| 205, |
| 205, |
| 205 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "hold": [ |
| 74, |
| 74, |
| 74 |
| ], |
| "pin": "CE", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "type": "Width", |
| "width": [ |
| 1945, |
| 1945, |
| 1945 |
| ] |
| }, |
| { |
| "falling": [ |
| 1031, |
| 1031, |
| 1031 |
| ], |
| "from_pin": "CLK", |
| "rising": [ |
| 1031, |
| 1031, |
| 1031 |
| ], |
| "to_pin": "IOLTO", |
| "type": "IOPath" |
| } |
| ], |
| "MULT18X18D:REGS=ALL": [ |
| { |
| "clock": [ |
| "posedge", |
| "CLK0" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 21 |
| ], |
| "pin": "A", |
| "setup": [ |
| 53, |
| 68, |
| 84 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK0" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 21 |
| ], |
| "pin": "B", |
| "setup": [ |
| 53, |
| 68, |
| 84 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK0" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 21 |
| ], |
| "pin": "CE0", |
| "setup": [ |
| 147, |
| 199, |
| 252 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK0" |
| ], |
| "hold": [ |
| 137, |
| 152, |
| 168 |
| ], |
| "pin": "SIGNEDA", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK0" |
| ], |
| "hold": [ |
| 137, |
| 152, |
| 168 |
| ], |
| "pin": "SIGNEDB", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK0" |
| ], |
| "hold": [ |
| 63, |
| 73, |
| 84 |
| ], |
| "pin": "RST0", |
| "setup": [ |
| 63, |
| 79, |
| 95 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "falling": [ |
| 578, |
| 656, |
| 735 |
| ], |
| "from_pin": "CLK0", |
| "rising": [ |
| 578, |
| 656, |
| 735 |
| ], |
| "to_pin": "P", |
| "type": "IOPath" |
| } |
| ], |
| "MULT18X18D:REGS=INPUT": [ |
| { |
| "clock": [ |
| "posedge", |
| "CLK0" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 21 |
| ], |
| "pin": "A", |
| "setup": [ |
| 53, |
| 68, |
| 84 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK0" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 21 |
| ], |
| "pin": "B", |
| "setup": [ |
| 53, |
| 68, |
| 84 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK0" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 21 |
| ], |
| "pin": "CE0", |
| "setup": [ |
| 147, |
| 199, |
| 252 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK0" |
| ], |
| "hold": [ |
| 137, |
| 152, |
| 168 |
| ], |
| "pin": "SIGNEDA", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK0" |
| ], |
| "hold": [ |
| 137, |
| 152, |
| 168 |
| ], |
| "pin": "SIGNEDB", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK0" |
| ], |
| "hold": [ |
| 63, |
| 73, |
| 84 |
| ], |
| "pin": "RST0", |
| "setup": [ |
| 63, |
| 79, |
| 95 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "falling": [ |
| 2856, |
| 3360, |
| 3864 |
| ], |
| "from_pin": "CLK0", |
| "rising": [ |
| 2856, |
| 3360, |
| 3864 |
| ], |
| "to_pin": "P", |
| "type": "IOPath" |
| } |
| ], |
| "MULT18X18D:REGS=NONE": [ |
| { |
| "falling": [ |
| 2740, |
| 3234, |
| 3728 |
| ], |
| "from_pin": "SIGNEDA", |
| "rising": [ |
| 2740, |
| 3234, |
| 3728 |
| ], |
| "to_pin": "P", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 2740, |
| 3234, |
| 3728 |
| ], |
| "from_pin": "SIGNEDB", |
| "rising": [ |
| 2740, |
| 3234, |
| 3728 |
| ], |
| "to_pin": "P", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 2909, |
| 3418, |
| 3927 |
| ], |
| "from_pin": "A", |
| "rising": [ |
| 2909, |
| 3418, |
| 3927 |
| ], |
| "to_pin": "P", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 2909, |
| 3418, |
| 3927 |
| ], |
| "from_pin": "B", |
| "rising": [ |
| 2909, |
| 3418, |
| 3927 |
| ], |
| "to_pin": "P", |
| "type": "IOPath" |
| } |
| ], |
| "MULT18X18D:REGS=OUTPUT": [ |
| { |
| "clock": [ |
| "posedge", |
| "CLK0" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "A", |
| "setup": [ |
| 3035, |
| 3260, |
| 3486 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK0" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "B", |
| "setup": [ |
| 3035, |
| 3260, |
| 3486 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK0" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "SIGNEDA", |
| "setup": [ |
| 2877, |
| 3082, |
| 3287 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK0" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "SIGNEDB", |
| "setup": [ |
| 2877, |
| 3082, |
| 3287 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK0" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 21 |
| ], |
| "pin": "CE0", |
| "setup": [ |
| 147, |
| 199, |
| 252 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK0" |
| ], |
| "hold": [ |
| 63, |
| 73, |
| 84 |
| ], |
| "pin": "RST0", |
| "setup": [ |
| 63, |
| 79, |
| 95 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "falling": [ |
| 578, |
| 656, |
| 735 |
| ], |
| "from_pin": "CLK0", |
| "rising": [ |
| 578, |
| 656, |
| 735 |
| ], |
| "to_pin": "P", |
| "type": "IOPath" |
| } |
| ], |
| "MULT18X18D:REGS=PIPELINE": [ |
| { |
| "clock": [ |
| "posedge", |
| "CLK0" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "A", |
| "setup": [ |
| 2405, |
| 2515, |
| 2625 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK0" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "B", |
| "setup": [ |
| 2405, |
| 2515, |
| 2625 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK0" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "SIGNEDA", |
| "setup": [ |
| 2247, |
| 2336, |
| 2425 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK0" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "SIGNEDB", |
| "setup": [ |
| 2247, |
| 2336, |
| 2425 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK0" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 21 |
| ], |
| "pin": "CE0", |
| "setup": [ |
| 147, |
| 199, |
| 252 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK0" |
| ], |
| "hold": [ |
| 63, |
| 73, |
| 84 |
| ], |
| "pin": "RST0", |
| "setup": [ |
| 63, |
| 79, |
| 95 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "falling": [ |
| 1302, |
| 1318, |
| 1334 |
| ], |
| "from_pin": "CLK0", |
| "rising": [ |
| 1302, |
| 1318, |
| 1334 |
| ], |
| "to_pin": "P", |
| "type": "IOPath" |
| } |
| ], |
| "PIO:IOTYPE=LVCMOS12": [ |
| { |
| "clock": [ |
| "negedge", |
| "PAD" |
| ], |
| "type": "Width", |
| "width": [ |
| 2500, |
| 2500, |
| 2500 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "PAD" |
| ], |
| "type": "Width", |
| "width": [ |
| 2500, |
| 2500, |
| 2500 |
| ] |
| }, |
| { |
| "falling": [ |
| 1543, |
| 1665, |
| 1787 |
| ], |
| "from_pin": "PADDO", |
| "rising": [ |
| 1543, |
| 1665, |
| 1787 |
| ], |
| "to_pin": "PAD", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 1650, |
| 1916, |
| 2183 |
| ], |
| "from_pin": "PADDT", |
| "rising": [ |
| 1650, |
| 1916, |
| 2183 |
| ], |
| "to_pin": "PAD", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 689, |
| 729, |
| 770 |
| ], |
| "from_pin": "PAD", |
| "rising": [ |
| 689, |
| 729, |
| 770 |
| ], |
| "to_pin": "PADDI", |
| "type": "IOPath" |
| } |
| ], |
| "PIO:IOTYPE=LVCMOS15": [ |
| { |
| "clock": [ |
| "negedge", |
| "PAD" |
| ], |
| "type": "Width", |
| "width": [ |
| 2500, |
| 2500, |
| 2500 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "PAD" |
| ], |
| "type": "Width", |
| "width": [ |
| 2500, |
| 2500, |
| 2500 |
| ] |
| }, |
| { |
| "falling": [ |
| 1542, |
| 1684, |
| 1827 |
| ], |
| "from_pin": "PADDO", |
| "rising": [ |
| 1542, |
| 1684, |
| 1827 |
| ], |
| "to_pin": "PAD", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 1644, |
| 1847, |
| 2051 |
| ], |
| "from_pin": "PADDT", |
| "rising": [ |
| 1644, |
| 1847, |
| 2051 |
| ], |
| "to_pin": "PAD", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 1707, |
| 1734, |
| 1761 |
| ], |
| "from_pin": "PAD", |
| "rising": [ |
| 1707, |
| 1734, |
| 1761 |
| ], |
| "to_pin": "PADDI", |
| "type": "IOPath" |
| } |
| ], |
| "PIO:IOTYPE=LVCMOS18": [ |
| { |
| "clock": [ |
| "negedge", |
| "PAD" |
| ], |
| "type": "Width", |
| "width": [ |
| 2500, |
| 2500, |
| 2500 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "PAD" |
| ], |
| "type": "Width", |
| "width": [ |
| 2500, |
| 2500, |
| 2500 |
| ] |
| }, |
| { |
| "falling": [ |
| 1311, |
| 1390, |
| 1469 |
| ], |
| "from_pin": "PAD", |
| "rising": [ |
| 1311, |
| 1390, |
| 1469 |
| ], |
| "to_pin": "PADDI", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 1599, |
| 1726, |
| 1854 |
| ], |
| "from_pin": "PADDO", |
| "rising": [ |
| 1599, |
| 1726, |
| 1854 |
| ], |
| "to_pin": "PAD", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 1844, |
| 2003, |
| 2162 |
| ], |
| "from_pin": "PADDT", |
| "rising": [ |
| 1844, |
| 2003, |
| 2162 |
| ], |
| "to_pin": "PAD", |
| "type": "IOPath" |
| } |
| ], |
| "PIO:IOTYPE=LVCMOS25": [ |
| { |
| "clock": [ |
| "negedge", |
| "PAD" |
| ], |
| "type": "Width", |
| "width": [ |
| 2500, |
| 2500, |
| 2500 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "PAD" |
| ], |
| "type": "Width", |
| "width": [ |
| 2500, |
| 2500, |
| 2500 |
| ] |
| }, |
| { |
| "falling": [ |
| 1838, |
| 2001, |
| 2165 |
| ], |
| "from_pin": "PADDT", |
| "rising": [ |
| 1838, |
| 2001, |
| 2165 |
| ], |
| "to_pin": "PAD", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 1915, |
| 1933, |
| 1951 |
| ], |
| "from_pin": "PADDO", |
| "rising": [ |
| 1915, |
| 1933, |
| 1951 |
| ], |
| "to_pin": "PAD", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 887, |
| 946, |
| 1005 |
| ], |
| "from_pin": "PAD", |
| "rising": [ |
| 887, |
| 946, |
| 1005 |
| ], |
| "to_pin": "PADDI", |
| "type": "IOPath" |
| } |
| ], |
| "PIO:IOTYPE=LVCMOS33": [ |
| { |
| "clock": [ |
| "negedge", |
| "PAD" |
| ], |
| "type": "Width", |
| "width": [ |
| 2500, |
| 2500, |
| 2500 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "PAD" |
| ], |
| "type": "Width", |
| "width": [ |
| 2500, |
| 2500, |
| 2500 |
| ] |
| }, |
| { |
| "falling": [ |
| 1988, |
| 2331, |
| 2674 |
| ], |
| "from_pin": "PADDO", |
| "rising": [ |
| 1988, |
| 2331, |
| 2674 |
| ], |
| "to_pin": "PAD", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 2203, |
| 2613, |
| 3023 |
| ], |
| "from_pin": "PADDT", |
| "rising": [ |
| 2203, |
| 2613, |
| 3023 |
| ], |
| "to_pin": "PAD", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 990, |
| 1065, |
| 1140 |
| ], |
| "from_pin": "PAD", |
| "rising": [ |
| 990, |
| 1065, |
| 1140 |
| ], |
| "to_pin": "PADDI", |
| "type": "IOPath" |
| } |
| ], |
| "PIO:IOTYPE=LVDS": [ |
| { |
| "clock": [ |
| "negedge", |
| "PAD" |
| ], |
| "type": "Width", |
| "width": [ |
| 1250, |
| 1250, |
| 1250 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "PAD" |
| ], |
| "type": "Width", |
| "width": [ |
| 1250, |
| 1250, |
| 1250 |
| ] |
| }, |
| { |
| "falling": [ |
| 1065, |
| 1066, |
| 1067 |
| ], |
| "from_pin": "PADDO", |
| "rising": [ |
| 1065, |
| 1066, |
| 1067 |
| ], |
| "to_pin": "PAD", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 492, |
| 494, |
| 497 |
| ], |
| "from_pin": "PAD", |
| "rising": [ |
| 492, |
| 494, |
| 497 |
| ], |
| "to_pin": "PADDI", |
| "type": "IOPath" |
| } |
| ], |
| "PIO:IOTYPE=SSTL15_I": [ |
| { |
| "clock": [ |
| "negedge", |
| "PAD" |
| ], |
| "type": "Width", |
| "width": [ |
| 1250, |
| 1250, |
| 1250 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "PAD" |
| ], |
| "type": "Width", |
| "width": [ |
| 1250, |
| 1250, |
| 1250 |
| ] |
| }, |
| { |
| "falling": [ |
| 1908, |
| 2001, |
| 2094 |
| ], |
| "from_pin": "PADDO", |
| "rising": [ |
| 1908, |
| 2001, |
| 2094 |
| ], |
| "to_pin": "PAD", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 1978, |
| 2543, |
| 3108 |
| ], |
| "from_pin": "PADDT", |
| "rising": [ |
| 1978, |
| 2543, |
| 3108 |
| ], |
| "to_pin": "PAD", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 454, |
| 465, |
| 476 |
| ], |
| "from_pin": "PAD", |
| "rising": [ |
| 454, |
| 465, |
| 476 |
| ], |
| "to_pin": "PADDI", |
| "type": "IOPath" |
| } |
| ], |
| "PIO:IOTYPE=SSTL15_II": [ |
| { |
| "clock": [ |
| "negedge", |
| "PAD" |
| ], |
| "type": "Width", |
| "width": [ |
| 1250, |
| 1250, |
| 1250 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "PAD" |
| ], |
| "type": "Width", |
| "width": [ |
| 1250, |
| 1250, |
| 1250 |
| ] |
| }, |
| { |
| "falling": [ |
| 1793, |
| 2552, |
| 3312 |
| ], |
| "from_pin": "PADDT", |
| "rising": [ |
| 1793, |
| 2552, |
| 3312 |
| ], |
| "to_pin": "PAD", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 1814, |
| 1882, |
| 1950 |
| ], |
| "from_pin": "PADDO", |
| "rising": [ |
| 1814, |
| 1882, |
| 1950 |
| ], |
| "to_pin": "PAD", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 454, |
| 465, |
| 476 |
| ], |
| "from_pin": "PAD", |
| "rising": [ |
| 454, |
| 465, |
| 476 |
| ], |
| "to_pin": "PADDI", |
| "type": "IOPath" |
| } |
| ], |
| "PIO:IOTYPE=SSTL18_I": [ |
| { |
| "clock": [ |
| "negedge", |
| "PAD" |
| ], |
| "type": "Width", |
| "width": [ |
| 1250, |
| 1250, |
| 1250 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "PAD" |
| ], |
| "type": "Width", |
| "width": [ |
| 1250, |
| 1250, |
| 1250 |
| ] |
| }, |
| { |
| "falling": [ |
| 1981, |
| 2057, |
| 2134 |
| ], |
| "from_pin": "PADDO", |
| "rising": [ |
| 1981, |
| 2057, |
| 2134 |
| ], |
| "to_pin": "PAD", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 2131, |
| 2509, |
| 2888 |
| ], |
| "from_pin": "PADDT", |
| "rising": [ |
| 2131, |
| 2509, |
| 2888 |
| ], |
| "to_pin": "PAD", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 452, |
| 463, |
| 475 |
| ], |
| "from_pin": "PAD", |
| "rising": [ |
| 452, |
| 463, |
| 475 |
| ], |
| "to_pin": "PADDI", |
| "type": "IOPath" |
| } |
| ], |
| "PIO:IOTYPE=SSTL18_II": [ |
| { |
| "clock": [ |
| "negedge", |
| "PAD" |
| ], |
| "type": "Width", |
| "width": [ |
| 1250, |
| 1250, |
| 1250 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "PAD" |
| ], |
| "type": "Width", |
| "width": [ |
| 1250, |
| 1250, |
| 1250 |
| ] |
| }, |
| { |
| "falling": [ |
| 1681, |
| 2558, |
| 3435 |
| ], |
| "from_pin": "PADDT", |
| "rising": [ |
| 1681, |
| 2558, |
| 3435 |
| ], |
| "to_pin": "PAD", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 1746, |
| 1788, |
| 1830 |
| ], |
| "from_pin": "PADDO", |
| "rising": [ |
| 1746, |
| 1788, |
| 1830 |
| ], |
| "to_pin": "PAD", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 452, |
| 463, |
| 475 |
| ], |
| "from_pin": "PAD", |
| "rising": [ |
| 452, |
| 463, |
| 475 |
| ], |
| "to_pin": "PADDI", |
| "type": "IOPath" |
| } |
| ], |
| "SCCU2C": [ |
| { |
| "clock": [ |
| "negedge", |
| "CLK" |
| ], |
| "type": "Width", |
| "width": [ |
| 1050, |
| 1050, |
| 1050 |
| ] |
| }, |
| { |
| "clock": [ |
| "negedge", |
| "LSR" |
| ], |
| "type": "Width", |
| "width": [ |
| 525, |
| 525, |
| 525 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "LSR", |
| "setup": [ |
| 271, |
| 347, |
| 424 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "LSR", |
| "setup": [ |
| 272, |
| 348, |
| 424 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "hold": [ |
| 144, |
| 147, |
| 151 |
| ], |
| "pin": "CE", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "hold": [ |
| 144, |
| 148, |
| 152 |
| ], |
| "pin": "CE", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "hold": [ |
| 266, |
| 284, |
| 303 |
| ], |
| "pin": "DI1", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "hold": [ |
| 267, |
| 285, |
| 303 |
| ], |
| "pin": "DI0", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "type": "Width", |
| "width": [ |
| 1050, |
| 1050, |
| 1050 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "LSR" |
| ], |
| "type": "Width", |
| "width": [ |
| 525, |
| 525, |
| 525 |
| ] |
| }, |
| { |
| "falling": [ |
| 175, |
| 311, |
| 447 |
| ], |
| "from_pin": "A0", |
| "rising": [ |
| 175, |
| 311, |
| 447 |
| ], |
| "to_pin": "FCO", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 175, |
| 311, |
| 447 |
| ], |
| "from_pin": "A1", |
| "rising": [ |
| 175, |
| 311, |
| 447 |
| ], |
| "to_pin": "FCO", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 175, |
| 311, |
| 447 |
| ], |
| "from_pin": "B0", |
| "rising": [ |
| 175, |
| 311, |
| 447 |
| ], |
| "to_pin": "FCO", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 175, |
| 311, |
| 447 |
| ], |
| "from_pin": "B1", |
| "rising": [ |
| 175, |
| 311, |
| 447 |
| ], |
| "to_pin": "FCO", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 175, |
| 311, |
| 447 |
| ], |
| "from_pin": "C0", |
| "rising": [ |
| 175, |
| 311, |
| 447 |
| ], |
| "to_pin": "FCO", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 175, |
| 311, |
| 447 |
| ], |
| "from_pin": "C1", |
| "rising": [ |
| 175, |
| 311, |
| 447 |
| ], |
| "to_pin": "FCO", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 175, |
| 311, |
| 447 |
| ], |
| "from_pin": "D0", |
| "rising": [ |
| 175, |
| 311, |
| 447 |
| ], |
| "to_pin": "FCO", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 175, |
| 311, |
| 447 |
| ], |
| "from_pin": "D1", |
| "rising": [ |
| 175, |
| 311, |
| 447 |
| ], |
| "to_pin": "FCO", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 200, |
| 218, |
| 236 |
| ], |
| "from_pin": "A0", |
| "rising": [ |
| 200, |
| 218, |
| 236 |
| ], |
| "to_pin": "F0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 200, |
| 218, |
| 236 |
| ], |
| "from_pin": "A1", |
| "rising": [ |
| 200, |
| 218, |
| 236 |
| ], |
| "to_pin": "F1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 200, |
| 218, |
| 236 |
| ], |
| "from_pin": "B0", |
| "rising": [ |
| 200, |
| 218, |
| 236 |
| ], |
| "to_pin": "F0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 200, |
| 218, |
| 236 |
| ], |
| "from_pin": "B1", |
| "rising": [ |
| 200, |
| 218, |
| 236 |
| ], |
| "to_pin": "F1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 200, |
| 218, |
| 236 |
| ], |
| "from_pin": "C0", |
| "rising": [ |
| 200, |
| 218, |
| 236 |
| ], |
| "to_pin": "F0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 200, |
| 218, |
| 236 |
| ], |
| "from_pin": "C1", |
| "rising": [ |
| 200, |
| 218, |
| 236 |
| ], |
| "to_pin": "F1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 200, |
| 218, |
| 236 |
| ], |
| "from_pin": "D0", |
| "rising": [ |
| 200, |
| 218, |
| 236 |
| ], |
| "to_pin": "F0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 200, |
| 218, |
| 236 |
| ], |
| "from_pin": "D1", |
| "rising": [ |
| 200, |
| 218, |
| 236 |
| ], |
| "to_pin": "F1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 244, |
| 343, |
| 443 |
| ], |
| "from_pin": "FCI", |
| "rising": [ |
| 244, |
| 343, |
| 443 |
| ], |
| "to_pin": "F0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 357, |
| 415, |
| 474 |
| ], |
| "from_pin": "FCI", |
| "rising": [ |
| 357, |
| 415, |
| 474 |
| ], |
| "to_pin": "F1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 429, |
| 475, |
| 522 |
| ], |
| "from_pin": "CLK", |
| "rising": [ |
| 429, |
| 475, |
| 522 |
| ], |
| "to_pin": "Q1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 430, |
| 477, |
| 525 |
| ], |
| "from_pin": "CLK", |
| "rising": [ |
| 430, |
| 477, |
| 525 |
| ], |
| "to_pin": "Q0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 591, |
| 652, |
| 714 |
| ], |
| "from_pin": "A0", |
| "rising": [ |
| 591, |
| 652, |
| 714 |
| ], |
| "to_pin": "F1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 591, |
| 652, |
| 714 |
| ], |
| "from_pin": "B0", |
| "rising": [ |
| 591, |
| 652, |
| 714 |
| ], |
| "to_pin": "F1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 591, |
| 652, |
| 714 |
| ], |
| "from_pin": "C0", |
| "rising": [ |
| 591, |
| 652, |
| 714 |
| ], |
| "to_pin": "F1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 591, |
| 652, |
| 714 |
| ], |
| "from_pin": "D0", |
| "rising": [ |
| 591, |
| 652, |
| 714 |
| ], |
| "to_pin": "F1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 62, |
| 66, |
| 71 |
| ], |
| "from_pin": "FCI", |
| "rising": [ |
| 62, |
| 66, |
| 71 |
| ], |
| "to_pin": "FCO", |
| "type": "IOPath" |
| } |
| ], |
| "SDPRAME": [ |
| { |
| "clock": [ |
| "negedge", |
| "CLK" |
| ], |
| "type": "Width", |
| "width": [ |
| 1050, |
| 1050, |
| 1050 |
| ] |
| }, |
| { |
| "clock": [ |
| "negedge", |
| "WCK" |
| ], |
| "type": "Width", |
| "width": [ |
| 525, |
| 525, |
| 525 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "hold": [ |
| 266, |
| 284, |
| 303 |
| ], |
| "pin": "DI1", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "hold": [ |
| 267, |
| 285, |
| 303 |
| ], |
| "pin": "DI0", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "type": "Width", |
| "width": [ |
| 1050, |
| 1050, |
| 1050 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "WCK" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "WRE", |
| "setup": [ |
| 254, |
| 323, |
| 392 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "WCK" |
| ], |
| "hold": [ |
| 202, |
| 249, |
| 297 |
| ], |
| "pin": "WD0", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "WCK" |
| ], |
| "hold": [ |
| 205, |
| 250, |
| 296 |
| ], |
| "pin": "WD1", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "WCK" |
| ], |
| "hold": [ |
| 256, |
| 303, |
| 350 |
| ], |
| "pin": "WAD2", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "WCK" |
| ], |
| "hold": [ |
| 268, |
| 312, |
| 356 |
| ], |
| "pin": "WAD0", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "WCK" |
| ], |
| "hold": [ |
| 273, |
| 316, |
| 360 |
| ], |
| "pin": "WAD3", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "WCK" |
| ], |
| "hold": [ |
| 278, |
| 320, |
| 362 |
| ], |
| "pin": "WAD1", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "WCK" |
| ], |
| "type": "Width", |
| "width": [ |
| 525, |
| 525, |
| 525 |
| ] |
| }, |
| { |
| "falling": [ |
| 200, |
| 218, |
| 236 |
| ], |
| "from_pin": "RAD0", |
| "rising": [ |
| 200, |
| 218, |
| 236 |
| ], |
| "to_pin": "F0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 200, |
| 218, |
| 236 |
| ], |
| "from_pin": "RAD0", |
| "rising": [ |
| 200, |
| 218, |
| 236 |
| ], |
| "to_pin": "F1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 200, |
| 218, |
| 236 |
| ], |
| "from_pin": "RAD1", |
| "rising": [ |
| 200, |
| 218, |
| 236 |
| ], |
| "to_pin": "F0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 200, |
| 218, |
| 236 |
| ], |
| "from_pin": "RAD1", |
| "rising": [ |
| 200, |
| 218, |
| 236 |
| ], |
| "to_pin": "F1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 200, |
| 218, |
| 236 |
| ], |
| "from_pin": "RAD2", |
| "rising": [ |
| 200, |
| 218, |
| 236 |
| ], |
| "to_pin": "F0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 200, |
| 218, |
| 236 |
| ], |
| "from_pin": "RAD2", |
| "rising": [ |
| 200, |
| 218, |
| 236 |
| ], |
| "to_pin": "F1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 200, |
| 218, |
| 236 |
| ], |
| "from_pin": "RAD3", |
| "rising": [ |
| 200, |
| 218, |
| 236 |
| ], |
| "to_pin": "F0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 200, |
| 218, |
| 236 |
| ], |
| "from_pin": "RAD3", |
| "rising": [ |
| 200, |
| 218, |
| 236 |
| ], |
| "to_pin": "F1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 429, |
| 475, |
| 522 |
| ], |
| "from_pin": "CLK", |
| "rising": [ |
| 429, |
| 475, |
| 522 |
| ], |
| "to_pin": "Q1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 430, |
| 477, |
| 525 |
| ], |
| "from_pin": "CLK", |
| "rising": [ |
| 430, |
| 477, |
| 525 |
| ], |
| "to_pin": "Q0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 908, |
| 917, |
| 926 |
| ], |
| "from_pin": "WCK", |
| "rising": [ |
| 908, |
| 917, |
| 926 |
| ], |
| "to_pin": "F0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 910, |
| 919, |
| 929 |
| ], |
| "from_pin": "WCK", |
| "rising": [ |
| 910, |
| 919, |
| 929 |
| ], |
| "to_pin": "F1", |
| "type": "IOPath" |
| } |
| ], |
| "SLOGICB": [ |
| { |
| "clock": [ |
| "negedge", |
| "CLK" |
| ], |
| "type": "Width", |
| "width": [ |
| 1050, |
| 1050, |
| 1050 |
| ] |
| }, |
| { |
| "clock": [ |
| "negedge", |
| "LSR" |
| ], |
| "type": "Width", |
| "width": [ |
| 525, |
| 525, |
| 525 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "LSR", |
| "setup": [ |
| 271, |
| 347, |
| 424 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "hold": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "pin": "LSR", |
| "setup": [ |
| 272, |
| 348, |
| 424 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "hold": [ |
| 144, |
| 147, |
| 151 |
| ], |
| "pin": "CE", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "hold": [ |
| 144, |
| 148, |
| 152 |
| ], |
| "pin": "CE", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "hold": [ |
| 233, |
| 268, |
| 303 |
| ], |
| "pin": "M0", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "hold": [ |
| 234, |
| 270, |
| 306 |
| ], |
| "pin": "M1", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "hold": [ |
| 266, |
| 284, |
| 303 |
| ], |
| "pin": "DI1", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "hold": [ |
| 267, |
| 285, |
| 303 |
| ], |
| "pin": "DI0", |
| "setup": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "type": "SetupHold" |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "CLK" |
| ], |
| "type": "Width", |
| "width": [ |
| 1050, |
| 1050, |
| 1050 |
| ] |
| }, |
| { |
| "clock": [ |
| "posedge", |
| "LSR" |
| ], |
| "type": "Width", |
| "width": [ |
| 525, |
| 525, |
| 525 |
| ] |
| }, |
| { |
| "falling": [ |
| 186, |
| 219, |
| 252 |
| ], |
| "from_pin": "M1", |
| "rising": [ |
| 186, |
| 219, |
| 252 |
| ], |
| "to_pin": "OFX1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 187, |
| 221, |
| 256 |
| ], |
| "from_pin": "M0", |
| "rising": [ |
| 187, |
| 221, |
| 256 |
| ], |
| "to_pin": "OFX0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 189, |
| 214, |
| 239 |
| ], |
| "from_pin": "FXA", |
| "rising": [ |
| 189, |
| 214, |
| 239 |
| ], |
| "to_pin": "OFX1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 189, |
| 215, |
| 242 |
| ], |
| "from_pin": "FXB", |
| "rising": [ |
| 189, |
| 215, |
| 242 |
| ], |
| "to_pin": "OFX1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 200, |
| 218, |
| 236 |
| ], |
| "from_pin": "A0", |
| "rising": [ |
| 200, |
| 218, |
| 236 |
| ], |
| "to_pin": "F0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 200, |
| 218, |
| 236 |
| ], |
| "from_pin": "A1", |
| "rising": [ |
| 200, |
| 218, |
| 236 |
| ], |
| "to_pin": "F1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 200, |
| 218, |
| 236 |
| ], |
| "from_pin": "B0", |
| "rising": [ |
| 200, |
| 218, |
| 236 |
| ], |
| "to_pin": "F0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 200, |
| 218, |
| 236 |
| ], |
| "from_pin": "B1", |
| "rising": [ |
| 200, |
| 218, |
| 236 |
| ], |
| "to_pin": "F1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 200, |
| 218, |
| 236 |
| ], |
| "from_pin": "C0", |
| "rising": [ |
| 200, |
| 218, |
| 236 |
| ], |
| "to_pin": "F0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 200, |
| 218, |
| 236 |
| ], |
| "from_pin": "C1", |
| "rising": [ |
| 200, |
| 218, |
| 236 |
| ], |
| "to_pin": "F1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 200, |
| 218, |
| 236 |
| ], |
| "from_pin": "D0", |
| "rising": [ |
| 200, |
| 218, |
| 236 |
| ], |
| "to_pin": "F0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 200, |
| 218, |
| 236 |
| ], |
| "from_pin": "D1", |
| "rising": [ |
| 200, |
| 218, |
| 236 |
| ], |
| "to_pin": "F1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 268, |
| 334, |
| 401 |
| ], |
| "from_pin": "A0", |
| "rising": [ |
| 268, |
| 334, |
| 401 |
| ], |
| "to_pin": "OFX0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 268, |
| 334, |
| 401 |
| ], |
| "from_pin": "A1", |
| "rising": [ |
| 268, |
| 334, |
| 401 |
| ], |
| "to_pin": "OFX0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 268, |
| 334, |
| 401 |
| ], |
| "from_pin": "B0", |
| "rising": [ |
| 268, |
| 334, |
| 401 |
| ], |
| "to_pin": "OFX0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 268, |
| 334, |
| 401 |
| ], |
| "from_pin": "B1", |
| "rising": [ |
| 268, |
| 334, |
| 401 |
| ], |
| "to_pin": "OFX0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 268, |
| 334, |
| 401 |
| ], |
| "from_pin": "C0", |
| "rising": [ |
| 268, |
| 334, |
| 401 |
| ], |
| "to_pin": "OFX0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 268, |
| 334, |
| 401 |
| ], |
| "from_pin": "C1", |
| "rising": [ |
| 268, |
| 334, |
| 401 |
| ], |
| "to_pin": "OFX0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 268, |
| 334, |
| 401 |
| ], |
| "from_pin": "D0", |
| "rising": [ |
| 268, |
| 334, |
| 401 |
| ], |
| "to_pin": "OFX0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 268, |
| 334, |
| 401 |
| ], |
| "from_pin": "D1", |
| "rising": [ |
| 268, |
| 334, |
| 401 |
| ], |
| "to_pin": "OFX0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 429, |
| 475, |
| 522 |
| ], |
| "from_pin": "CLK", |
| "rising": [ |
| 429, |
| 475, |
| 522 |
| ], |
| "to_pin": "Q1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 430, |
| 477, |
| 525 |
| ], |
| "from_pin": "CLK", |
| "rising": [ |
| 430, |
| 477, |
| 525 |
| ], |
| "to_pin": "Q0", |
| "type": "IOPath" |
| } |
| ], |
| "SRAMWB": [ |
| { |
| "falling": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "from_pin": "A0", |
| "rising": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "to_pin": "WADO3", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "from_pin": "A1", |
| "rising": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "to_pin": "WDO1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "from_pin": "B0", |
| "rising": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "to_pin": "WADO1", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "from_pin": "B1", |
| "rising": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "to_pin": "WDO3", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "from_pin": "C0", |
| "rising": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "to_pin": "WADO2", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "from_pin": "C1", |
| "rising": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "to_pin": "WDO0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "from_pin": "D0", |
| "rising": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "to_pin": "WADO0", |
| "type": "IOPath" |
| }, |
| { |
| "falling": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "from_pin": "D1", |
| "rising": [ |
| 0, |
| 0, |
| 0 |
| ], |
| "to_pin": "WDO2", |
| "type": "IOPath" |
| } |
| ] |
| } |