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foss-fpga-tools/prjtrellis/0e6a3204aa418a5ba3ad1030f9bb8cc359fc0158^!/.
commit
0e6a3204aa418a5ba3ad1030f9bb8cc359fc0158
[log]
author
gatecat <gatecat@ds0.me>
Thu Jun 10 10:19:20 2021 +0100
committer
gatecat <gatecat@ds0.me>
Thu Jun 10 10:19:33 2021 +0100
tree
93035296234fed3bd8147d716a5f54e46dad2397
parent
fe1c39c8b66b103d82ddb23ceb62e4a528058057 [diff]
Update copyrights

Signed-off-by: gatecat <gatecat@ds0.me>

diff --git a/examples/picorv32_tinyfpga/attosoc.v b/examples/picorv32_tinyfpga/attosoc.v
index 0b62a75..80b376f 100644
--- a/examples/picorv32_tinyfpga/attosoc.v
+++ b/examples/picorv32_tinyfpga/attosoc.v

@@ -1,8 +1,8 @@
 /*
  *  ECP5 PicoRV32 demo
  *
- *  Copyright (C) 2017  Clifford Wolf <clifford@clifford.at>
- *  Copyright (C) 2018  David Shah <dave@ds0.me>
+ *  Copyright (C) 2017  Claire Xenia Wolf <claire@yosyshq.com>
+ *  Copyright (C) 2018  gatecat <gatecat@ds0.me>
  *
  *  Permission to use, copy, modify, and/or distribute this software for any
  *  purpose with or without fee is hereby granted, provided that the above

diff --git a/examples/picorv32_tinyfpga/picorv32.v b/examples/picorv32_tinyfpga/picorv32.v
index af634b4..35a8c74 100644
--- a/examples/picorv32_tinyfpga/picorv32.v
+++ b/examples/picorv32_tinyfpga/picorv32.v

@@ -1,7 +1,7 @@
 /*
  *  PicoRV32 -- A Small RISC-V (RV32I) Processor Core
  *
- *  Copyright (C) 2015  Clifford Wolf <clifford@clifford.at>
+ *  Copyright (C) 2015  Claire Xenia Wolf <claire@yosyshq.com>
  *
  *  Permission to use, copy, modify, and/or distribute this software for any
  *  purpose with or without fee is hereby granted, provided that the above

diff --git a/examples/picorv32_ulx3s/attosoc.v b/examples/picorv32_ulx3s/attosoc.v
index 4921e29..39d5143 100644
--- a/examples/picorv32_ulx3s/attosoc.v
+++ b/examples/picorv32_ulx3s/attosoc.v

@@ -1,8 +1,8 @@
 /*
  *  ECP5 PicoRV32 demo
  *
- *  Copyright (C) 2017  Clifford Wolf <clifford@clifford.at>
- *  Copyright (C) 2018  David Shah <dave@ds0.me>
+ *  Copyright (C) 2017  Claire Xenia Wolf <claire@yosyshq.com>
+ *  Copyright (C) 2018  gatecat <gatecat@ds0.me>
  *
  *  Permission to use, copy, modify, and/or distribute this software for any
  *  purpose with or without fee is hereby granted, provided that the above

diff --git a/examples/picorv32_ulx3s/picorv32.v b/examples/picorv32_ulx3s/picorv32.v
index af634b4..35a8c74 100644
--- a/examples/picorv32_ulx3s/picorv32.v
+++ b/examples/picorv32_ulx3s/picorv32.v

@@ -1,7 +1,7 @@
 /*
  *  PicoRV32 -- A Small RISC-V (RV32I) Processor Core
  *
- *  Copyright (C) 2015  Clifford Wolf <clifford@clifford.at>
+ *  Copyright (C) 2015  Claire Xenia Wolf <claire@yosyshq.com>
  *
  *  Permission to use, copy, modify, and/or distribute this software for any
  *  purpose with or without fee is hereby granted, provided that the above

diff --git a/examples/picorv32_versa5g/attosoc.v b/examples/picorv32_versa5g/attosoc.v
index 4921e29..39d5143 100644
--- a/examples/picorv32_versa5g/attosoc.v
+++ b/examples/picorv32_versa5g/attosoc.v

@@ -1,8 +1,8 @@
 /*
  *  ECP5 PicoRV32 demo
  *
- *  Copyright (C) 2017  Clifford Wolf <clifford@clifford.at>
- *  Copyright (C) 2018  David Shah <dave@ds0.me>
+ *  Copyright (C) 2017  Claire Xenia Wolf <claire@yosyshq.com>
+ *  Copyright (C) 2018  gatecat <gatecat@ds0.me>
  *
  *  Permission to use, copy, modify, and/or distribute this software for any
  *  purpose with or without fee is hereby granted, provided that the above

diff --git a/examples/picorv32_versa5g/picorv32.v b/examples/picorv32_versa5g/picorv32.v
index af634b4..35a8c74 100644
--- a/examples/picorv32_versa5g/picorv32.v
+++ b/examples/picorv32_versa5g/picorv32.v

@@ -1,7 +1,7 @@
 /*
  *  PicoRV32 -- A Small RISC-V (RV32I) Processor Core
  *
- *  Copyright (C) 2015  Clifford Wolf <clifford@clifford.at>
+ *  Copyright (C) 2015  Claire Xenia Wolf <claire@yosyshq.com>
  *
  *  Permission to use, copy, modify, and/or distribute this software for any
  *  purpose with or without fee is hereby granted, provided that the above

diff --git a/examples/soc_ecp5_evn/attosoc.v b/examples/soc_ecp5_evn/attosoc.v
index 5761328..8fa54ae 100644
--- a/examples/soc_ecp5_evn/attosoc.v
+++ b/examples/soc_ecp5_evn/attosoc.v

@@ -1,8 +1,8 @@
 /*
  *  ECP5 PicoRV32 demo
  *
- *  Copyright (C) 2017  Clifford Wolf <clifford@clifford.at>
- *  Copyright (C) 2018  David Shah <dave@ds0.me>
+ *  Copyright (C) 2017  Claire Xenia Wolf <claire@yosyshq.com>
+ *  Copyright (C) 2018  gatecat <gatecat@ds0.me>
  *
  *  Permission to use, copy, modify, and/or distribute this software for any
  *  purpose with or without fee is hereby granted, provided that the above

diff --git a/examples/soc_ecp5_evn/picorv32.v b/examples/soc_ecp5_evn/picorv32.v
index af634b4..35a8c74 100644
--- a/examples/soc_ecp5_evn/picorv32.v
+++ b/examples/soc_ecp5_evn/picorv32.v

@@ -1,7 +1,7 @@
 /*
  *  PicoRV32 -- A Small RISC-V (RV32I) Processor Core
  *
- *  Copyright (C) 2015  Clifford Wolf <clifford@clifford.at>
+ *  Copyright (C) 2015  Claire Xenia Wolf <claire@yosyshq.com>
  *
  *  Permission to use, copy, modify, and/or distribute this software for any
  *  purpose with or without fee is hereby granted, provided that the above

diff --git a/examples/soc_ecp5_evn/simpleuart.v b/examples/soc_ecp5_evn/simpleuart.v
index 50808cb..eaff021 100644
--- a/examples/soc_ecp5_evn/simpleuart.v
+++ b/examples/soc_ecp5_evn/simpleuart.v

@@ -1,7 +1,7 @@
 /*
  *  PicoSoC - A simple example SoC using PicoRV32
  *
- *  Copyright (C) 2017  Clifford Wolf <clifford@clifford.at>
+ *  Copyright (C) 2017  Claire Xenia Wolf <claire@yosyshq.com>
  *
  *  Permission to use, copy, modify, and/or distribute this software for any
  *  purpose with or without fee is hereby granted, provided that the above

diff --git a/examples/soc_versa5g/attosoc.v b/examples/soc_versa5g/attosoc.v
index 0cc153d..48280b1 100644
--- a/examples/soc_versa5g/attosoc.v
+++ b/examples/soc_versa5g/attosoc.v

@@ -1,8 +1,8 @@
 /*
  *  ECP5 PicoRV32 demo
  *
- *  Copyright (C) 2017  Clifford Wolf <clifford@clifford.at>
- *  Copyright (C) 2018  David Shah <dave@ds0.me>
+ *  Copyright (C) 2017  Claire Xenia Wolf <claire@yosyshq.com>
+ *  Copyright (C) 2018  gatecat <gatecat@ds0.me>
  *
  *  Permission to use, copy, modify, and/or distribute this software for any
  *  purpose with or without fee is hereby granted, provided that the above

diff --git a/examples/soc_versa5g/picorv32.v b/examples/soc_versa5g/picorv32.v
index af634b4..35a8c74 100644
--- a/examples/soc_versa5g/picorv32.v
+++ b/examples/soc_versa5g/picorv32.v

@@ -1,7 +1,7 @@
 /*
  *  PicoRV32 -- A Small RISC-V (RV32I) Processor Core
  *
- *  Copyright (C) 2015  Clifford Wolf <clifford@clifford.at>
+ *  Copyright (C) 2015  Claire Xenia Wolf <claire@yosyshq.com>
  *
  *  Permission to use, copy, modify, and/or distribute this software for any
  *  purpose with or without fee is hereby granted, provided that the above

diff --git a/examples/soc_versa5g/simpleuart.v b/examples/soc_versa5g/simpleuart.v
index 50808cb..eaff021 100644
--- a/examples/soc_versa5g/simpleuart.v
+++ b/examples/soc_versa5g/simpleuart.v

@@ -1,7 +1,7 @@
 /*
  *  PicoSoC - A simple example SoC using PicoRV32
  *
- *  Copyright (C) 2017  Clifford Wolf <clifford@clifford.at>
+ *  Copyright (C) 2017  Claire Xenia Wolf <claire@yosyshq.com>
  *
  *  Permission to use, copy, modify, and/or distribute this software for any
  *  purpose with or without fee is hereby granted, provided that the above

diff --git a/libtrellis/include/DatabasePath.hpp b/libtrellis/include/DatabasePath.hpp
index 288f670..8134323 100644
--- a/libtrellis/include/DatabasePath.hpp
+++ b/libtrellis/include/DatabasePath.hpp

@@ -32,7 +32,7 @@
 /*
  *  yosys -- Yosys Open SYnthesis Suite
  *
- *  Copyright (C) 2012  Clifford Wolf <clifford@clifford.at>
+ *  Copyright (C) 2012  Claire Xenia Wolf <claire@yosyshq.com>
  *
  *  Permission to use, copy, modify, and/or distribute this software for any
  *  purpose with or without fee is hereby granted, provided that the above

diff --git a/libtrellis/tools/ecpbram.cpp b/libtrellis/tools/ecpbram.cpp
index 189c7fd..0873d33 100644
--- a/libtrellis/tools/ecpbram.cpp
+++ b/libtrellis/tools/ecpbram.cpp

@@ -1,5 +1,5 @@
 //
-//  Copyright (C) 2016  Clifford Wolf <clifford@clifford.at>
+//  Copyright (C) 2016  Claire Xenia Wolf <claire@yosyshq.com>
 //  Copyright (C) 2019  Sylvain Munaut <tnt@246tNt.com>
 //
 //  Permission to use, copy, modify, and/or distribute this software for any
@@ -166,7 +166,7 @@
         cerr << argv[0] << ": ECP5 BRAM content initialization tool" << endl;
         cerr << endl;
         cerr << "Copyright (C) 2019  Sylvain Munaut <tnt@246tNt.com>" << endl;
-        cerr << "Copyright (C) 2016  Clifford Wolf <clifford@clifford.at>" << endl;
+        cerr << "Copyright (C) 2016  Claire Xenia Wolf <claire@yosyshq.com>" << endl;
         cerr << endl;
         cerr << options << endl;
         return vm.count("help") ? 0 : 1;

diff --git a/libtrellis/tools/ecppack.cpp b/libtrellis/tools/ecppack.cpp
index f6bf902..ab560e0 100644
--- a/libtrellis/tools/ecppack.cpp
+++ b/libtrellis/tools/ecppack.cpp

@@ -85,7 +85,7 @@
         cerr << "Version " << git_describe_str << endl;
         cerr << argv[0] << ": ECP5 bitstream packer" << endl;
         cerr << endl;
-        cerr << "Copyright (C) 2018 David Shah <david@symbioticeda.com>" << endl;
+        cerr << "Copyright (C) 2018 gatecat <gatecat@ds0.me>" << endl;
         cerr << endl;
         cerr << "Usage: " << argv[0] << " input.config [output.bit] [options]" << endl;
         cerr << options << endl;

diff --git a/libtrellis/tools/ecppll.cpp b/libtrellis/tools/ecppll.cpp
index 3e3ad15..91a1aea 100644
--- a/libtrellis/tools/ecppll.cpp
+++ b/libtrellis/tools/ecppll.cpp

@@ -130,7 +130,7 @@
     cerr << endl;
     cerr << "This tool is experimental! Use at your own risk!" << endl;
     cerr << endl;
-    cerr << "Copyright (C) 2018-2019 David Shah <david@symbioticeda.com>" << endl;
+    cerr << "Copyright (C) 2018-2019 gatecat <gatecat@ds0.me>" << endl;
     cerr << endl;
     cerr << options << endl;
     return vm.count("help") ? 0 : 1;

diff --git a/libtrellis/tools/ecpunpack.cpp b/libtrellis/tools/ecpunpack.cpp
index 1029356..5c9365b 100644
--- a/libtrellis/tools/ecpunpack.cpp
+++ b/libtrellis/tools/ecpunpack.cpp

@@ -54,7 +54,7 @@
         cerr << "Version " << git_describe_str << endl;
         cerr << argv[0] << ": ECP5 bitstream to text config converter" << endl;
         cerr << endl;
-        cerr << "Copyright (C) 2018 David Shah <david@symbioticeda.com>" << endl;
+        cerr << "Copyright (C) 2018 gatecat <gatecat@ds0.me>" << endl;
         cerr << endl;
         cerr << "Usage: " << argv[0] << " input.bit [output.config] [options]" << endl;
         cerr << options << endl;

diff --git a/timing/resource/picorv32_large.v b/timing/resource/picorv32_large.v
index 7a5659f..5ad56e1 100644
--- a/timing/resource/picorv32_large.v
+++ b/timing/resource/picorv32_large.v

@@ -52,7 +52,7 @@
 /*
  *  PicoRV32 -- A Small RISC-V (RV32I) Processor Core
  *
- *  Copyright (C) 2015  Clifford Wolf <clifford@clifford.at>
+ *  Copyright (C) 2015  Claire Xenia Wolf <claire@yosyshq.com>
  *
  *  Permission to use, copy, modify, and/or distribute this software for any
  *  purpose with or without fee is hereby granted, provided that the above

diff --git a/timing/resource/picorv32_x20.v b/timing/resource/picorv32_x20.v
index bb76434..20c4283 100644
--- a/timing/resource/picorv32_x20.v
+++ b/timing/resource/picorv32_x20.v

@@ -64,7 +64,7 @@
 /*
  *  PicoRV32 -- A Small RISC-V (RV32I) Processor Core
  *
- *  Copyright (C) 2015  Clifford Wolf <clifford@clifford.at>
+ *  Copyright (C) 2015  Claire Xenia Wolf <claire@yosyshq.com>
  *
  *  Permission to use, copy, modify, and/or distribute this software for any
  *  purpose with or without fee is hereby granted, provided that the above