fuzzers: Fuzz LSRMODE/PRLD

Signed-off-by: David Shah <dave@ds0.me>

database

diff --git a/database b/database
index 7cc6ef1..d960350 160000
--- a/database
+++ b/database
@@ -1 +1 @@
-Subproject commit 7cc6ef16877c880ded8c65c0fcfd07dff02f49c5
+Subproject commit d9603500f4a4df5b643c790d0e44bf7c67b755d0

fuzzers/ECP5/005-reg_config/fuzzer.py

diff --git a/fuzzers/ECP5/005-reg_config/fuzzer.py b/fuzzers/ECP5/005-reg_config/fuzzer.py
index fb16ab4..4bf3f1c 100644
--- a/fuzzers/ECP5/005-reg_config/fuzzer.py
+++ b/fuzzers/ECP5/005-reg_config/fuzzer.py
@@ -17,8 +17,8 @@
     def per_slice(slicen):
         r = 0
 
-        def get_substs(regset="RESET", sd="0", gsr="DISABLED"):
-            return dict(slice=slicen, r=str(r), regset=regset, sd=sd, gsr=gsr)
+        def get_substs(regset="RESET", sd="0", lsrmode="LSR", gsr="DISABLED"):
+            return dict(slice=slicen, r=str(r), regset=regset, sd=sd, lsrmode=lsrmode, gsr=gsr)
 
         for r in range(2):
             nonrouting.fuzz_enum_setting(cfg, "SLICE{}.REG{}.REGSET".format(slicen, r), ["RESET", "SET"],
@@ -27,6 +27,9 @@
             nonrouting.fuzz_enum_setting(cfg, "SLICE{}.REG{}.SD".format(slicen, r), ["0", "1"],
                                          lambda x: get_substs(sd=x),
                                          empty_bitfile)
+            nonrouting.fuzz_enum_setting(cfg, "SLICE{}.REG{}.LSRMODE".format(slicen, r), ["LSR", "PRLD"],
+                                         lambda x: get_substs(lsrmode=x),
+                                         empty_bitfile)
         nonrouting.fuzz_enum_setting(cfg, "SLICE{}.GSR".format(slicen), ["DISABLED", "ENABLED"],
                                      lambda x: get_substs(gsr=x),
                                      empty_bitfile)

fuzzers/ECP5/005-reg_config/reg.ncl

diff --git a/fuzzers/ECP5/005-reg_config/reg.ncl b/fuzzers/ECP5/005-reg_config/reg.ncl
index 03032dc..fa9160f 100644
--- a/fuzzers/ECP5/005-reg_config/reg.ncl
+++ b/fuzzers/ECP5/005-reg_config/reg.ncl
@@ -15,7 +15,7 @@
       {
          cellmodel-name SLICE;
          program "MODE:LOGIC "
-                 "REG${r}:::REGSET=${regset}:SD=${sd} "
+                 "REG${r}:::REGSET=${regset},LSRMODE=${lsrmode}:SD=${sd} "
                  "Q${r}:Q "
                  "GSR:${gsr} "
                  "CLKMUX:CLK "