Sign in
foss-fpga-tools
/
prjtrellis
/
5fe0fff797ba762f6955a25f366d70833560a6e9
/
.
/
minitests
/
config
/
usermclk.v
blob: ff968c36edd8fb14a6baf103132b2fce017ba901 [
file
] [
log
] [
blame
]
module
top
(
input I
,
TS
);
USRMCLK mclk_i
(.
USRMCLKI
(
I
),
.
USRMCLKTS
(
TS
))
/* synthesis syn_noprune=1 */
;
endmodule