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foss-fpga-tools
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prjtrellis
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HEAD
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.
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minitests
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ECP5
/
iologic
/
ireg2.v
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module
top
(
input clk
,
input d
,
s
,
output q
);
IFS1P3JX ireg_i
(.
D
(
d
),
.
SCLK
(
clk
),
.
SP
(
1
'b1), .PD(s),
.Q(q));
endmodule
