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foss-fpga-tools
/
prjtrellis
/
aa0565584b801c477a72e4dcab35b0d99add6053
/
.
/
minitests
/
dsp
/
mult.v
blob: 32210d73bb53f68faa1eb13a2d838453c017591d [
file
]
module
top
(
input
[
17
:
0
]
a
,
input
[
17
:
0
]
b
,
input
[
35
:
0
]
c
,
output
[
35
:
0
]
q
);
(*
syn_multstyle
=
"block_mult"
*)
wire
[
35
:
0
]
product
=
a
*
b
;
assign q
=
product
+
c
;
endmodule