blob: 9e28645384ee58a7dbf4c87e3013a8116b14b815 [file] [log] [blame]
::FROM-WRITER;
design top
{
device
{
architecture sa5p00;
device LFE5U-25F;
package CABGA381;
performance "8";
}
comp PLL
{
logical {
cellmodel-name PLL;
program "MODE:EHXPLLL ";
}
site PLL_BL0;
}
signal q_c
{
signal-pins
// drivers
(PLL, LOCK),
// loads
(PLL, RST);
${route}
}
}