blob: e0458a24349d8cd996c34ed2d619eb1280acb756 [file] [log] [blame]
::FROM-WRITER;
design top
{
device
{
architecture sa5p00;
device LFE5U-85F;
package CABGA381;
performance "8";
}
comp PLL
{
logical {
cellmodel-name PLL;
program "MODE:EHXPLLL ";
}
site PLL_BL0;
}
signal q_c
{
signal-pins
// drivers
(PLL, LOCK),
// loads
(PLL, RST);
${route}
}
}