blob: e12d4e751b9fee00799a11ed9359e0c4900f3e8e [file] [log] [blame]
::FROM-WRITER;
design top
{
device
{
architecture sa5p00g;
device LFE5UM5G-45F;
package CABGA381;
performance "8";
}
comp SLICE_0
[,,,,A0,B0,D0,C0,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,]
{
logical
{
cellmodel-name SLICE;
program "MODE:LOGIC "
"K0::H0=0 "
"F0:F ";
primitive K0 i3_4_lut;
}
site R2C2A;
}
signal q_c
{
signal-pins
// drivers
(SLICE_0, F0),
// loads
(SLICE_0, A0);
${route}
}
}