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foss-fpga-tools
/
prjtrellis
/
dc4120e76750ed372feab637f299585908431c35
/
.
/
minitests
/
config
/
usermclk.v
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module
top
(
input I
,
TS
);
USRMCLK mclk_i
(.
USRMCLKI
(
I
),
.
USRMCLKTS
(
TS
))
/* synthesis syn_noprune=1 */
;
endmodule
