blob: c91257fc4060c90d7260316b8b408b52d331ff2f [file]
//See README and tcl for more info
`include "defines.v"
module top(input wire clkp, input wire clkn,
inout wire [DIN_N-1:0] din, output wire [DOUT_N-1:0] dout);
parameter DIN_N = `DIN_N;
parameter DOUT_N = `DOUT_N;
wire clk;
IBUFDS clk_input_buffer (
.O(clk),
.I(clkp),
.IB(clkn)
);
roi #(.DIN_N(DIN_N), .DOUT_N(DOUT_N)) roi (
.clk(clk),
.din(din), .dout(dout)
);
endmodule