|  | pin,bank,site,tile,pin_function | 
|  | A2,502,IOPAD_X1Y33,PSS2_X13Y53,PS_DDR_DQ1_502 | 
|  | A3,502,IOPAD_X1Y39,PSS2_X13Y53,PS_DDR_DQ7_502 | 
|  | A4,502,IOPAD_X1Y37,PSS2_X13Y53,PS_DDR_DQ5_502 | 
|  | A5,500,IOPAD_X1Y78,PSS2_X13Y53,PS_MIO1_500 | 
|  | A7,500,IOPAD_X1Y80,PSS2_X13Y53,PS_MIO3_500 | 
|  | A8,500,IOPAD_X1Y79,PSS2_X13Y53,PS_MIO2_500 | 
|  | A9,500,IOPAD_X1Y82,PSS2_X13Y53,PS_MIO5_500 | 
|  | A10,500,IOPAD_X1Y83,PSS2_X13Y53,PS_MIO6_500 | 
|  | A12,501,IOPAD_X1Y129,PSS2_X13Y53,PS_MIO52_501 | 
|  | A13,501,IOPAD_X1Y115,PSS2_X13Y53,PS_MIO38_501 | 
|  | A14,501,IOPAD_X1Y112,PSS2_X13Y53,PS_MIO35_501 | 
|  | A15,501,IOPAD_X1Y105,PSS2_X13Y53,PS_MIO28_501 | 
|  | B1,502,IOPAD_X1Y28,PSS2_X13Y53,PS_DDR_DM0_502 | 
|  | B2,502,IOPAD_X1Y64,PSS2_X13Y53,PS_DDR_DQS_N0_502 | 
|  | B4,502,IOPAD_X1Y36,PSS2_X13Y53,PS_DDR_DQ4_502 | 
|  | B5,500,IOPAD_X1Y86,PSS2_X13Y53,PS_MIO9_500 | 
|  | B6,500,IOPAD_X1Y85,PSS2_X13Y53,PS_MIO8_500 | 
|  | B7,500,IOPAD_X1Y89,PSS2_X13Y53,PS_MIO12_500 | 
|  | B9,500,IOPAD_X1Y91,PSS2_X13Y53,PS_MIO14_500 | 
|  | B10,500,IOPAD_X1Y88,PSS2_X13Y53,PS_MIO11_500 | 
|  | B11,501,IOPAD_X1Y134,PSS2_X13Y53,PS_SRST_B_501 | 
|  | B12,501,IOPAD_X1Y125,PSS2_X13Y53,PS_MIO48_501 | 
|  | B14,501,IOPAD_X1Y113,PSS2_X13Y53,PS_MIO36_501 | 
|  | B15,501,IOPAD_X1Y107,PSS2_X13Y53,PS_MIO30_501 | 
|  | C1,502,IOPAD_X1Y35,PSS2_X13Y53,PS_DDR_DQ3_502 | 
|  | C2,502,IOPAD_X1Y68,PSS2_X13Y53,PS_DDR_DQS_P0_502 | 
|  | C3,502,IOPAD_X1Y38,PSS2_X13Y53,PS_DDR_DQ6_502 | 
|  | C4,502,IOPAD_X1Y34,PSS2_X13Y53,PS_DDR_DQ2_502 | 
|  | C6,500,IOPAD_X1Y90,PSS2_X13Y53,PS_MIO13_500 | 
|  | C7,500,IOPAD_X1Y26,PSS2_X13Y53,PS_CLK_500 | 
|  | C8,500,IOPAD_X1Y81,PSS2_X13Y53,PS_MIO4_500 | 
|  | C9,500,IOPAD_X1Y132,PSS2_X13Y53,PS_POR_B_500 | 
|  | C11,501,IOPAD_X1Y110,PSS2_X13Y53,PS_MIO33_501 | 
|  | C12,501,IOPAD_X1Y108,PSS2_X13Y53,PS_MIO31_501 | 
|  | C13,501,IOPAD_X1Y130,PSS2_X13Y53,PS_MIO53_501 | 
|  | C14,501,IOPAD_X1Y114,PSS2_X13Y53,PS_MIO37_501 | 
|  | D1,502,IOPAD_X1Y41,PSS2_X13Y53,PS_DDR_DQ9_502 | 
|  | D3,502,IOPAD_X1Y29,PSS2_X13Y53,PS_DDR_DM1_502 | 
|  | D4,502,IOPAD_X1Y32,PSS2_X13Y53,PS_DDR_DQ0_502 | 
|  | D6,500,IOPAD_X1Y87,PSS2_X13Y53,PS_MIO10_500 | 
|  | D8,500,IOPAD_X1Y77,PSS2_X13Y53,PS_MIO0_500 | 
|  | D9,500,IOPAD_X1Y84,PSS2_X13Y53,PS_MIO7_500 | 
|  | D10,500,IOPAD_X1Y92,PSS2_X13Y53,PS_MIO15_500 | 
|  | D11,501,IOPAD_X1Y106,PSS2_X13Y53,PS_MIO29_501 | 
|  | D13,501,IOPAD_X1Y126,PSS2_X13Y53,PS_MIO49_501 | 
|  | D14,501,IOPAD_X1Y116,PSS2_X13Y53,PS_MIO39_501 | 
|  | D15,501,IOPAD_X1Y111,PSS2_X13Y53,PS_MIO34_501 | 
|  | E1,502,IOPAD_X1Y40,PSS2_X13Y53,PS_DDR_DQ8_502 | 
|  | E2,502,IOPAD_X1Y42,PSS2_X13Y53,PS_DDR_DQ10_502 | 
|  | E3,502,IOPAD_X1Y43,PSS2_X13Y53,PS_DDR_DQ11_502 | 
|  | E11,35,IOB_X0Y96,RIOB33_X31Y95,IO_L2P_T0_AD8P_35 | 
|  | E12,35,IOB_X0Y95,RIOB33_X31Y95,IO_L2N_T0_AD8N_35 | 
|  | E13,35,IOB_X0Y97,RIOB33_X31Y97,IO_L1N_T0_AD0N_35 | 
|  | E15,501,IOPAD_X1Y109,PSS2_X13Y53,PS_MIO32_501 | 
|  | F2,502,IOPAD_X1Y65,PSS2_X13Y53,PS_DDR_DQS_N1_502 | 
|  | F3,502,IOPAD_X1Y44,PSS2_X13Y53,PS_DDR_DQ12_502 | 
|  | F12,35,IOB_X0Y98,RIOB33_X31Y97,IO_L1P_T0_AD0P_35 | 
|  | F13,35,IOB_X0Y94,RIOB33_X31Y93,IO_L3P_T0_DQS_AD1P_35 | 
|  | F14,35,IOB_X0Y93,RIOB33_X31Y93,IO_L3N_T0_DQS_AD1N_35 | 
|  | F15,35,IOB_X0Y89,RIOB33_X31Y89,IO_L5N_T0_AD9N_35 | 
|  | G1,502,IOPAD_X1Y45,PSS2_X13Y53,PS_DDR_DQ13_502 | 
|  | G2,502,IOPAD_X1Y69,PSS2_X13Y53,PS_DDR_DQS_P1_502 | 
|  | G7,0,IPAD_X0Y0,MONITOR_BOT_PELE1_X67Y79,VP_0 | 
|  | G11,34,IOB_X0Y48,RIOB33_X31Y47,IO_L1P_T0_34 | 
|  | G12,34,IOB_X0Y46,RIOB33_X31Y45,IO_L2P_T0_34 | 
|  | G14,34,IOB_X0Y44,RIOB33_X31Y43,IO_L3P_T0_DQS_PUDC_B_34 | 
|  | G15,35,IOB_X0Y90,RIOB33_X31Y89,IO_L5P_T0_AD9P_35 | 
|  | H1,502,IOPAD_X1Y46,PSS2_X13Y53,PS_DDR_DQ14_502 | 
|  | H2,502,IOPAD_X1Y47,PSS2_X13Y53,PS_DDR_DQ15_502 | 
|  | H3,502,IOPAD_X1Y3,PSS2_X13Y53,PS_DDR_VRP_502 | 
|  | H8,0,IPAD_X0Y1,MONITOR_BOT_PELE1_X67Y79,VN_0 | 
|  | H11,34,IOB_X0Y38,RIOB33_X31Y37,IO_L6P_T0_34 | 
|  | H12,34,IOB_X0Y47,RIOB33_X31Y47,IO_L1N_T0_34 | 
|  | H13,34,IOB_X0Y45,RIOB33_X31Y45,IO_L2N_T0_34 | 
|  | H14,34,IOB_X0Y43,RIOB33_X31Y43,IO_L3N_T0_DQS_34 | 
|  | J1,502,IOPAD_X1Y14,PSS2_X13Y53,PS_DDR_A10_502 | 
|  | J3,502,IOPAD_X1Y2,PSS2_X13Y53,PS_DDR_VRN_502 | 
|  | J11,34,IOB_X0Y37,RIOB33_X31Y37,IO_L6N_T0_VREF_34 | 
|  | J13,34,IOB_X0Y40,RIOB33_X31Y39,IO_L5P_T0_34 | 
|  | J14,34,IOB_X0Y39,RIOB33_X31Y39,IO_L5N_T0_34 | 
|  | J15,34,IOB_X0Y42,RIOB33_X31Y41,IO_L4P_T0_34 | 
|  | K1,502,IOPAD_X1Y17,PSS2_X13Y53,PS_DDR_A14_502 | 
|  | K2,502,IOPAD_X1Y18,PSS2_X13Y53,PS_DDR_A13_502 | 
|  | K3,502,IOPAD_X1Y131,PSS2_X13Y53,PS_DDR_ODT_502 | 
|  | K11,34,IOB_X0Y28,RIOB33_X31Y27,IO_L11P_T1_SRCC_34 | 
|  | K12,34,IOB_X0Y27,RIOB33_X31Y27,IO_L11N_T1_SRCC_34 | 
|  | K13,34,IOB_X0Y30,RIOB33_X31Y29,IO_L10P_T1_34 | 
|  | K15,34,IOB_X0Y41,RIOB33_X31Y41,IO_L4N_T0_34 | 
|  | L2,502,IOPAD_X1Y15,PSS2_X13Y53,PS_DDR_A11_502 | 
|  | L3,502,IOPAD_X1Y23,PSS2_X13Y53,PS_DDR_CKE_502 | 
|  | L4,502,IOPAD_X1Y72,PSS2_X13Y53,PS_DDR_DRST_B_502 | 
|  | L12,34,IOB_X0Y26,RIOB33_X31Y25,IO_L12P_T1_MRCC_34 | 
|  | L13,34,IOB_X0Y29,RIOB33_X31Y29,IO_L10N_T1_34 | 
|  | L14,34,IOB_X0Y32,RIOB33_X31Y31,IO_L9P_T1_DQS_34 | 
|  | L15,34,IOB_X0Y34,RIOB33_X31Y33,IO_L8P_T1_34 | 
|  | M1,502,IOPAD_X1Y6,PSS2_X13Y53,PS_DDR_A2_502 | 
|  | M2,502,IOPAD_X1Y16,PSS2_X13Y53,PS_DDR_A12_502 | 
|  | M4,502,IOPAD_X1Y7,PSS2_X13Y53,PS_DDR_A3_502 | 
|  | M5,502,IOPAD_X1Y11,PSS2_X13Y53,PS_DDR_A7_502 | 
|  | M6,502,IOPAD_X1Y19,PSS2_X13Y53,PS_DDR_BA0_502 | 
|  | M9,34,IOB_X0Y12,RIOB33_X31Y11,IO_L19P_T3_34 | 
|  | M10,34,IOB_X0Y8,RIOB33_X31Y7,IO_L21P_T3_DQS_34 | 
|  | M11,34,IOB_X0Y7,RIOB33_X31Y7,IO_L21N_T3_DQS_34 | 
|  | M12,34,IOB_X0Y25,RIOB33_X31Y25,IO_L12N_T1_MRCC_34 | 
|  | M14,34,IOB_X0Y31,RIOB33_X31Y31,IO_L9N_T1_DQS_34 | 
|  | M15,34,IOB_X0Y33,RIOB33_X31Y33,IO_L8N_T1_34 | 
|  | N1,502,IOPAD_X1Y5,PSS2_X13Y53,PS_DDR_A1_502 | 
|  | N2,502,IOPAD_X1Y24,PSS2_X13Y53,PS_DDR_CKN_502 | 
|  | N3,502,IOPAD_X1Y25,PSS2_X13Y53,PS_DDR_CKP_502 | 
|  | N4,502,IOPAD_X1Y13,PSS2_X13Y53,PS_DDR_A9_502 | 
|  | N6,502,IOPAD_X1Y21,PSS2_X13Y53,PS_DDR_BA2_502 | 
|  | N7,34,IOB_X0Y6,RIOB33_X31Y5,IO_L22P_T3_34 | 
|  | N8,34,IOB_X0Y5,RIOB33_X31Y5,IO_L22N_T3_34 | 
|  | N9,34,IOB_X0Y11,RIOB33_X31Y11,IO_L19N_T3_VREF_34 | 
|  | N11,34,IOB_X0Y24,RIOB33_X31Y23,IO_L13P_T2_MRCC_34 | 
|  | N12,34,IOB_X0Y23,RIOB33_X31Y23,IO_L13N_T2_MRCC_34 | 
|  | N13,34,IOB_X0Y36,RIOB33_X31Y35,IO_L7P_T1_34 | 
|  | N14,34,IOB_X0Y35,RIOB33_X31Y35,IO_L7N_T1_34 | 
|  | P1,502,IOPAD_X1Y4,PSS2_X13Y53,PS_DDR_A0_502 | 
|  | P3,502,IOPAD_X1Y8,PSS2_X13Y53,PS_DDR_A4_502 | 
|  | P4,502,IOPAD_X1Y9,PSS2_X13Y53,PS_DDR_A5_502 | 
|  | P5,502,IOPAD_X1Y10,PSS2_X13Y53,PS_DDR_A6_502 | 
|  | P6,502,IOPAD_X1Y12,PSS2_X13Y53,PS_DDR_A8_502 | 
|  | P8,34,IOB_X0Y4,RIOB33_X31Y3,IO_L23P_T3_34 | 
|  | P9,34,IOB_X0Y3,RIOB33_X31Y3,IO_L23N_T3_34 | 
|  | P10,34,IOB_X0Y2,RIOB33_X31Y1,IO_L24P_T3_34 | 
|  | P11,34,IOB_X0Y18,RIOB33_X31Y17,IO_L16P_T2_34 | 
|  | P13,34,IOB_X0Y14,RIOB33_X31Y13,IO_L18P_T2_34 | 
|  | P14,34,IOB_X0Y13,RIOB33_X31Y13,IO_L18N_T2_34 | 
|  | P15,34,IOB_X0Y20,RIOB33_X31Y19,IO_L15P_T2_DQS_34 | 
|  | R1,502,IOPAD_X1Y20,PSS2_X13Y53,PS_DDR_BA1_502 | 
|  | R2,502,IOPAD_X1Y27,PSS2_X13Y53,PS_DDR_CS_B_502 | 
|  | R3,502,IOPAD_X1Y1,PSS2_X13Y53,PS_DDR_WE_B_502 | 
|  | R5,502,IOPAD_X1Y22,PSS2_X13Y53,PS_DDR_CAS_B_502 | 
|  | R6,502,IOPAD_X1Y133,PSS2_X13Y53,PS_DDR_RAS_B_502 | 
|  | R7,34,IOB_X0Y10,RIOB33_X31Y9,IO_L20P_T3_34 | 
|  | R8,34,IOB_X0Y9,RIOB33_X31Y9,IO_L20N_T3_34 | 
|  | R10,34,IOB_X0Y1,RIOB33_X31Y1,IO_L24N_T3_34 | 
|  | R11,34,IOB_X0Y17,RIOB33_X31Y17,IO_L16N_T2_34 | 
|  | R12,34,IOB_X0Y16,RIOB33_X31Y15,IO_L17P_T2_34 | 
|  | R13,34,IOB_X0Y15,RIOB33_X31Y15,IO_L17N_T2_34 | 
|  | R15,34,IOB_X0Y19,RIOB33_X31Y19,IO_L15N_T2_DQS_34 |