Project X-Ray - Xilinx Series 7 Bitstream Documentation

This repo contains the bitstream documentation database for Xilinx Series 7 devices.

HTML version of the Xilinx Series 7 BitStream is available on https://symbiflow.github.io/prjxray-db.

This documentation was generated using the Project X-Ray tools.

Due to the long time taken to create this database yourself, a prebuilt version is currently being provided by Tim ‘mithro’ Ansell <me@mith.ro>. The database is intended to kept in sync with the current prjxray output, but due to the manual nature required to create it, it may sometimes lag behind what you could create yourself using those tools.

Please try contacting Tim if you believe the database is more than a week out of date.

Contributions

As this repo is created from the prjxray output it doesn't accept external contributions. You are encourage to generate and maintain your own versions of this documentation if your needs are not being met by this repository.

The htmlgen.py is kept in sync with the version in Project X-Ray, please contribute all changes to that file and then request Tim to rebuild the HTML output.

License

These files are released under the very permissive CC0 1.0 Universal.

Details

Last updated on Sun 28 Jul 2019 06:06:15 PM UTC (2019-07-28T18:06:15+00:00).

Created using Project X-Ray version 9d0065a7.

Latest commit was;

commit 9d0065a768eb1595ba98695339a06517ea469c35
Merge: 1de2a0a6 702ae026
Author: litghost <537074+litghost@users.noreply.github.com>
Date:   Fri Jul 26 19:25:38 2019 -0700

    Merge pull request #934 from antmicro/ioi3-pips
    
    IOI3_INTER pips fuzzer

Database for artix7

Settings

Created using following settings/artix7.sh (sha256: 26e1ff93657132928a3b583c95347267d7afeb18a7b7036f0d7a6ea3367ae803)

export XRAY_DATABASE="artix7"
export XRAY_PART="xc7a50tfgg484-1"
export XRAY_ROI_FRAMES="0x00000000:0xffffffff"

# All CLB's in part, all BRAM's in part, all DSP's in part.
# tcl queries IOB => don't bother adding
export XRAY_ROI_TILEGRID="SLICE_X0Y0:SLICE_X65Y99 SLICE_X0Y100:SLICE_X57Y149 RAMB18_X0Y0:RAMB18_X1Y59 RAMB36_X0Y0:RAMB36_X1Y29 RAMB18_X2Y0:RAMB18_X2Y39 RAMB36_X2Y0:RAMB36_X2Y19 DSP48_X0Y0:DSP48_X1Y59"

# These settings must remain in sync
export XRAY_ROI="SLICE_X0Y100:SLICE_X35Y149 RAMB18_X0Y40:RAMB18_X0Y59 RAMB36_X0Y20:RAMB36_X0Y29 DSP48_X0Y40:DSP48_X0Y59 IOB_X0Y100:IOB_X0Y149"
# Most of CMT X0Y2.
export XRAY_ROI_GRID_X1="10"
export XRAY_ROI_GRID_X2="58"
# Include VBRK / VTERM
export XRAY_ROI_GRID_Y1="0"
export XRAY_ROI_GRID_Y2="51"

export XRAY_PIN_00="E22"
export XRAY_PIN_01="D22"
export XRAY_PIN_02="E21"
export XRAY_PIN_03="D21"
export XRAY_PIN_04="G21"
export XRAY_PIN_05="G22"
export XRAY_PIN_06="F21"

source $(dirname ${BASH_SOURCE[0]})/../utils/environment.sh

Results

Results have checksums;

Database for kintex7

Settings

Created using following settings/kintex7.sh (sha256: 794538b550d399255cbafeeb1b5ff183dc66ebc6cd8dc0f725e3f6a3977f757d)

export XRAY_DATABASE="kintex7"
export XRAY_PART="xc7k70tfbg676-2"
export XRAY_ROI_FRAMES="0x00000000:0xffffffff"

# FIXME: make entire part
export XRAY_ROI_TILEGRID="SLICE_X0Y50:SLICE_X19Y99 DSP48_X0Y20:DSP48_X0Y39 RAMB18_X0Y20:RAMB18_X0Y39 RAMB36_X0Y10:RAMB36_X0Y19"

# These settings must remain in sync
export XRAY_ROI="SLICE_X0Y50:SLICE_X19Y99 DSP48_X0Y20:DSP48_X0Y39 RAMB18_X0Y20:RAMB18_X0Y39 RAMB36_X0Y10:RAMB36_X0Y19 IOB_X0Y50:IOB_X0Y99"
# Part of CMT X0Y1
export XRAY_ROI_GRID_X1="0"
export XRAY_ROI_GRID_X2="38"
# Include VBRK / VTERM
export XRAY_ROI_GRID_Y1="104"
export XRAY_ROI_GRID_Y2="156"

# Choose the first N High Range I/Os
export XRAY_PIN_00="K25"
export XRAY_PIN_01="K26"
export XRAY_PIN_02="L24"
export XRAY_PIN_03="L25"
export XRAY_PIN_04="M19"
export XRAY_PIN_05="M20"
export XRAY_PIN_06="M21"

source $(dirname ${BASH_SOURCE[0]})/../utils/environment.sh

Results

Results have checksums;

Database for zynq7

Settings

Created using following settings/zynq7.sh (sha256: 61298e89dcc873eadba47f5c2f9f72a38fa022583b2c7ff89246b2e051585ad8)

export XRAY_DATABASE="zynq7"
export XRAY_PART="xc7z010clg400-1"
export XRAY_ROI_FRAMES="0x00000000:0xffffffff"

# All CLB's in part, all BRAM's in part, all DSP's in part.
export XRAY_ROI_TILEGRID="SLICE_X0Y0:SLICE_X43Y99 RAMB18_X0Y0:RAMB18_X2Y39 RAMB36_X0Y0:RAMB36_X2Y19 DSP48_X0Y0:DSP48_X1Y39"

# These settings must remain in sync
export XRAY_ROI="SLICE_X00Y50:SLICE_X43Y99 RAMB18_X0Y20:RAMB18_X2Y39 RAMB36_X0Y10:RAMB36_X2Y19 IOB_X0Y50:IOB_X0Y99"

# Most of CMT X0Y2.
export XRAY_ROI_GRID_X1="83"
export XRAY_ROI_GRID_X2="118"
# Include VBRK / VTERM
export XRAY_ROI_GRID_Y1="0"
export XRAY_ROI_GRID_Y2="51"

export XRAY_PIN_00="L14"
export XRAY_PIN_01="L15"
export XRAY_PIN_02="M14"
export XRAY_PIN_03="M15"
export XRAY_PIN_04="K16"
export XRAY_PIN_05="J16"
export XRAY_PIN_06="J15"

source $(dirname ${BASH_SOURCE[0]})/../utils/environment.sh

Results

Results have checksums;