| pin,bank,site,tile,pin_function |
| A1,502,IOPAD_X1Y28,PSS2_X13Y53,PS_DDR_DM0_502 |
| A2,502,IOPAD_X1Y34,PSS2_X13Y53,PS_DDR_DQ2_502 |
| A4,502,IOPAD_X1Y35,PSS2_X13Y53,PS_DDR_DQ3_502 |
| A5,500,IOPAD_X1Y83,PSS2_X13Y53,PS_MIO6_500 |
| A6,500,IOPAD_X1Y82,PSS2_X13Y53,PS_MIO5_500 |
| A7,500,IOPAD_X1Y78,PSS2_X13Y53,PS_MIO1_500 |
| A9,501,IOPAD_X1Y120,PSS2_X13Y53,PS_MIO43_501 |
| A10,501,IOPAD_X1Y114,PSS2_X13Y53,PS_MIO37_501 |
| A11,501,IOPAD_X1Y113,PSS2_X13Y53,PS_MIO36_501 |
| A12,501,IOPAD_X1Y111,PSS2_X13Y53,PS_MIO34_501 |
| A14,501,IOPAD_X1Y109,PSS2_X13Y53,PS_MIO32_501 |
| A15,501,IOPAD_X1Y103,PSS2_X13Y53,PS_MIO26_501 |
| A16,501,IOPAD_X1Y101,PSS2_X13Y53,PS_MIO24_501 |
| A17,501,IOPAD_X1Y97,PSS2_X13Y53,PS_MIO20_501 |
| A19,501,IOPAD_X1Y93,PSS2_X13Y53,PS_MIO16_501 |
| A20,35,IOB_X0Y95,RIOB33_X31Y95,IO_L2N_T0_AD8N_35 |
| B2,502,IOPAD_X1Y64,PSS2_X13Y53,PS_DDR_DQS_N0_502 |
| B3,502,IOPAD_X1Y33,PSS2_X13Y53,PS_DDR_DQ1_502 |
| B4,502,IOPAD_X1Y72,PSS2_X13Y53,PS_DDR_DRST_B_502 |
| B5,500,IOPAD_X1Y86,PSS2_X13Y53,PS_MIO9_500 |
| B7,500,IOPAD_X1Y81,PSS2_X13Y53,PS_MIO4_500 |
| B8,500,IOPAD_X1Y79,PSS2_X13Y53,PS_MIO2_500 |
| B9,501,IOPAD_X1Y128,PSS2_X13Y53,PS_MIO51_501 |
| B10,501,IOPAD_X1Y134,PSS2_X13Y53,PS_SRST_B_501 |
| B12,501,IOPAD_X1Y125,PSS2_X13Y53,PS_MIO48_501 |
| B13,501,IOPAD_X1Y127,PSS2_X13Y53,PS_MIO50_501 |
| B14,501,IOPAD_X1Y124,PSS2_X13Y53,PS_MIO47_501 |
| B15,501,IOPAD_X1Y122,PSS2_X13Y53,PS_MIO45_501 |
| B17,501,IOPAD_X1Y99,PSS2_X13Y53,PS_MIO22_501 |
| B18,501,IOPAD_X1Y95,PSS2_X13Y53,PS_MIO18_501 |
| B19,35,IOB_X0Y96,RIOB33_X31Y95,IO_L2P_T0_AD8P_35 |
| B20,35,IOB_X0Y97,RIOB33_X31Y97,IO_L1N_T0_AD0N_35 |
| C1,502,IOPAD_X1Y38,PSS2_X13Y53,PS_DDR_DQ6_502 |
| C2,502,IOPAD_X1Y68,PSS2_X13Y53,PS_DDR_DQS_P0_502 |
| C3,502,IOPAD_X1Y32,PSS2_X13Y53,PS_DDR_DQ0_502 |
| C5,500,IOPAD_X1Y91,PSS2_X13Y53,PS_MIO14_500 |
| C6,500,IOPAD_X1Y88,PSS2_X13Y53,PS_MIO11_500 |
| C7,500,IOPAD_X1Y132,PSS2_X13Y53,PS_POR_B_500 |
| C8,500,IOPAD_X1Y92,PSS2_X13Y53,PS_MIO15_500 |
| C10,501,IOPAD_X1Y129,PSS2_X13Y53,PS_MIO52_501 |
| C11,501,IOPAD_X1Y130,PSS2_X13Y53,PS_MIO53_501 |
| C12,501,IOPAD_X1Y126,PSS2_X13Y53,PS_MIO49_501 |
| C13,501,IOPAD_X1Y106,PSS2_X13Y53,PS_MIO29_501 |
| C15,501,IOPAD_X1Y107,PSS2_X13Y53,PS_MIO30_501 |
| C16,501,IOPAD_X1Y105,PSS2_X13Y53,PS_MIO28_501 |
| C17,501,IOPAD_X1Y118,PSS2_X13Y53,PS_MIO41_501 |
| C18,501,IOPAD_X1Y116,PSS2_X13Y53,PS_MIO39_501 |
| C20,35,IOB_X0Y98,RIOB33_X31Y97,IO_L1P_T0_AD0P_35 |
| D1,502,IOPAD_X1Y37,PSS2_X13Y53,PS_DDR_DQ5_502 |
| D3,502,IOPAD_X1Y36,PSS2_X13Y53,PS_DDR_DQ4_502 |
| D4,502,IOPAD_X1Y18,PSS2_X13Y53,PS_DDR_A13_502 |
| D5,500,IOPAD_X1Y85,PSS2_X13Y53,PS_MIO8_500 |
| D6,500,IOPAD_X1Y80,PSS2_X13Y53,PS_MIO3_500 |
| D8,500,IOPAD_X1Y84,PSS2_X13Y53,PS_MIO7_500 |
| D9,500,IOPAD_X1Y89,PSS2_X13Y53,PS_MIO12_500 |
| D10,501,IOPAD_X1Y96,PSS2_X13Y53,PS_MIO19_501 |
| D11,501,IOPAD_X1Y100,PSS2_X13Y53,PS_MIO23_501 |
| D13,501,IOPAD_X1Y104,PSS2_X13Y53,PS_MIO27_501 |
| D14,501,IOPAD_X1Y117,PSS2_X13Y53,PS_MIO40_501 |
| D15,501,IOPAD_X1Y110,PSS2_X13Y53,PS_MIO33_501 |
| D16,501,IOPAD_X1Y123,PSS2_X13Y53,PS_MIO46_501 |
| D18,35,IOB_X0Y93,RIOB33_X31Y93,IO_L3N_T0_DQS_AD1N_35 |
| D19,35,IOB_X0Y92,RIOB33_X31Y91,IO_L4P_T0_35 |
| D20,35,IOB_X0Y91,RIOB33_X31Y91,IO_L4N_T0_35 |
| E1,502,IOPAD_X1Y39,PSS2_X13Y53,PS_DDR_DQ7_502 |
| E2,502,IOPAD_X1Y40,PSS2_X13Y53,PS_DDR_DQ8_502 |
| E3,502,IOPAD_X1Y41,PSS2_X13Y53,PS_DDR_DQ9_502 |
| E4,502,IOPAD_X1Y16,PSS2_X13Y53,PS_DDR_A12_502 |
| E6,500,IOPAD_X1Y77,PSS2_X13Y53,PS_MIO0_500 |
| E7,500,IOPAD_X1Y26,PSS2_X13Y53,PS_CLK_500 |
| E8,500,IOPAD_X1Y90,PSS2_X13Y53,PS_MIO13_500 |
| E9,500,IOPAD_X1Y87,PSS2_X13Y53,PS_MIO10_500 |
| E12,501,IOPAD_X1Y119,PSS2_X13Y53,PS_MIO42_501 |
| E13,501,IOPAD_X1Y115,PSS2_X13Y53,PS_MIO38_501 |
| E14,501,IOPAD_X1Y94,PSS2_X13Y53,PS_MIO17_501 |
| E16,501,IOPAD_X1Y108,PSS2_X13Y53,PS_MIO31_501 |
| E17,35,IOB_X0Y94,RIOB33_X31Y93,IO_L3P_T0_DQS_AD1P_35 |
| E18,35,IOB_X0Y90,RIOB33_X31Y89,IO_L5P_T0_AD9P_35 |
| E19,35,IOB_X0Y89,RIOB33_X31Y89,IO_L5N_T0_AD9N_35 |
| F1,502,IOPAD_X1Y29,PSS2_X13Y53,PS_DDR_DM1_502 |
| F2,502,IOPAD_X1Y65,PSS2_X13Y53,PS_DDR_DQS_N1_502 |
| F4,502,IOPAD_X1Y17,PSS2_X13Y53,PS_DDR_A14_502 |
| F5,502,IOPAD_X1Y14,PSS2_X13Y53,PS_DDR_A10_502 |
| F12,501,IOPAD_X1Y112,PSS2_X13Y53,PS_MIO35_501 |
| F13,501,IOPAD_X1Y121,PSS2_X13Y53,PS_MIO44_501 |
| F14,501,IOPAD_X1Y98,PSS2_X13Y53,PS_MIO21_501 |
| F15,501,IOPAD_X1Y102,PSS2_X13Y53,PS_MIO25_501 |
| F16,35,IOB_X0Y88,RIOB33_X31Y87,IO_L6P_T0_35 |
| F17,35,IOB_X0Y87,RIOB33_X31Y87,IO_L6N_T0_VREF_35 |
| F19,35,IOB_X0Y70,RIOB33_X31Y69,IO_L15P_T2_DQS_AD12P_35 |
| F20,35,IOB_X0Y69,RIOB33_X31Y69,IO_L15N_T2_DQS_AD12N_35 |
| G2,502,IOPAD_X1Y69,PSS2_X13Y53,PS_DDR_DQS_P1_502 |
| G3,502,IOPAD_X1Y42,PSS2_X13Y53,PS_DDR_DQ10_502 |
| G4,502,IOPAD_X1Y15,PSS2_X13Y53,PS_DDR_A11_502 |
| G5,502,IOPAD_X1Y2,PSS2_X13Y53,PS_DDR_VRN_502 |
| G14,35,IOB_X0Y99,RIOB33_SING_X31Y99,IO_0_35 |
| G15,35,IOB_X0Y61,RIOB33_X31Y61,IO_L19N_T3_VREF_35 |
| G17,35,IOB_X0Y68,RIOB33_X31Y67,IO_L16P_T2_35 |
| G18,35,IOB_X0Y67,RIOB33_X31Y67,IO_L16N_T2_35 |
| G19,35,IOB_X0Y64,RIOB33_X31Y63,IO_L18P_T2_AD13P_35 |
| G20,35,IOB_X0Y63,RIOB33_X31Y63,IO_L18N_T2_AD13N_35 |
| H1,502,IOPAD_X1Y46,PSS2_X13Y53,PS_DDR_DQ14_502 |
| H2,502,IOPAD_X1Y45,PSS2_X13Y53,PS_DDR_DQ13_502 |
| H3,502,IOPAD_X1Y43,PSS2_X13Y53,PS_DDR_DQ11_502 |
| H5,502,IOPAD_X1Y3,PSS2_X13Y53,PS_DDR_VRP_502 |
| H15,35,IOB_X0Y62,RIOB33_X31Y61,IO_L19P_T3_35 |
| H16,35,IOB_X0Y74,RIOB33_X31Y73,IO_L13P_T2_MRCC_35 |
| H17,35,IOB_X0Y73,RIOB33_X31Y73,IO_L13N_T2_MRCC_35 |
| H18,35,IOB_X0Y71,RIOB33_X31Y71,IO_L14N_T2_AD4N_SRCC_35 |
| H20,35,IOB_X0Y65,RIOB33_X31Y65,IO_L17N_T2_AD5N_35 |
| J1,502,IOPAD_X1Y47,PSS2_X13Y53,PS_DDR_DQ15_502 |
| J3,502,IOPAD_X1Y44,PSS2_X13Y53,PS_DDR_DQ12_502 |
| J4,502,IOPAD_X1Y13,PSS2_X13Y53,PS_DDR_A9_502 |
| J5,502,IOPAD_X1Y21,PSS2_X13Y53,PS_DDR_BA2_502 |
| J14,35,IOB_X0Y59,RIOB33_X31Y59,IO_L20N_T3_AD6N_35 |
| J15,35,IOB_X0Y50,RIOB33_SING_X31Y50,IO_25_35 |
| J16,35,IOB_X0Y51,RIOB33_X31Y51,IO_L24N_T3_AD15N_35 |
| J18,35,IOB_X0Y72,RIOB33_X31Y71,IO_L14P_T2_AD4P_SRCC_35 |
| J19,35,IOB_X0Y79,RIOB33_X31Y79,IO_L10N_T1_AD11N_35 |
| J20,35,IOB_X0Y66,RIOB33_X31Y65,IO_L17P_T2_AD5P_35 |
| K1,502,IOPAD_X1Y12,PSS2_X13Y53,PS_DDR_A8_502 |
| K2,502,IOPAD_X1Y5,PSS2_X13Y53,PS_DDR_A1_502 |
| K3,502,IOPAD_X1Y7,PSS2_X13Y53,PS_DDR_A3_502 |
| K4,502,IOPAD_X1Y11,PSS2_X13Y53,PS_DDR_A7_502 |
| K9,0,IPAD_X0Y0,MONITOR_BOT_PELE1_X67Y79,VP_0 |
| K14,35,IOB_X0Y60,RIOB33_X31Y59,IO_L20P_T3_AD6P_35 |
| K16,35,IOB_X0Y52,RIOB33_X31Y51,IO_L24P_T3_AD15P_35 |
| K17,35,IOB_X0Y76,RIOB33_X31Y75,IO_L12P_T1_MRCC_35 |
| K18,35,IOB_X0Y75,RIOB33_X31Y75,IO_L12N_T1_MRCC_35 |
| K19,35,IOB_X0Y80,RIOB33_X31Y79,IO_L10P_T1_AD11P_35 |
| L1,502,IOPAD_X1Y9,PSS2_X13Y53,PS_DDR_A5_502 |
| L2,502,IOPAD_X1Y25,PSS2_X13Y53,PS_DDR_CKP_502 |
| L4,502,IOPAD_X1Y10,PSS2_X13Y53,PS_DDR_A6_502 |
| L5,502,IOPAD_X1Y19,PSS2_X13Y53,PS_DDR_BA0_502 |
| L10,0,IPAD_X0Y1,MONITOR_BOT_PELE1_X67Y79,VN_0 |
| L14,35,IOB_X0Y56,RIOB33_X31Y55,IO_L22P_T3_AD7P_35 |
| L15,35,IOB_X0Y55,RIOB33_X31Y55,IO_L22N_T3_AD7N_35 |
| L16,35,IOB_X0Y78,RIOB33_X31Y77,IO_L11P_T1_SRCC_35 |
| L17,35,IOB_X0Y77,RIOB33_X31Y77,IO_L11N_T1_SRCC_35 |
| L19,35,IOB_X0Y82,RIOB33_X31Y81,IO_L9P_T1_DQS_AD3P_35 |
| L20,35,IOB_X0Y81,RIOB33_X31Y81,IO_L9N_T1_DQS_AD3N_35 |
| M2,502,IOPAD_X1Y24,PSS2_X13Y53,PS_DDR_CKN_502 |
| M3,502,IOPAD_X1Y6,PSS2_X13Y53,PS_DDR_A2_502 |
| M4,502,IOPAD_X1Y8,PSS2_X13Y53,PS_DDR_A4_502 |
| M5,502,IOPAD_X1Y1,PSS2_X13Y53,PS_DDR_WE_B_502 |
| M14,35,IOB_X0Y54,RIOB33_X31Y53,IO_L23P_T3_35 |
| M15,35,IOB_X0Y53,RIOB33_X31Y53,IO_L23N_T3_35 |
| M17,35,IOB_X0Y84,RIOB33_X31Y83,IO_L8P_T1_AD10P_35 |
| M18,35,IOB_X0Y83,RIOB33_X31Y83,IO_L8N_T1_AD10N_35 |
| M19,35,IOB_X0Y86,RIOB33_X31Y85,IO_L7P_T1_AD2P_35 |
| M20,35,IOB_X0Y85,RIOB33_X31Y85,IO_L7N_T1_AD2N_35 |
| N1,502,IOPAD_X1Y27,PSS2_X13Y53,PS_DDR_CS_B_502 |
| N2,502,IOPAD_X1Y4,PSS2_X13Y53,PS_DDR_A0_502 |
| N3,502,IOPAD_X1Y23,PSS2_X13Y53,PS_DDR_CKE_502 |
| N5,502,IOPAD_X1Y131,PSS2_X13Y53,PS_DDR_ODT_502 |
| N15,35,IOB_X0Y58,RIOB33_X31Y57,IO_L21P_T3_DQS_AD14P_35 |
| N16,35,IOB_X0Y57,RIOB33_X31Y57,IO_L21N_T3_DQS_AD14N_35 |
| N17,34,IOB_X0Y4,RIOB33_X31Y3,IO_L23P_T3_34 |
| N18,34,IOB_X0Y24,RIOB33_X31Y23,IO_L13P_T2_MRCC_34 |
| N20,34,IOB_X0Y22,RIOB33_X31Y21,IO_L14P_T2_SRCC_34 |
| P1,502,IOPAD_X1Y48,PSS2_X13Y53,PS_DDR_DQ16_502 |
| P3,502,IOPAD_X1Y49,PSS2_X13Y53,PS_DDR_DQ17_502 |
| P4,502,IOPAD_X1Y133,PSS2_X13Y53,PS_DDR_RAS_B_502 |
| P5,502,IOPAD_X1Y22,PSS2_X13Y53,PS_DDR_CAS_B_502 |
| P14,34,IOB_X0Y38,RIOB33_X31Y37,IO_L6P_T0_34 |
| P15,34,IOB_X0Y2,RIOB33_X31Y1,IO_L24P_T3_34 |
| P16,34,IOB_X0Y1,RIOB33_X31Y1,IO_L24N_T3_34 |
| P18,34,IOB_X0Y3,RIOB33_X31Y3,IO_L23N_T3_34 |
| P19,34,IOB_X0Y23,RIOB33_X31Y23,IO_L13N_T2_MRCC_34 |
| P20,34,IOB_X0Y21,RIOB33_X31Y21,IO_L14N_T2_SRCC_34 |
| R1,502,IOPAD_X1Y51,PSS2_X13Y53,PS_DDR_DQ19_502 |
| R2,502,IOPAD_X1Y70,PSS2_X13Y53,PS_DDR_DQS_P2_502 |
| R3,502,IOPAD_X1Y50,PSS2_X13Y53,PS_DDR_DQ18_502 |
| R4,502,IOPAD_X1Y20,PSS2_X13Y53,PS_DDR_BA1_502 |
| R14,34,IOB_X0Y37,RIOB33_X31Y37,IO_L6N_T0_VREF_34 |
| R16,34,IOB_X0Y12,RIOB33_X31Y11,IO_L19P_T3_34 |
| R17,34,IOB_X0Y11,RIOB33_X31Y11,IO_L19N_T3_VREF_34 |
| R18,34,IOB_X0Y9,RIOB33_X31Y9,IO_L20N_T3_34 |
| R19,34,IOB_X0Y49,RIOB33_SING_X31Y49,IO_0_34 |
| T1,502,IOPAD_X1Y30,PSS2_X13Y53,PS_DDR_DM2_502 |
| T2,502,IOPAD_X1Y66,PSS2_X13Y53,PS_DDR_DQS_N2_502 |
| T4,502,IOPAD_X1Y52,PSS2_X13Y53,PS_DDR_DQ20_502 |
| T10,34,IOB_X0Y47,RIOB33_X31Y47,IO_L1N_T0_34 |
| T11,34,IOB_X0Y48,RIOB33_X31Y47,IO_L1P_T0_34 |
| T12,34,IOB_X0Y46,RIOB33_X31Y45,IO_L2P_T0_34 |
| T14,34,IOB_X0Y40,RIOB33_X31Y39,IO_L5P_T0_34 |
| T15,34,IOB_X0Y39,RIOB33_X31Y39,IO_L5N_T0_34 |
| T16,34,IOB_X0Y32,RIOB33_X31Y31,IO_L9P_T1_DQS_34 |
| T17,34,IOB_X0Y10,RIOB33_X31Y9,IO_L20P_T3_34 |
| T19,34,IOB_X0Y0,RIOB33_SING_X31Y0,IO_25_34 |
| T20,34,IOB_X0Y20,RIOB33_X31Y19,IO_L15P_T2_DQS_34 |
| U2,502,IOPAD_X1Y54,PSS2_X13Y53,PS_DDR_DQ22_502 |
| U3,502,IOPAD_X1Y55,PSS2_X13Y53,PS_DDR_DQ23_502 |
| U4,502,IOPAD_X1Y53,PSS2_X13Y53,PS_DDR_DQ21_502 |
| U12,34,IOB_X0Y45,RIOB33_X31Y45,IO_L2N_T0_34 |
| U13,34,IOB_X0Y44,RIOB33_X31Y43,IO_L3P_T0_DQS_PUDC_B_34 |
| U14,34,IOB_X0Y28,RIOB33_X31Y27,IO_L11P_T1_SRCC_34 |
| U15,34,IOB_X0Y27,RIOB33_X31Y27,IO_L11N_T1_SRCC_34 |
| U17,34,IOB_X0Y31,RIOB33_X31Y31,IO_L9N_T1_DQS_34 |
| U18,34,IOB_X0Y26,RIOB33_X31Y25,IO_L12P_T1_MRCC_34 |
| U19,34,IOB_X0Y25,RIOB33_X31Y25,IO_L12N_T1_MRCC_34 |
| U20,34,IOB_X0Y19,RIOB33_X31Y19,IO_L15N_T2_DQS_34 |
| V1,502,IOPAD_X1Y56,PSS2_X13Y53,PS_DDR_DQ24_502 |
| V2,502,IOPAD_X1Y62,PSS2_X13Y53,PS_DDR_DQ30_502 |
| V3,502,IOPAD_X1Y63,PSS2_X13Y53,PS_DDR_DQ31_502 |
| V12,34,IOB_X0Y42,RIOB33_X31Y41,IO_L4P_T0_34 |
| V13,34,IOB_X0Y43,RIOB33_X31Y43,IO_L3N_T0_DQS_34 |
| V15,34,IOB_X0Y30,RIOB33_X31Y29,IO_L10P_T1_34 |
| V16,34,IOB_X0Y14,RIOB33_X31Y13,IO_L18P_T2_34 |
| V17,34,IOB_X0Y8,RIOB33_X31Y7,IO_L21P_T3_DQS_34 |
| V18,34,IOB_X0Y7,RIOB33_X31Y7,IO_L21N_T3_DQS_34 |
| V20,34,IOB_X0Y18,RIOB33_X31Y17,IO_L16P_T2_34 |
| W1,502,IOPAD_X1Y58,PSS2_X13Y53,PS_DDR_DQ26_502 |
| W3,502,IOPAD_X1Y61,PSS2_X13Y53,PS_DDR_DQ29_502 |
| W4,502,IOPAD_X1Y67,PSS2_X13Y53,PS_DDR_DQS_N3_502 |
| W5,502,IOPAD_X1Y71,PSS2_X13Y53,PS_DDR_DQS_P3_502 |
| W13,34,IOB_X0Y41,RIOB33_X31Y41,IO_L4N_T0_34 |
| W14,34,IOB_X0Y34,RIOB33_X31Y33,IO_L8P_T1_34 |
| W15,34,IOB_X0Y29,RIOB33_X31Y29,IO_L10N_T1_34 |
| W16,34,IOB_X0Y13,RIOB33_X31Y13,IO_L18N_T2_34 |
| W18,34,IOB_X0Y6,RIOB33_X31Y5,IO_L22P_T3_34 |
| W19,34,IOB_X0Y5,RIOB33_X31Y5,IO_L22N_T3_34 |
| W20,34,IOB_X0Y17,RIOB33_X31Y17,IO_L16N_T2_34 |
| Y1,502,IOPAD_X1Y31,PSS2_X13Y53,PS_DDR_DM3_502 |
| Y2,502,IOPAD_X1Y60,PSS2_X13Y53,PS_DDR_DQ28_502 |
| Y3,502,IOPAD_X1Y57,PSS2_X13Y53,PS_DDR_DQ25_502 |
| Y4,502,IOPAD_X1Y59,PSS2_X13Y53,PS_DDR_DQ27_502 |
| Y14,34,IOB_X0Y33,RIOB33_X31Y33,IO_L8N_T1_34 |
| Y16,34,IOB_X0Y36,RIOB33_X31Y35,IO_L7P_T1_34 |
| Y17,34,IOB_X0Y35,RIOB33_X31Y35,IO_L7N_T1_34 |
| Y18,34,IOB_X0Y16,RIOB33_X31Y15,IO_L17P_T2_34 |
| Y19,34,IOB_X0Y15,RIOB33_X31Y15,IO_L17N_T2_34 |
