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foss-fpga-tools
/
prjxray
/
147eafe55e67db40c70003f007f20faf065e49a3
/
.
/
fuzzers
/
007-timing
/
routing-bels
/
top.v
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module
top
(
input di
,
output
do
);
assign
do
=
di
;
endmodule